2 ******************************************************************************
3 * @file stm32f7xx_hal_pwr.c
4 * @author MCD Application Team
7 * @brief PWR HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Power Controller (PWR) peripheral:
10 * + Initialization and de-initialization functions
11 * + Peripheral Control functions
13 ******************************************************************************
16 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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19 * are permitted provided that the following conditions are met:
20 * 1. Redistributions of source code must retain the above copyright notice,
21 * this list of conditions and the following disclaimer.
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23 * this list of conditions and the following disclaimer in the documentation
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26 * may be used to endorse or promote products derived from this software
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29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ******************************************************************************
43 /* Includes ------------------------------------------------------------------*/
44 #include "stm32f7xx_hal.h"
46 /** @addtogroup STM32F7xx_HAL_Driver
51 * @brief PWR HAL module driver
55 #ifdef HAL_PWR_MODULE_ENABLED
57 /* Private typedef -----------------------------------------------------------*/
58 /* Private define ------------------------------------------------------------*/
59 /** @addtogroup PWR_Private_Constants
63 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
66 #define PVD_MODE_IT ((uint32_t)0x00010000U)
67 #define PVD_MODE_EVT ((uint32_t)0x00020000U)
68 #define PVD_RISING_EDGE ((uint32_t)0x00000001U)
69 #define PVD_FALLING_EDGE ((uint32_t)0x00000002U)
74 /** @defgroup PWR_ENABLE_WUP_Mask PWR Enable WUP Mask
77 #define PWR_EWUP_MASK ((uint32_t)0x00003F00)
85 /* Private macro -------------------------------------------------------------*/
86 /* Private variables ---------------------------------------------------------*/
87 /* Private function prototypes -----------------------------------------------*/
88 /* Private functions ---------------------------------------------------------*/
90 /** @defgroup PWR_Exported_Functions PWR Exported Functions
94 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
95 * @brief Initialization and de-initialization functions
98 ===============================================================================
99 ##### Initialization and de-initialization functions #####
100 ===============================================================================
102 After reset, the backup domain (RTC registers, RTC backup data
103 registers and backup SRAM) is protected against possible unwanted
105 To enable access to the RTC Domain and RTC registers, proceed as follows:
106 (+) Enable the Power Controller (PWR) APB1 interface clock using the
107 __HAL_RCC_PWR_CLK_ENABLE() macro.
108 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
115 * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
118 void HAL_PWR_DeInit(void)
120 __HAL_RCC_PWR_FORCE_RESET();
121 __HAL_RCC_PWR_RELEASE_RESET();
125 * @brief Enables access to the backup domain (RTC registers, RTC
126 * backup data registers and backup SRAM).
127 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
128 * Backup Domain Access should be kept enabled.
131 void HAL_PWR_EnableBkUpAccess(void)
133 /* Enable access to RTC and backup registers */
134 SET_BIT(PWR
->CR1
, PWR_CR1_DBP
);
138 * @brief Disables access to the backup domain (RTC registers, RTC
139 * backup data registers and backup SRAM).
140 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
141 * Backup Domain Access should be kept enabled.
144 void HAL_PWR_DisableBkUpAccess(void)
146 /* Disable access to RTC and backup registers */
147 CLEAR_BIT(PWR
->CR1
, PWR_CR1_DBP
);
154 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
155 * @brief Low Power modes configuration functions
159 ===============================================================================
160 ##### Peripheral Control functions #####
161 ===============================================================================
163 *** PVD configuration ***
164 =========================
166 (+) The PVD is used to monitor the VDD power supply by comparing it to a
167 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
168 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
169 than the PVD threshold. This event is internally connected to the EXTI
170 line16 and can generate an interrupt if enabled. This is done through
171 __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
172 (+) The PVD is stopped in Standby mode.
174 *** Wake-up pin configuration ***
175 ================================
177 (+) Wake-up pin is used to wake up the system from Standby mode. This pin is
178 forced in input pull-down configuration and is active on rising edges.
179 (+) There are up to 6 Wake-up pin in the STM32F7 devices family
181 *** Low Power modes configuration ***
182 =====================================
184 The devices feature 3 low-power modes:
185 (+) Sleep mode: Cortex-M7 core stopped, peripherals kept running.
186 (+) Stop mode: all clocks are stopped, regulator running, regulator
188 (+) Standby mode: 1.2V domain powered off.
194 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI)
196 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
197 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
199 -@@- The Regulator parameter is not used for the STM32F7 family
200 and is kept as parameter just to maintain compatibility with the
201 lower power families (STM32L).
203 Any peripheral interrupt acknowledged by the nested vectored interrupt
204 controller (NVIC) can wake up the device from Sleep mode.
209 In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
210 and the HSE RC oscillators are disabled. Internal SRAM and register contents
212 The voltage regulator can be configured either in normal or low-power mode.
213 To minimize the consumption In Stop mode, FLASH can be powered off before
214 entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function.
215 It can be switched on again by software after exiting the Stop mode using
216 the HAL_PWREx_DisableFlashPowerDown() function.
219 The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON)
221 (++) Main regulator ON.
222 (++) Low Power regulator ON.
224 Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
230 The Standby mode allows to achieve the lowest power consumption. It is based
231 on the Cortex-M7 deep sleep mode, with the voltage regulator disabled.
232 The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
233 the HSE oscillator are also switched off. SRAM and register contents are lost
234 except for the RTC registers, RTC backup registers, backup SRAM and Standby
237 The voltage regulator is OFF.
240 (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
242 (+++) WKUP pin rising or falling edge, RTC alarm (Alarm A and Alarm B), RTC
243 wakeup, tamper event, time stamp event, external reset in NRST pin, IWDG reset.
245 *** Auto-wakeup (AWU) from low-power mode ***
246 =============================================
249 (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
250 Wakeup event, a tamper event or a time-stamp event, without depending on
251 an external interrupt (Auto-wakeup mode).
253 (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
255 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
256 configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
258 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
259 is necessary to configure the RTC to detect the tamper or time stamp event using the
260 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
262 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
263 configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
270 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
271 * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
272 * information for the PVD.
273 * @note Refer to the electrical characteristics of your device datasheet for
274 * more details about the voltage threshold corresponding to each
278 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef
*sConfigPVD
)
280 /* Check the parameters */
281 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD
->PVDLevel
));
282 assert_param(IS_PWR_PVD_MODE(sConfigPVD
->Mode
));
284 /* Set PLS[7:5] bits according to PVDLevel value */
285 MODIFY_REG(PWR
->CR1
, PWR_CR1_PLS
, sConfigPVD
->PVDLevel
);
287 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
288 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
289 __HAL_PWR_PVD_EXTI_DISABLE_IT();
290 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
291 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
293 /* Configure interrupt mode */
294 if((sConfigPVD
->Mode
& PVD_MODE_IT
) == PVD_MODE_IT
)
296 __HAL_PWR_PVD_EXTI_ENABLE_IT();
299 /* Configure event mode */
300 if((sConfigPVD
->Mode
& PVD_MODE_EVT
) == PVD_MODE_EVT
)
302 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
305 /* Configure the edge */
306 if((sConfigPVD
->Mode
& PVD_RISING_EDGE
) == PVD_RISING_EDGE
)
308 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
311 if((sConfigPVD
->Mode
& PVD_FALLING_EDGE
) == PVD_FALLING_EDGE
)
313 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
318 * @brief Enables the Power Voltage Detector(PVD).
321 void HAL_PWR_EnablePVD(void)
323 /* Enable the power voltage detector */
324 SET_BIT(PWR
->CR1
, PWR_CR1_PVDE
);
328 * @brief Disables the Power Voltage Detector(PVD).
331 void HAL_PWR_DisablePVD(void)
333 /* Disable the power voltage detector */
334 CLEAR_BIT(PWR
->CR1
, PWR_CR1_PVDE
);
338 * @brief Enable the WakeUp PINx functionality.
339 * @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable.
340 * This parameter can be one of the following legacy values, which sets the default polarity:
341 * detection on high level (rising edge):
342 * @arg PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5, PWR_WAKEUP_PIN6
343 * or one of the following value where the user can explicitly states the enabled pin and
344 * the chosen polarity
345 * @arg PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW
346 * @arg PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW
347 * @arg PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW
348 * @arg PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW
349 * @arg PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW
350 * @arg PWR_WAKEUP_PIN6_HIGH or PWR_WAKEUP_PIN6_LOW
351 * @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent.
354 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity
)
356 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity
));
358 /* Enable wake-up pin */
359 SET_BIT(PWR
->CSR2
, (PWR_EWUP_MASK
& WakeUpPinPolarity
));
361 /* Specifies the Wake-Up pin polarity for the event detection
362 (rising or falling edge) */
363 MODIFY_REG(PWR
->CR2
, (PWR_EWUP_MASK
& WakeUpPinPolarity
), (WakeUpPinPolarity
>> 0x06));
367 * @brief Disables the WakeUp PINx functionality.
368 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
369 * This parameter can be one of the following values:
370 * @arg PWR_WAKEUP_PIN1
371 * @arg PWR_WAKEUP_PIN2
372 * @arg PWR_WAKEUP_PIN3
373 * @arg PWR_WAKEUP_PIN4
374 * @arg PWR_WAKEUP_PIN5
375 * @arg PWR_WAKEUP_PIN6
378 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx
)
380 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx
));
382 CLEAR_BIT(PWR
->CSR2
, WakeUpPinx
);
386 * @brief Enters Sleep mode.
388 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
390 * @note In Sleep mode, the systick is stopped to avoid exit from this mode with
391 * systick interrupt when used as time base for Timeout
393 * @param Regulator: Specifies the regulator state in SLEEP mode.
394 * This parameter can be one of the following values:
395 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
396 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
397 * @note This parameter is not used for the STM32F7 family and is kept as parameter
398 * just to maintain compatibility with the lower power families.
399 * @param SLEEPEntry: Specifies if SLEEP mode in entered with WFI or WFE instruction.
400 * This parameter can be one of the following values:
401 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
402 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
405 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator
, uint8_t SLEEPEntry
)
408 /* Check the parameters */
409 assert_param(IS_PWR_REGULATOR(Regulator
));
410 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry
));
412 /* Clear SLEEPDEEP bit of Cortex System Control Register */
413 CLEAR_BIT(SCB
->SCR
, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk
));
415 /* Select SLEEP mode entry -------------------------------------------------*/
416 if(SLEEPEntry
== PWR_SLEEPENTRY_WFI
)
418 /* Request Wait For Interrupt */
423 /* Request Wait For Event */
431 * @brief Enters Stop mode.
432 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
433 * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
434 * the HSI RC oscillator is selected as system clock.
435 * @note When the voltage regulator operates in low power mode, an additional
436 * startup delay is incurred when waking up from Stop mode.
437 * By keeping the internal regulator ON during Stop mode, the consumption
438 * is higher although the startup time is reduced.
439 * @param Regulator: Specifies the regulator state in Stop mode.
440 * This parameter can be one of the following values:
441 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
442 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
443 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
444 * This parameter can be one of the following values:
445 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
446 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
449 void HAL_PWR_EnterSTOPMode(uint32_t Regulator
, uint8_t STOPEntry
)
453 /* Check the parameters */
454 assert_param(IS_PWR_REGULATOR(Regulator
));
455 assert_param(IS_PWR_STOP_ENTRY(STOPEntry
));
457 /* Select the regulator state in Stop mode ---------------------------------*/
459 /* Clear PDDS and LPDS bits */
460 tmpreg
&= (uint32_t)~(PWR_CR1_PDDS
| PWR_CR1_LPDS
);
462 /* Set LPDS, MRLVDS and LPLVDS bits according to Regulator value */
465 /* Store the new value */
468 /* Set SLEEPDEEP bit of Cortex System Control Register */
469 SCB
->SCR
|= SCB_SCR_SLEEPDEEP_Msk
;
471 /* Select Stop mode entry --------------------------------------------------*/
472 if(STOPEntry
== PWR_STOPENTRY_WFI
)
474 /* Request Wait For Interrupt */
479 /* Request Wait For Event */
484 /* Reset SLEEPDEEP bit of Cortex System Control Register */
485 SCB
->SCR
&= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk
);
489 * @brief Enters Standby mode.
490 * @note In Standby mode, all I/O pins are high impedance except for:
491 * - Reset pad (still available)
492 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
493 * Alarm out, or RTC clock calibration out.
494 * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
495 * - WKUP pins if enabled.
498 void HAL_PWR_EnterSTANDBYMode(void)
500 /* Select Standby mode */
501 PWR
->CR1
|= PWR_CR1_PDDS
;
503 /* Set SLEEPDEEP bit of Cortex System Control Register */
504 SCB
->SCR
|= SCB_SCR_SLEEPDEEP_Msk
;
506 /* This option is used to ensure that store operations are completed */
507 #if defined ( __CC_ARM)
510 /* Request Wait For Interrupt */
515 * @brief This function handles the PWR PVD interrupt request.
516 * @note This API should be called under the PVD_IRQHandler().
519 void HAL_PWR_PVD_IRQHandler(void)
521 /* Check PWR Exti flag */
522 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET
)
524 /* PWR PVD interrupt user callback */
525 HAL_PWR_PVDCallback();
527 /* Clear PWR Exti pending bit */
528 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
533 * @brief PWR PVD interrupt callback
536 __weak
void HAL_PWR_PVDCallback(void)
538 /* NOTE : This function Should not be modified, when the callback is needed,
539 the HAL_PWR_PVDCallback could be implemented in the user file
544 * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
545 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
546 * re-enters SLEEP mode when an interruption handling is over.
547 * Setting this bit is useful when the processor is expected to run only on
548 * interruptions handling.
551 void HAL_PWR_EnableSleepOnExit(void)
553 /* Set SLEEPONEXIT bit of Cortex System Control Register */
554 SET_BIT(SCB
->SCR
, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk
));
558 * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
559 * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
560 * re-enters SLEEP mode when an interruption handling is over.
563 void HAL_PWR_DisableSleepOnExit(void)
565 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
566 CLEAR_BIT(SCB
->SCR
, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk
));
570 * @brief Enables CORTEX M4 SEVONPEND bit.
571 * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
572 * WFE to wake up when an interrupt moves from inactive to pended.
575 void HAL_PWR_EnableSEVOnPend(void)
577 /* Set SEVONPEND bit of Cortex System Control Register */
578 SET_BIT(SCB
->SCR
, ((uint32_t)SCB_SCR_SEVONPEND_Msk
));
582 * @brief Disables CORTEX M4 SEVONPEND bit.
583 * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
584 * WFE to wake up when an interrupt moves from inactive to pended.
587 void HAL_PWR_DisableSEVOnPend(void)
589 /* Clear SEVONPEND bit of Cortex System Control Register */
590 CLEAR_BIT(SCB
->SCR
, ((uint32_t)SCB_SCR_SEVONPEND_Msk
));
601 #endif /* HAL_PWR_MODULE_ENABLED */
610 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/