lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2s.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32h7xx_hal_i2s.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of I2S HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32H7xx_HAL_I2S_H
  22 #define STM32H7xx_HAL_I2S_H
  23
  24 #ifdef __cplusplus
  25 extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32h7xx_hal_def.h"
  30
  31 /** @addtogroup STM32H7xx_HAL_Driver
  32   * @{
  33   */
  34
  35 /** @addtogroup I2S
  36   * @{
  37   */
  38
  39 /* Exported types ------------------------------------------------------------*/
  40 /** @defgroup I2S_Exported_Types I2S Exported Types
  41   * @{
  42   */
  43
  44 /**
  45   * @brief I2S Init structure definition
  46   */
  47 typedef struct
  48 {
  49   uint32_t Mode;                /*!< Specifies the I2S operating mode.
  50                                      This parameter can be a value of @ref I2S_Mode */
  51
  52   uint32_t Standard;            /*!< Specifies the standard used for the I2S communication.
  53                                      This parameter can be a value of @ref I2S_Standard */
  54
  55   uint32_t DataFormat;          /*!< Specifies the data format for the I2S communication.
  56                                      This parameter can be a value of @ref I2S_Data_Format */
  57
  58   uint32_t MCLKOutput;          /*!< Specifies whether the I2S MCLK output is enabled or not.
  59                                      This parameter can be a value of @ref I2S_MCLK_Output */
  60
  61   uint32_t AudioFreq;           /*!< Specifies the frequency selected for the I2S communication.
  62                                      This parameter can be a value of @ref I2S_Audio_Frequency */
  63
  64   uint32_t CPOL;                /*!< Specifies the idle state of the I2S clock.
  65                                      This parameter can be a value of @ref I2S_Clock_Polarity */
  66
  67   uint32_t FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
  68                                      This parameter can be a value of @ref I2S_MSB_LSB_transmission       */
  69
  70   uint32_t WSInversion;         /*!< Control the Word Select Inversion.
  71                                      This parameter can be a value of @ref I2S_WSInversion                */
  72
  73   uint32_t Data24BitAlignment;  /*!< Specifies the Data Padding for 24 bits data length
  74                                       This parameter can be a value of @ref I2S_Data_24Bit_Alignment       */
  75
  76   uint32_t MasterKeepIOState;   /*!< Control of Alternate function GPIOs state
  77                                      This parameter can be a value of @ref SPI_Master_Keep_IO_State */
  78
  79 } I2S_InitTypeDef;
  80
  81 /**
  82   * @brief  HAL State structures definition
  83   */
  84 typedef enum
  85 {
  86   HAL_I2S_STATE_RESET      = 0x00UL,  /*!< I2S not yet initialized or disabled                */
  87   HAL_I2S_STATE_READY      = 0x01UL,  /*!< I2S initialized and ready for use                  */
  88   HAL_I2S_STATE_BUSY       = 0x02UL,  /*!< I2S internal process is ongoing                    */
  89   HAL_I2S_STATE_BUSY_TX    = 0x03UL,  /*!< Data Transmission process is ongoing               */
  90   HAL_I2S_STATE_BUSY_RX    = 0x04UL,  /*!< Data Reception process is ongoing                  */
  91   HAL_I2S_STATE_TIMEOUT    = 0x06UL,  /*!< I2S timeout state                                  */
  92   HAL_I2S_STATE_ERROR      = 0x07UL   /*!< I2S error state                                    */
  93 } HAL_I2S_StateTypeDef;
  94
  95 /**
  96   * @brief I2S handle Structure definition
  97   */
  98 typedef struct __I2S_HandleTypeDef
  99 {
 100   SPI_TypeDef                *Instance;            /*!< I2S registers base address */
 101
 102   I2S_InitTypeDef            Init;                 /*!< I2S communication parameters */
 103
 104   uint16_t                   *pTxBuffPtr;          /*!< Pointer to I2S Tx transfer buffer */
 105
 106   __IO uint16_t              TxXferSize;           /*!< I2S Tx transfer size */
 107
 108   __IO uint16_t              TxXferCount;          /*!< I2S Tx transfer Counter */
 109
 110   uint16_t                   *pRxBuffPtr;          /*!< Pointer to I2S Rx transfer buffer */
 111
 112   __IO uint16_t              RxXferSize;           /*!< I2S Rx transfer size */
 113
 114   __IO uint16_t              RxXferCount;          /*!< I2S Rx transfer counter
 115                                                       (This field is initialized at the
 116                                                        same value as transfer size at the
 117                                                        beginning of the transfer and
 118                                                        decremented when a sample is received
 119                                                        NbSamplesReceived = RxBufferSize-RxBufferCount) */
 120
 121   void (*RxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Rx ISR */
 122
 123   void (*TxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Tx ISR */
 124
 125   DMA_HandleTypeDef          *hdmatx;              /*!< I2S Tx DMA handle parameters */
 126
 127   DMA_HandleTypeDef          *hdmarx;              /*!< I2S Rx DMA handle parameters */
 128
 129   __IO HAL_LockTypeDef       Lock;                 /*!< I2S locking object */
 130
 131   __IO HAL_I2S_StateTypeDef  State;                /*!< I2S communication state */
 132
 133   __IO uint32_t              ErrorCode;            /*!< I2S Error code
 134                                                         This parameter can be a value of @ref I2S_Error */
 135
 136 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
 137   void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);             /*!< I2S Tx Completed callback          */
 138   void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);             /*!< I2S Rx Completed callback          */
 139   void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);         /*!< I2S Tx Half Completed callback     */
 140   void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);         /*!< I2S Rx Half Completed callback     */
 141   void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s);              /*!< I2S Error callback                 */
 142   void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s);            /*!< I2S Msp Init callback              */
 143   void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s);          /*!< I2S Msp DeInit callback            */
 144
 145 #endif  /* USE_HAL_I2S_REGISTER_CALLBACKS */
 146 } I2S_HandleTypeDef;
 147
 148 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
 149 /**
 150
 151   * @brief  HAL I2S Callback ID enumeration definition
 152   */
 153 typedef enum
 154 {
 155   HAL_I2S_TX_COMPLETE_CB_ID             = 0x00UL,    /*!< I2S Tx Completed callback ID         */
 156   HAL_I2S_RX_COMPLETE_CB_ID             = 0x01UL,    /*!< I2S Rx Completed callback ID         */
 157   HAL_I2S_TX_HALF_COMPLETE_CB_ID        = 0x03UL,    /*!< I2S Tx Half Completed callback ID    */
 158   HAL_I2S_RX_HALF_COMPLETE_CB_ID        = 0x04UL,    /*!< I2S Rx Half Completed callback ID    */
 159   HAL_I2S_ERROR_CB_ID                   = 0x06UL,    /*!< I2S Error callback ID                */
 160   HAL_I2S_MSPINIT_CB_ID                 = 0x07UL,    /*!< I2S Msp Init callback ID             */
 161   HAL_I2S_MSPDEINIT_CB_ID               = 0x08UL     /*!< I2S Msp DeInit callback ID           */
 162
 163 } HAL_I2S_CallbackIDTypeDef;
 164
 165 /**
 166   * @brief  HAL I2S Callback pointer definition
 167   */
 168 typedef  void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
 169
 170 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
 171 /**
 172   * @}
 173   */
 174
 175 /* Exported constants --------------------------------------------------------*/
 176 /** @defgroup I2S_Exported_Constants I2S Exported Constants
 177   * @{
 178   */
 179 /** @defgroup I2S_Error I2S Error
 180   * @{
 181   */
 182 #define HAL_I2S_ERROR_NONE               (0x00000000UL)  /*!< No error                          */
 183 #define HAL_I2S_ERROR_TIMEOUT            (0x00000001UL)  /*!< Timeout error                     */
 184 #define HAL_I2S_ERROR_OVR                (0x00000002UL)  /*!< OVR error                         */
 185 #define HAL_I2S_ERROR_UDR                (0x00000004UL)  /*!< UDR error                         */
 186 #define HAL_I2S_ERROR_DMA                (0x00000008UL)  /*!< DMA transfer error                */
 187 #define HAL_I2S_ERROR_PRESCALER          (0x00000010UL)  /*!< Prescaler Calculation error       */
 188 #define HAL_I2S_ERROR_FRE                (0x00000020UL)  /*!< FRE error                         */
 189 #define HAL_I2S_ERROR_NO_OGT             (0x00000040UL)  /*!< No On Going Transfer error        */
 190 #define HAL_I2S_ERROR_NOT_SUPPORTED      (0x00000080UL)  /*!< Requested operation not supported */
 191 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
 192 #define HAL_I2S_ERROR_INVALID_CALLBACK   (0x00000100UL)  /*!< Invalid Callback error      */
 193 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
 194 /**
 195   * @}
 196   */
 197
 198 /** @defgroup I2S_Mode I2S Mode
 199   * @{
 200   */
 201 #define I2S_MODE_SLAVE_TX                (0x00000000UL)
 202 #define I2S_MODE_SLAVE_RX                (SPI_I2SCFGR_I2SCFG_0)
 203 #define I2S_MODE_MASTER_TX               (SPI_I2SCFGR_I2SCFG_1)
 204 #define I2S_MODE_MASTER_RX               (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1)
 205 #define I2S_MODE_SLAVE_FULLDUPLEX        (SPI_I2SCFGR_I2SCFG_2)
 206 #define I2S_MODE_MASTER_FULLDUPLEX       (SPI_I2SCFGR_I2SCFG_2 | SPI_I2SCFGR_I2SCFG_0)
 207 /**
 208   * @}
 209   */
 210
 211 /** @defgroup I2S_Standard I2S Standard
 212   * @{
 213   */
 214 #define I2S_STANDARD_PHILIPS             (0x00000000UL)
 215 #define I2S_STANDARD_MSB                 (SPI_I2SCFGR_I2SSTD_0)
 216 #define I2S_STANDARD_LSB                 (SPI_I2SCFGR_I2SSTD_1)
 217 #define I2S_STANDARD_PCM_SHORT           (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)
 218 #define I2S_STANDARD_PCM_LONG            (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC)
 219 /**
 220   * @}
 221   */
 222
 223 /** @defgroup I2S_Data_Format I2S Data Format
 224   * @{
 225   */
 226 #define I2S_DATAFORMAT_16B               (0x00000000UL)
 227 #define I2S_DATAFORMAT_16B_EXTENDED      (SPI_I2SCFGR_CHLEN)
 228 #define I2S_DATAFORMAT_24B               (SPI_I2SCFGR_DATLEN_0)
 229 #define I2S_DATAFORMAT_32B               (SPI_I2SCFGR_DATLEN_1)
 230 /**
 231   * @}
 232   */
 233
 234 /** @defgroup I2S_MCLK_Output I2S MCLK Output
 235   * @{
 236   */
 237 #define I2S_MCLKOUTPUT_ENABLE            (SPI_I2SCFGR_MCKOE)
 238 #define I2S_MCLKOUTPUT_DISABLE           (0x00000000UL)
 239 /**
 240   * @}
 241   */
 242
 243 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
 244   * @{
 245   */
 246 #define I2S_AUDIOFREQ_192K               (192000UL)
 247 #define I2S_AUDIOFREQ_96K                (96000UL)
 248 #define I2S_AUDIOFREQ_48K                (48000UL)
 249 #define I2S_AUDIOFREQ_44K                (44100UL)
 250 #define I2S_AUDIOFREQ_32K                (32000UL)
 251 #define I2S_AUDIOFREQ_22K                (22050UL)
 252 #define I2S_AUDIOFREQ_16K                (16000UL)
 253 #define I2S_AUDIOFREQ_11K                (11025UL)
 254 #define I2S_AUDIOFREQ_8K                 (8000UL)
 255 #define I2S_AUDIOFREQ_DEFAULT            (2UL)
 256 /**
 257   * @}
 258   */
 259
 260 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
 261   * @{
 262   */
 263 #define I2S_CPOL_LOW                     (0x00000000UL)
 264 #define I2S_CPOL_HIGH                    (SPI_I2SCFGR_CKPOL)
 265 /**
 266   * @}
 267   */
 268
 269 /** @defgroup I2S_MSB_LSB_Transmission I2S MSB LSB Transmission
 270   * @{
 271   */
 272 #define I2S_FIRSTBIT_MSB                 (0x00000000UL)
 273 #define I2S_FIRSTBIT_LSB                 SPI_CFG2_LSBFRST
 274 /**
 275   * @}
 276   */
 277
 278 /** @defgroup I2S_WSInversion I2S Word Select Inversion
 279   * @{
 280   */
 281 #define I2S_WS_INVERSION_DISABLE         (0x00000000UL)
 282 #define I2S_WS_INVERSION_ENABLE          SPI_I2SCFGR_WSINV
 283 /**
 284   * @}
 285   */
 286
 287 /** @defgroup I2S_Data_24Bit_Alignment Data Padding 24Bit
 288   * @{
 289   */
 290 #define I2S_DATA_24BIT_ALIGNMENT_RIGHT   (0x00000000UL)
 291 #define I2S_DATA_24BIT_ALIGNMENT_LEFT    SPI_I2SCFGR_DATFMT
 292 /**
 293   * @}
 294   */
 295
 296 /** @defgroup I2S_Master_Keep_IO_State Keep IO State
 297   * @{
 298   */
 299 #define I2S_MASTER_KEEP_IO_STATE_DISABLE (0x00000000U)
 300 #define I2S_MASTER_KEEP_IO_STATE_ENABLE  SPI_CFG2_AFCNTR
 301 /**
 302   * @}
 303   */
 304
 305 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
 306   * @{
 307   */
 308 #define I2S_IT_RXP                       SPI_IER_RXPIE
 309 #define I2S_IT_TXP                       SPI_IER_TXPIE
 310 #define I2S_IT_UDR                       SPI_IER_UDRIE
 311 #define I2S_IT_OVR                       SPI_IER_OVRIE
 312 #define I2S_IT_FRE                       SPI_IER_TIFREIE
 313 #define I2S_IT_ERR                       (SPI_IER_UDRIE | SPI_IER_OVRIE | SPI_IER_TIFREIE)
 314 /**
 315   * @}
 316   */
 317
 318 /** @defgroup I2S_Flags_Definition I2S Flags Definition
 319   * @{
 320   */
 321 #define I2S_FLAG_RXP                     SPI_SR_RXP       /* I2S status flag : Rx-Packet available flag                 */
 322 #define I2S_FLAG_TXP                     SPI_SR_TXP       /* I2S status flag : Tx-Packet space available flag           */
 323 #define I2S_FLAG_UDR                     SPI_SR_UDR       /* I2S Error flag  : Underrun flag                            */
 324 #define I2S_FLAG_OVR                     SPI_SR_OVR       /* I2S Error flag  : Overrun flag                             */
 325 #define I2S_FLAG_FRE                     SPI_SR_TIFRE     /* I2S Error flag  : TI mode frame format error flag          */
 326
 327 #define I2S_FLAG_MASK                    (SPI_SR_RXP | SPI_SR_TXP | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_TIFRE)
 328 /**
 329   * @}
 330   */
 331
 332 /**
 333   * @}
 334   */
 335
 336 /* Exported macros -----------------------------------------------------------*/
 337 /** @defgroup I2S_Exported_macros I2S Exported Macros
 338   * @{
 339   */
 340
 341 /** @brief  Reset I2S handle state
 342   * @param  __HANDLE__ specifies the I2S Handle.
 343   * @retval None
 344   */
 345 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
 346 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__)                do{                                                  \
 347                                                                     (__HANDLE__)->State = HAL_I2S_STATE_RESET;       \
 348                                                                     (__HANDLE__)->MspInitCallback = NULL;            \
 349                                                                     (__HANDLE__)->MspDeInitCallback = NULL;          \
 350                                                                   } while(0)
 351 #else
 352 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
 353 #endif
 354
 355 /** @brief  Enable the specified SPI peripheral (in I2S mode).
 356   * @param  __HANDLE__ specifies the I2S Handle.
 357   * @retval None
 358   */
 359 #define __HAL_I2S_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE))
 360
 361 /** @brief  Disable the specified SPI peripheral (in I2S mode).
 362   * @param  __HANDLE__ specifies the I2S Handle.
 363   * @retval None
 364   */
 365 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE))
 366
 367 /** @brief  Enable the specified I2S interrupts.
 368   * @param  __HANDLE__ specifies the I2S Handle.
 369   *        This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
 370   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
 371   *         This parameter can be one of the following values:
 372   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
 373   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
 374   *            @arg I2S_IT_UDR : Underrun interrupt
 375   *            @arg I2S_IT_OVR : Overrun interrupt
 376   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
 377   *            @arg I2S_IT_ERR : Error interrupt enable
 378   * @retval None
 379   */
 380 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__)    ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
 381
 382 /** @brief  Disable the specified I2S interrupts.
 383   * @param  __HANDLE__ specifies the I2S Handle.
 384   *         This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
 385   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
 386   *         This parameter can be one of the following values:
 387   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
 388   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
 389   *            @arg I2S_IT_UDR : Underrun interrupt
 390   *            @arg I2S_IT_OVR : Overrun interrupt
 391   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
 392   *            @arg I2S_IT_ERR : Error interrupt enable
 393   * @retval None
 394   */
 395 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
 396
 397 /** @brief  Check if the specified I2S interrupt source is enabled or disabled.
 398   * @param  __HANDLE__ specifies the I2S Handle.
 399   *         This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
 400   * @param  __INTERRUPT__ specifies the I2S interrupt source to check.
 401   *          This parameter can be one of the following values:
 402   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
 403   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
 404   *            @arg I2S_IT_UDR : Underrun interrupt
 405   *            @arg I2S_IT_OVR : Overrun interrupt
 406   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
 407   *            @arg I2S_IT_ERR : Error interrupt enable
 408   * @retval The new state of __IT__ (TRUE or FALSE).
 409   */
 410 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 411
 412 /** @brief  Check whether the specified I2S flag is set or not.
 413   * @param  __HANDLE__ specifies the I2S Handle.
 414   *         This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral.
 415   * @param  __FLAG__ specifies the flag to check.
 416   *         This parameter can be one of the following values:
 417   *            @arg I2S_FLAG_RXP : Rx-Packet available flag
 418   *            @arg I2S_FLAG_TXP : Tx-Packet space available flag
 419   *            @arg I2S_FLAG_UDR : Underrun flag
 420   *            @arg I2S_FLAG_OVR : Overrun flag
 421   *            @arg I2S_FLAG_FRE : TI mode frame format error flag
 422   * @retval The new state of __FLAG__ (TRUE or FALSE).
 423   */
 424 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 425
 426 /** @brief Clear the I2S OVR pending flag.
 427   * @param  __HANDLE__ specifies the I2S Handle.
 428   * @retval None
 429   */
 430 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_OVRC)
 431
 432 /** @brief Clear the I2S UDR pending flag.
 433   * @param  __HANDLE__ specifies the I2S Handle.
 434   * @retval None
 435   */
 436 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_UDRC)
 437
 438 /** @brief  Clear the I2S FRE pending flag.
 439   * @param  __HANDLE__: specifies the I2S Handle.
 440   * @retval None
 441   */
 442 #define __HAL_I2S_CLEAR_TIFREFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_TIFREC)
 443
 444 /**
 445   * @}
 446   */
 447
 448 /* Exported functions --------------------------------------------------------*/
 449 /** @addtogroup I2S_Exported_Functions
 450   * @{
 451   */
 452
 453 /** @addtogroup I2S_Exported_Functions_Group1
 454   * @{
 455   */
 456 /* Initialization/de-initialization functions  ********************************/
 457 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
 458 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
 459 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
 460 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
 461
 462 /* Callbacks Register/UnRegister functions  ***********************************/
 463 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL)
 464 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, pI2S_CallbackTypeDef pCallback);
 465 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
 466 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
 467 /**
 468   * @}
 469   */
 470
 471 /** @addtogroup I2S_Exported_Functions_Group2
 472   * @{
 473   */
 474 /* I/O operation functions  ***************************************************/
 475 /* Blocking mode: Polling */
 476 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
 477 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
 478
 479 /* Non-Blocking mode: Interrupt */
 480 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 481 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 482 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
 483
 484 /* Non-Blocking mode: DMA */
 485 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 486 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 487
 488 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
 489 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
 490 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
 491
 492 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
 493 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
 494 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
 495 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
 496 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
 497 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
 498 /**
 499   * @}
 500   */
 501
 502 /** @addtogroup I2S_Exported_Functions_Group3
 503   * @{
 504   */
 505 /* Peripheral Control and State functions  ************************************/
 506 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
 507 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
 508 /**
 509   * @}
 510   */
 511
 512 /**
 513   * @}
 514   */
 515
 516 /* Private types -------------------------------------------------------------*/
 517 /* Private variables ---------------------------------------------------------*/
 518 /* Private constants ---------------------------------------------------------*/
 519 /** @defgroup I2S_Private_Constants I2S Private Constants
 520   * @{
 521   */
 522
 523 /**
 524   * @}
 525   */
 526
 527 /* Private macros ------------------------------------------------------------*/
 528 /** @defgroup I2S_Private_Macros I2S Private Macros
 529   * @{
 530   */
 531
 532 /** @brief  Check whether the specified SPI flag is set or not.
 533   * @param  __SR__  copy of I2S SR register.
 534   * @param  __FLAG__ specifies the flag to check.
 535   *         This parameter can be one of the following values:
 536   *            @arg I2S_FLAG_RXP : Rx-Packet available flag
 537   *            @arg I2S_FLAG_TXP : Tx-Packet space available flag
 538   *            @arg I2S_FLAG_UDR : Underrun flag
 539   *            @arg I2S_FLAG_OVR : Overrun flag
 540   *            @arg I2S_FLAG_FRE : TI mode frame format error flag
 541   * @retval SET or RESET.
 542   */
 543 #define I2S_CHECK_FLAG(__SR__, __FLAG__)         ((((__SR__) & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
 544
 545 /** @brief  Check whether the specified SPI Interrupt is set or not.
 546   * @param  __IER__  copy of I2S IER register.
 547   * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
 548   *         This parameter can be one of the following values:
 549   *            @arg I2S_IT_RXP : Rx-Packet available interrupt
 550   *            @arg I2S_IT_TXP : Tx-Packet space available interrupt
 551   *            @arg I2S_IT_UDR : Underrun interrupt
 552   *            @arg I2S_IT_OVR : Overrun interrupt
 553   *            @arg I2S_IT_FRE : TI mode frame format error interrupt
 554   *            @arg I2S_IT_ERR : Error interrupt enable
 555   * @retval SET or RESET.
 556   */
 557 #define I2S_CHECK_IT_SOURCE(__IER__, __INTERRUPT__)      ((((__IER__) & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 558
 559 /** @brief  Checks if I2S Mode parameter is in allowed range.
 560   * @param  __MODE__ specifies the I2S Mode.
 561   *         This parameter can be a value of @ref I2S_Mode
 562   * @retval None
 563   */
 564 #define IS_I2S_MODE(__MODE__)                       (((__MODE__) == I2S_MODE_SLAVE_TX)                   || \
 565                                                      ((__MODE__) == I2S_MODE_SLAVE_RX)                   || \
 566                                                      ((__MODE__) == I2S_MODE_MASTER_TX)                  || \
 567                                                      ((__MODE__) == I2S_MODE_MASTER_RX)                  || \
 568                                                      ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)           || \
 569                                                      ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
 570
 571 #define IS_I2S_MASTER(__MODE__)                     (((__MODE__) == I2S_MODE_MASTER_TX)                  || \
 572                                                      ((__MODE__) == I2S_MODE_MASTER_RX)                  || \
 573                                                      ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
 574
 575 #define IS_I2S_SLAVE(__MODE__)                      (((__MODE__) == I2S_MODE_SLAVE_TX)                  || \
 576                                                      ((__MODE__) == I2S_MODE_SLAVE_RX)                  || \
 577                                                      ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX))
 578
 579 #define IS_I2S_STANDARD(__STANDARD__)               (((__STANDARD__) == I2S_STANDARD_PHILIPS)            || \
 580                                                      ((__STANDARD__) == I2S_STANDARD_MSB)                || \
 581                                                      ((__STANDARD__) == I2S_STANDARD_LSB)                || \
 582                                                      ((__STANDARD__) == I2S_STANDARD_PCM_SHORT)          || \
 583                                                      ((__STANDARD__) == I2S_STANDARD_PCM_LONG))
 584
 585 #define IS_I2S_DATA_FORMAT(__FORMAT__)              (((__FORMAT__) == I2S_DATAFORMAT_16B)                || \
 586                                                      ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED)       || \
 587                                                      ((__FORMAT__) == I2S_DATAFORMAT_24B)                || \
 588                                                      ((__FORMAT__) == I2S_DATAFORMAT_32B))
 589
 590 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__)              (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE)             || \
 591                                                      ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
 592
 593 #define IS_I2S_AUDIO_FREQ(__FREQ__)                ((((__FREQ__) >= I2S_AUDIOFREQ_8K)                    && \
 594                                                      ((__FREQ__) <= I2S_AUDIOFREQ_192K))                 || \
 595                                                      ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
 596
 597 #define IS_I2S_CPOL(__CPOL__)                       (((__CPOL__) == I2S_CPOL_LOW)                        || \
 598                                                      ((__CPOL__) == I2S_CPOL_HIGH))
 599
 600 #define IS_I2S_FIRST_BIT(__BIT__)                   (((__BIT__) == I2S_FIRSTBIT_MSB)                     || \
 601                                                      ((__BIT__) == I2S_FIRSTBIT_LSB))
 602
 603 #define IS_I2S_WS_INVERSION(__WSINV__)              (((__WSINV__) == I2S_WS_INVERSION_DISABLE)           || \
 604                                                      ((__WSINV__) == I2S_WS_INVERSION_ENABLE))
 605
 606 #define IS_I2S_DATA_24BIT_ALIGNMENT(__ALIGNMENT__)  (((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_RIGHT) || \
 607                                                      ((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_LEFT))
 608
 609 #define IS_I2S_MASTER_KEEP_IO_STATE(__AFCNTR__)     (((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_DISABLE)  || \
 610                                                      ((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_ENABLE))
 611
 612
 613 /**
 614   * @}
 615   */
 616
 617 /**
 618   * @}
 619   */
 620
 621 /**
 622   * @}
 623   */
 624
 625 #ifdef __cplusplus
 626 }
 627 #endif
 628
 629 #endif /* STM32H7xx_HAL_I2S_H */
 630
 631 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/