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Merge maintenance-8.x.x fixes into master
[inav.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_uart.h
blob5f0db2205579c977cfaf406cd3b83c60585c36a6
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_uart.h
4 * @author MCD Application Team
5 * @brief Header file of UART HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H7xx_HAL_UART_H
21 #define STM32H7xx_HAL_UART_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h7xx_hal_def.h"
29
30 /** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33
34 /** @addtogroup UART
35 * @{
36 */
37
38 /* Exported types ------------------------------------------------------------*/
39 /** @defgroup UART_Exported_Types UART Exported Types
40 * @{
41 */
42
43 /**
44 * @brief UART Init Structure definition
45 */
46 typedef struct
47 {
48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
49 The baud rate register is computed using the following formula:
50 LPUART:
51 =======
52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler
54 UART:
55 =====
56 - If oversampling is 16 or in LIN mode,
57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
58 - If oversampling is 8,
59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) /
60 ((huart->Init.BaudRate)))[15:4]
61 Baud Rate Register[3] = 0
62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) /
63 ((huart->Init.BaudRate)))[3:0]) >> 1
64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */
65
66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
67 This parameter can be a value of @ref UARTEx_Word_Length. */
68
69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
70 This parameter can be a value of @ref UART_Stop_Bits. */
71
72 uint32_t Parity; /*!< Specifies the parity mode.
73 This parameter can be a value of @ref UART_Parity
74 @note When parity is enabled, the computed parity is inserted
75 at the MSB position of the transmitted data (9th bit when
76 the word length is set to 9 data bits; 8th bit when the
77 word length is set to 8 data bits). */
78
79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
80 This parameter can be a value of @ref UART_Mode. */
81
82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
83 or disabled.
84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
85
86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled,
87 to achieve higher speed (up to f_PCLK/8).
88 This parameter can be a value of @ref UART_Over_Sampling. */
89
90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
91 Selecting the single sample method increases the receiver tolerance to clock
92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
93
94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source.
95 This parameter can be a value of @ref UART_ClockPrescaler. */
96
97 } UART_InitTypeDef;
98
99 /**
100 * @brief UART Advanced Features initialization structure definition
101 */
102 typedef struct
103 {
104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
105 Advanced Features may be initialized at the same time .
106 This parameter can be a value of
107 @ref UART_Advanced_Features_Initialization_Type. */
108
109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
110 This parameter can be a value of @ref UART_Tx_Inv. */
111
112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
113 This parameter can be a value of @ref UART_Rx_Inv. */
114
115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
116 vs negative/inverted logic).
117 This parameter can be a value of @ref UART_Data_Inv. */
118
119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
121
122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
123 This parameter can be a value of @ref UART_Overrun_Disable. */
124
125 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
126 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
127
128 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
129 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */
130
131 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
132 detection is carried out.
133 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
134
135 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
136 This parameter can be a value of @ref UART_MSB_First. */
137 } UART_AdvFeatureInitTypeDef;
138
139 /**
140 * @brief HAL UART State definition
141 * @note HAL UART State value is a combination of 2 different substates:
142 * gState and RxState (see @ref UART_State_Definition).
143 * - gState contains UART state information related to global Handle management
144 * and also information related to Tx operations.
145 * gState value coding follow below described bitmap :
146 * b7-b6 Error information
147 * 00 : No Error
148 * 01 : (Not Used)
149 * 10 : Timeout
150 * 11 : Error
151 * b5 Peripheral initialization status
152 * 0 : Reset (Peripheral not initialized)
153 * 1 : Init done (Peripheral initialized. HAL UART Init function already called)
154 * b4-b3 (not used)
155 * xx : Should be set to 00
156 * b2 Intrinsic process state
157 * 0 : Ready
158 * 1 : Busy (Peripheral busy with some configuration or internal operations)
159 * b1 (not used)
160 * x : Should be set to 0
161 * b0 Tx state
162 * 0 : Ready (no Tx operation ongoing)
163 * 1 : Busy (Tx operation ongoing)
164 * - RxState contains information related to Rx operations.
165 * RxState value coding follow below described bitmap :
166 * b7-b6 (not used)
167 * xx : Should be set to 00
168 * b5 Peripheral initialization status
169 * 0 : Reset (Peripheral not initialized)
170 * 1 : Init done (Peripheral initialized)
171 * b4-b2 (not used)
172 * xxx : Should be set to 000
173 * b1 Rx state
174 * 0 : Ready (no Rx operation ongoing)
175 * 1 : Busy (Rx operation ongoing)
176 * b0 (not used)
177 * x : Should be set to 0.
178 */
179 typedef uint32_t HAL_UART_StateTypeDef;
180
181 /**
182 * @brief UART clock sources definition
183 */
184 typedef enum
185 {
186 UART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */
187 UART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */
188 UART_CLOCKSOURCE_D3PCLK1 = 0x02U, /*!< Domain3 PCLK1 clock source */
189 UART_CLOCKSOURCE_PLL2 = 0x04U, /*!< PLL2Q clock source */
190 UART_CLOCKSOURCE_PLL3 = 0x08U, /*!< PLL3Q clock source */
191 UART_CLOCKSOURCE_HSI = 0x10U, /*!< HSI clock source */
192 UART_CLOCKSOURCE_CSI = 0x20U, /*!< CSI clock source */
193 UART_CLOCKSOURCE_LSE = 0x40U, /*!< LSE clock source */
194 UART_CLOCKSOURCE_UNDEFINED = 0x80U /*!< Undefined clock source */
195 } UART_ClockSourceTypeDef;
196
197 /**
198 * @brief HAL UART Reception type definition
199 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
200 * This parameter can be a value of @ref UART_Reception_Type_Values :
201 * HAL_UART_RECEPTION_STANDARD = 0x00U,
202 * HAL_UART_RECEPTION_TOIDLE = 0x01U,
203 * HAL_UART_RECEPTION_TORTO = 0x02U,
204 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U,
205 */
206 typedef uint32_t HAL_UART_RxTypeTypeDef;
207
208 /**
209 * @brief HAL UART Rx Event type definition
210 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred
211 * leading to call of the RxEvent callback.
212 * This parameter can be a value of @ref UART_RxEvent_Type_Values :
213 * HAL_UART_RXEVENT_TC = 0x00U,
214 * HAL_UART_RXEVENT_HT = 0x01U,
215 * HAL_UART_RXEVENT_IDLE = 0x02U,
216 */
217 typedef uint32_t HAL_UART_RxEventTypeTypeDef;
218
219 /**
220 * @brief UART handle Structure definition
221 */
222 typedef struct __UART_HandleTypeDef
223 {
224 USART_TypeDef *Instance; /*!< UART registers base address */
225
226 UART_InitTypeDef Init; /*!< UART communication parameters */
227
228 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
229
230 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
231
232 uint16_t TxXferSize; /*!< UART Tx Transfer size */
233
234 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
235
236 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
237
238 uint16_t RxXferSize; /*!< UART Rx Transfer size */
239
240 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
241
242 uint16_t Mask; /*!< UART Rx RDR register mask */
243
244 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
245 This parameter can be a value of @ref UARTEx_FIFO_mode. */
246
247 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
248
249 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
250
251 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
252
253 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */
254
255 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
256
257 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
258
259 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
260
261 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
262
263 HAL_LockTypeDef Lock; /*!< Locking object */
264
265 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
266 and also related to Tx operations. This parameter
267 can be a value of @ref HAL_UART_StateTypeDef */
268
269 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This
270 parameter can be a value of @ref HAL_UART_StateTypeDef */
271
272 __IO uint32_t ErrorCode; /*!< UART Error code */
273
274 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
275 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
276 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
277 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
278 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
279 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
280 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
281 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
282 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
283 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
284 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */
285 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */
286 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */
287
288 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
289 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
290 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
291
292 } UART_HandleTypeDef;
293
294 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
295 /**
296 * @brief HAL UART Callback ID enumeration definition
297 */
298 typedef enum
299 {
300 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
301 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
302 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
303 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
304 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
305 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
306 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
307 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
308 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
309 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */
310 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */
311
312 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
313 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
314
315 } HAL_UART_CallbackIDTypeDef;
316
317 /**
318 * @brief HAL UART Callback pointer definition
319 */
320 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
321 typedef void (*pUART_RxEventCallbackTypeDef)
322 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */
323
324 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
325
326 /**
327 * @}
328 */
329
330 /* Exported constants --------------------------------------------------------*/
331 /** @defgroup UART_Exported_Constants UART Exported Constants
332 * @{
333 */
334
335 /** @defgroup UART_State_Definition UART State Code Definition
336 * @{
337 */
338 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized
339 Value is allowed for gState and RxState */
340 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use
341 Value is allowed for gState and RxState */
342 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing
343 Value is allowed for gState only */
344 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing
345 Value is allowed for gState only */
346 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing
347 Value is allowed for RxState only */
348 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing
349 Not to be used for neither gState nor RxState.Value is result
350 of combination (Or) between gState and RxState values */
351 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state
352 Value is allowed for gState only */
353 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error
354 Value is allowed for gState only */
355 /**
356 * @}
357 */
358
359 /** @defgroup UART_Error_Definition UART Error Definition
360 * @{
361 */
362 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */
363 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */
364 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */
365 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */
366 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */
367 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
368 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */
369
370 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
371 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */
372 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
373 /**
374 * @}
375 */
376
377 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
378 * @{
379 */
380 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
381 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */
382 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
383 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
384 /**
385 * @}
386 */
387
388 /** @defgroup UART_Parity UART Parity
389 * @{
390 */
391 #define UART_PARITY_NONE 0x00000000U /*!< No parity */
392 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
393 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
394 /**
395 * @}
396 */
397
398 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
399 * @{
400 */
401 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */
402 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */
403 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */
404 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */
405 /**
406 * @}
407 */
408
409 /** @defgroup UART_Mode UART Transfer Mode
410 * @{
411 */
412 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */
413 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */
414 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
415 /**
416 * @}
417 */
418
419 /** @defgroup UART_State UART State
420 * @{
421 */
422 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */
423 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */
424 /**
425 * @}
426 */
427
428 /** @defgroup UART_Over_Sampling UART Over Sampling
429 * @{
430 */
431 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
432 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
433 /**
434 * @}
435 */
436
437 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
438 * @{
439 */
440 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */
441 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */
442 /**
443 * @}
444 */
445
446 /** @defgroup UART_ClockPrescaler UART Clock Prescaler
447 * @{
448 */
449 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
450 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
451 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
452 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
453 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
454 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
455 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
456 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
457 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
458 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
459 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
460 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
461 /**
462 * @}
463 */
464
465 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
466 * @{
467 */
468 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection
469 on start bit */
470 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection
471 on falling edge */
472 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection
473 on 0x7F frame detection */
474 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection
475 on 0x55 frame detection */
476 /**
477 * @}
478 */
479
480 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout
481 * @{
482 */
483 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */
484 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */
485 /**
486 * @}
487 */
488
489 /** @defgroup UART_LIN UART Local Interconnection Network mode
490 * @{
491 */
492 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */
493 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */
494 /**
495 * @}
496 */
497
498 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
499 * @{
500 */
501 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */
502 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */
503 /**
504 * @}
505 */
506
507 /** @defgroup UART_DMA_Tx UART DMA Tx
508 * @{
509 */
510 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */
511 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */
512 /**
513 * @}
514 */
515
516 /** @defgroup UART_DMA_Rx UART DMA Rx
517 * @{
518 */
519 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */
520 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */
521 /**
522 * @}
523 */
524
525 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
526 * @{
527 */
528 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */
529 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */
530 /**
531 * @}
532 */
533
534 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
535 * @{
536 */
537 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */
538 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */
539 /**
540 * @}
541 */
542
543 /** @defgroup UART_Request_Parameters UART Request Parameters
544 * @{
545 */
546 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
547 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */
548 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */
549 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
550 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
551 /**
552 * @}
553 */
554
555 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
556 * @{
557 */
558 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
559 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
560 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
561 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
562 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
563 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
564 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
565 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */
566 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
567 /**
568 * @}
569 */
570
571 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
572 * @{
573 */
574 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */
575 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */
576 /**
577 * @}
578 */
579
580 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
581 * @{
582 */
583 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */
584 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */
585 /**
586 * @}
587 */
588
589 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
590 * @{
591 */
592 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */
593 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */
594 /**
595 * @}
596 */
597
598 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
599 * @{
600 */
601 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */
602 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */
603 /**
604 * @}
605 */
606
607 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
608 * @{
609 */
610 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */
611 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */
612 /**
613 * @}
614 */
615
616 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
617 * @{
618 */
619 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */
620 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */
621 /**
622 * @}
623 */
624
625 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
626 * @{
627 */
628 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */
629 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */
630 /**
631 * @}
632 */
633
634 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
635 * @{
636 */
637 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received
638 first disable */
639 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received
640 first enable */
641 /**
642 * @}
643 */
644
645 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
646 * @{
647 */
648 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */
649 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */
650 /**
651 * @}
652 */
653
654 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
655 * @{
656 */
657 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */
658 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */
659 /**
660 * @}
661 */
662
663 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
664 * @{
665 */
666 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */
667 /**
668 * @}
669 */
670
671 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
672 * @{
673 */
674 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */
675 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */
676 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register
677 not empty or RXFIFO is not empty */
678 /**
679 * @}
680 */
681
682 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
683 * @{
684 */
685 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */
686 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */
687 /**
688 * @}
689 */
690
691 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
692 * @{
693 */
694 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB
695 position in CR1 register */
696 /**
697 * @}
698 */
699
700 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
701 * @{
702 */
703 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB
704 position in CR1 register */
705 /**
706 * @}
707 */
708
709 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
710 * @{
711 */
712 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */
713 /**
714 * @}
715 */
716
717 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
718 * @{
719 */
720 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
721 /**
722 * @}
723 */
724
725 /** @defgroup UART_Flags UART Status Flags
726 * Elements values convention: 0xXXXX
727 * - 0xXXXX : Flag mask in the ISR register
728 * @{
729 */
730 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */
731 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */
732 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */
733 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */
734 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */
735 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */
736 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */
737 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */
738 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */
739 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */
740 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */
741 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */
742 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */
743 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */
744 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */
745 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */
746 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */
747 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */
748 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */
749 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */
750 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */
751 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */
752 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */
753 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */
754 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */
755 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */
756 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */
757 /**
758 * @}
759 */
760
761 /** @defgroup UART_Interrupt_definition UART Interrupts Definition
762 * Elements values convention: 000ZZZZZ0XXYYYYYb
763 * - YYYYY : Interrupt source position in the XX register (5bits)
764 * - XX : Interrupt source register (2bits)
765 * - 01: CR1 register
766 * - 10: CR2 register
767 * - 11: CR3 register
768 * - ZZZZZ : Flag position in the ISR register(5bits)
769 * Elements values convention: 000000000XXYYYYYb
770 * - YYYYY : Interrupt source position in the XX register (5bits)
771 * - XX : Interrupt source register (2bits)
772 * - 01: CR1 register
773 * - 10: CR2 register
774 * - 11: CR3 register
775 * Elements values convention: 0000ZZZZ00000000b
776 * - ZZZZ : Flag position in the ISR register(4bits)
777 * @{
778 */
779 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */
780 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */
781 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */
782 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */
783 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */
784 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */
785 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */
786 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */
787 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */
788 #define UART_IT_CM 0x112EU /*!< UART character match interruption */
789 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */
790 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */
791 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */
792 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */
793 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */
794 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */
795
796 #define UART_IT_ERR 0x0060U /*!< UART error interruption */
797
798 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */
799 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */
800 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */
801 /**
802 * @}
803 */
804
805 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
806 * @{
807 */
808 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
809 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
810 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
811 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
812 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
813 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */
814 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
815 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
816 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
817 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
818 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
819 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */
820 /**
821 * @}
822 */
823
824 /** @defgroup UART_Reception_Type_Values UART Reception type values
825 * @{
826 */
827 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
828 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */
829 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */
830 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */
831 /**
832 * @}
833 */
834
835 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values
836 * @{
837 */
838 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */
839 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */
840 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */
841 /**
842 * @}
843 */
844
845 /**
846 * @}
847 */
848
849 /* Exported macros -----------------------------------------------------------*/
850 /** @defgroup UART_Exported_Macros UART Exported Macros
851 * @{
852 */
853
854 /** @brief Reset UART handle states.
855 * @param __HANDLE__ UART handle.
856 * @retval None
857 */
858 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
859 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
860 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
861 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
862 (__HANDLE__)->MspInitCallback = NULL; \
863 (__HANDLE__)->MspDeInitCallback = NULL; \
864 } while(0U)
865 #else
866 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
867 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
868 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
869 } while(0U)
870 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */
871
872 /** @brief Flush the UART Data registers.
873 * @param __HANDLE__ specifies the UART Handle.
874 * @retval None
875 */
876 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
877 do{ \
878 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
879 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
880 } while(0U)
881
882 /** @brief Clear the specified UART pending flag.
883 * @param __HANDLE__ specifies the UART Handle.
884 * @param __FLAG__ specifies the flag to check.
885 * This parameter can be any combination of the following values:
886 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
887 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
888 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
889 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
890 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
891 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag
892 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
893 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag
894 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
895 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
896 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
897 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
898 * @retval None
899 */
900 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
901
902 /** @brief Clear the UART PE pending flag.
903 * @param __HANDLE__ specifies the UART Handle.
904 * @retval None
905 */
906 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
907
908 /** @brief Clear the UART FE pending flag.
909 * @param __HANDLE__ specifies the UART Handle.
910 * @retval None
911 */
912 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
913
914 /** @brief Clear the UART NE pending flag.
915 * @param __HANDLE__ specifies the UART Handle.
916 * @retval None
917 */
918 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
919
920 /** @brief Clear the UART ORE pending flag.
921 * @param __HANDLE__ specifies the UART Handle.
922 * @retval None
923 */
924 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
925
926 /** @brief Clear the UART IDLE pending flag.
927 * @param __HANDLE__ specifies the UART Handle.
928 * @retval None
929 */
930 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
931
932 /** @brief Clear the UART TX FIFO empty clear flag.
933 * @param __HANDLE__ specifies the UART Handle.
934 * @retval None
935 */
936 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
937
938 /** @brief Check whether the specified UART flag is set or not.
939 * @param __HANDLE__ specifies the UART Handle.
940 * @param __FLAG__ specifies the flag to check.
941 * This parameter can be one of the following values:
942 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag
943 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag
944 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag
945 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag
946 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
947 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
948 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
949 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
950 * @arg @ref UART_FLAG_SBKF Send Break flag
951 * @arg @ref UART_FLAG_CMF Character match flag
952 * @arg @ref UART_FLAG_BUSY Busy flag
953 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
954 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
955 * @arg @ref UART_FLAG_CTS CTS Change flag
956 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
957 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
958 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
959 * @arg @ref UART_FLAG_TC Transmission Complete flag
960 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
961 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
962 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag
963 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
964 * @arg @ref UART_FLAG_ORE Overrun Error flag
965 * @arg @ref UART_FLAG_NE Noise Error flag
966 * @arg @ref UART_FLAG_FE Framing Error flag
967 * @arg @ref UART_FLAG_PE Parity Error flag
968 * @retval The new state of __FLAG__ (TRUE or FALSE).
969 */
970 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
971
972 /** @brief Enable the specified UART interrupt.
973 * @param __HANDLE__ specifies the UART Handle.
974 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
975 * This parameter can be one of the following values:
976 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
977 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
978 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
979 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
980 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
981 * @arg @ref UART_IT_CM Character match interrupt
982 * @arg @ref UART_IT_CTS CTS change interrupt
983 * @arg @ref UART_IT_LBD LIN Break detection interrupt
984 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
985 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
986 * @arg @ref UART_IT_TC Transmission complete interrupt
987 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
988 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
989 * @arg @ref UART_IT_RTO Receive Timeout interrupt
990 * @arg @ref UART_IT_IDLE Idle line detection interrupt
991 * @arg @ref UART_IT_PE Parity Error interrupt
992 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error)
993 * @retval None
994 */
995 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\
996 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\
997 ((__HANDLE__)->Instance->CR1 |= (1U <<\
998 ((__INTERRUPT__) & UART_IT_MASK))): \
999 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\
1000 ((__HANDLE__)->Instance->CR2 |= (1U <<\
1001 ((__INTERRUPT__) & UART_IT_MASK))): \
1002 ((__HANDLE__)->Instance->CR3 |= (1U <<\
1003 ((__INTERRUPT__) & UART_IT_MASK))))
1004
1005 /** @brief Disable the specified UART interrupt.
1006 * @param __HANDLE__ specifies the UART Handle.
1007 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
1008 * This parameter can be one of the following values:
1009 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
1010 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
1011 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
1012 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
1013 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
1014 * @arg @ref UART_IT_CM Character match interrupt
1015 * @arg @ref UART_IT_CTS CTS change interrupt
1016 * @arg @ref UART_IT_LBD LIN Break detection interrupt
1017 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
1018 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1019 * @arg @ref UART_IT_TC Transmission complete interrupt
1020 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
1021 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1022 * @arg @ref UART_IT_RTO Receive Timeout interrupt
1023 * @arg @ref UART_IT_IDLE Idle line detection interrupt
1024 * @arg @ref UART_IT_PE Parity Error interrupt
1025 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1026 * @retval None
1027 */
1028 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\
1029 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\
1030 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\
1031 ((__INTERRUPT__) & UART_IT_MASK))): \
1032 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\
1033 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\
1034 ((__INTERRUPT__) & UART_IT_MASK))): \
1035 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\
1036 ((__INTERRUPT__) & UART_IT_MASK))))
1037
1038 /** @brief Check whether the specified UART interrupt has occurred or not.
1039 * @param __HANDLE__ specifies the UART Handle.
1040 * @param __INTERRUPT__ specifies the UART interrupt to check.
1041 * This parameter can be one of the following values:
1042 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
1043 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
1044 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
1045 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
1046 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
1047 * @arg @ref UART_IT_CM Character match interrupt
1048 * @arg @ref UART_IT_CTS CTS change interrupt
1049 * @arg @ref UART_IT_LBD LIN Break detection interrupt
1050 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
1051 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1052 * @arg @ref UART_IT_TC Transmission complete interrupt
1053 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
1054 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1055 * @arg @ref UART_IT_RTO Receive Timeout interrupt
1056 * @arg @ref UART_IT_IDLE Idle line detection interrupt
1057 * @arg @ref UART_IT_PE Parity Error interrupt
1058 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1059 * @retval The new state of __INTERRUPT__ (SET or RESET).
1060 */
1061 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
1062 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
1063
1064 /** @brief Check whether the specified UART interrupt source is enabled or not.
1065 * @param __HANDLE__ specifies the UART Handle.
1066 * @param __INTERRUPT__ specifies the UART interrupt source to check.
1067 * This parameter can be one of the following values:
1068 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
1069 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
1070 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
1071 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
1072 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
1073 * @arg @ref UART_IT_CM Character match interrupt
1074 * @arg @ref UART_IT_CTS CTS change interrupt
1075 * @arg @ref UART_IT_LBD LIN Break detection interrupt
1076 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
1077 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1078 * @arg @ref UART_IT_TC Transmission complete interrupt
1079 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
1080 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1081 * @arg @ref UART_IT_RTO Receive Timeout interrupt
1082 * @arg @ref UART_IT_IDLE Idle line detection interrupt
1083 * @arg @ref UART_IT_PE Parity Error interrupt
1084 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1085 * @retval The new state of __INTERRUPT__ (SET or RESET).
1086 */
1087 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\
1088 (__HANDLE__)->Instance->CR1 : \
1089 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\
1090 (__HANDLE__)->Instance->CR2 : \
1091 (__HANDLE__)->Instance->CR3)) & (1U <<\
1092 (((uint16_t)(__INTERRUPT__)) &\
1093 UART_IT_MASK))) != RESET) ? SET : RESET)
1094
1095 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
1096 * @param __HANDLE__ specifies the UART Handle.
1097 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
1098 * to clear the corresponding interrupt
1099 * This parameter can be one of the following values:
1100 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
1101 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
1102 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
1103 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
1104 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
1105 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag
1106 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
1107 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
1108 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
1109 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
1110 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
1111 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
1112 * @retval None
1113 */
1114 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
1115
1116 /** @brief Set a specific UART request flag.
1117 * @param __HANDLE__ specifies the UART Handle.
1118 * @param __REQ__ specifies the request flag to set
1119 * This parameter can be one of the following values:
1120 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
1121 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
1122 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
1123 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
1124 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
1125 * @retval None
1126 */
1127 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
1128
1129 /** @brief Enable the UART one bit sample method.
1130 * @param __HANDLE__ specifies the UART Handle.
1131 * @retval None
1132 */
1133 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
1134
1135 /** @brief Disable the UART one bit sample method.
1136 * @param __HANDLE__ specifies the UART Handle.
1137 * @retval None
1138 */
1139 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
1140
1141 /** @brief Enable UART.
1142 * @param __HANDLE__ specifies the UART Handle.
1143 * @retval None
1144 */
1145 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
1146
1147 /** @brief Disable UART.
1148 * @param __HANDLE__ specifies the UART Handle.
1149 * @retval None
1150 */
1151 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
1152
1153 /** @brief Enable CTS flow control.
1154 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
1155 * without need to call HAL_UART_Init() function.
1156 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1157 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1158 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1159 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1160 * - macro could only be called when corresponding UART instance is disabled
1161 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1162 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1163 * @param __HANDLE__ specifies the UART Handle.
1164 * @retval None
1165 */
1166 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
1167 do{ \
1168 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1169 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
1170 } while(0U)
1171
1172 /** @brief Disable CTS flow control.
1173 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
1174 * without need to call HAL_UART_Init() function.
1175 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1176 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1177 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1178 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1179 * - macro could only be called when corresponding UART instance is disabled
1180 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1181 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1182 * @param __HANDLE__ specifies the UART Handle.
1183 * @retval None
1184 */
1185 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
1186 do{ \
1187 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1188 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
1189 } while(0U)
1190
1191 /** @brief Enable RTS flow control.
1192 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
1193 * without need to call HAL_UART_Init() function.
1194 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1195 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1196 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1197 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1198 * - macro could only be called when corresponding UART instance is disabled
1199 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1200 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1201 * @param __HANDLE__ specifies the UART Handle.
1202 * @retval None
1203 */
1204 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
1205 do{ \
1206 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1207 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
1208 } while(0U)
1209
1210 /** @brief Disable RTS flow control.
1211 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
1212 * without need to call HAL_UART_Init() function.
1213 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1214 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1215 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1216 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1217 * - macro could only be called when corresponding UART instance is disabled
1218 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1219 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1220 * @param __HANDLE__ specifies the UART Handle.
1221 * @retval None
1222 */
1223 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
1224 do{ \
1225 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
1226 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
1227 } while(0U)
1228 /**
1229 * @}
1230 */
1231
1232 /* Private macros --------------------------------------------------------*/
1233 /** @defgroup UART_Private_Macros UART Private Macros
1234 * @{
1235 */
1236 /** @brief Get UART clock division factor from clock prescaler value.
1237 * @param __CLOCKPRESCALER__ UART prescaler value.
1238 * @retval UART clock division factor
1239 */
1240 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
1241 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \
1242 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \
1243 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \
1244 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \
1245 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \
1246 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \
1247 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \
1248 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \
1249 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \
1250 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \
1251 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U)
1252
1253 /** @brief BRR division operation to set BRR register with LPUART.
1254 * @param __PCLK__ LPUART clock.
1255 * @param __BAUD__ Baud rate set by the user.
1256 * @param __CLOCKPRESCALER__ UART prescaler value.
1257 * @retval Division result
1258 */
1259 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \
1260 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \
1261 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \
1262 )
1263
1264 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
1265 * @param __PCLK__ UART clock.
1266 * @param __BAUD__ Baud rate set by the user.
1267 * @param __CLOCKPRESCALER__ UART prescaler value.
1268 * @retval Division result
1269 */
1270 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \
1271 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__))
1272
1273 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
1274 * @param __PCLK__ UART clock.
1275 * @param __BAUD__ Baud rate set by the user.
1276 * @param __CLOCKPRESCALER__ UART prescaler value.
1277 * @retval Division result
1278 */
1279 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \
1280 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__))
1281
1282 /** @brief Check whether or not UART instance is Low Power UART.
1283 * @param __HANDLE__ specifies the UART Handle.
1284 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
1285 */
1286 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance))
1287
1288 /** @brief Check UART Baud rate.
1289 * @param __BAUDRATE__ Baudrate specified by the user.
1290 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz)
1291 * divided by the smallest oversampling used on the USART (i.e. 8)
1292 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
1293 */
1294 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 12500001U)
1295
1296 /** @brief Check UART assertion time.
1297 * @param __TIME__ 5-bit value assertion time.
1298 * @retval Test result (TRUE or FALSE).
1299 */
1300 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1301
1302 /** @brief Check UART deassertion time.
1303 * @param __TIME__ 5-bit value deassertion time.
1304 * @retval Test result (TRUE or FALSE).
1305 */
1306 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1307
1308 /**
1309 * @brief Ensure that UART frame number of stop bits is valid.
1310 * @param __STOPBITS__ UART frame number of stop bits.
1311 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1312 */
1313 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
1314 ((__STOPBITS__) == UART_STOPBITS_1) || \
1315 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
1316 ((__STOPBITS__) == UART_STOPBITS_2))
1317
1318 /**
1319 * @brief Ensure that LPUART frame number of stop bits is valid.
1320 * @param __STOPBITS__ LPUART frame number of stop bits.
1321 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1322 */
1323 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
1324 ((__STOPBITS__) == UART_STOPBITS_2))
1325
1326 /**
1327 * @brief Ensure that UART frame parity is valid.
1328 * @param __PARITY__ UART frame parity.
1329 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1330 */
1331 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
1332 ((__PARITY__) == UART_PARITY_EVEN) || \
1333 ((__PARITY__) == UART_PARITY_ODD))
1334
1335 /**
1336 * @brief Ensure that UART hardware flow control is valid.
1337 * @param __CONTROL__ UART hardware flow control.
1338 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
1339 */
1340 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
1341 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
1342 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
1343 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
1344 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
1345
1346 /**
1347 * @brief Ensure that UART communication mode is valid.
1348 * @param __MODE__ UART communication mode.
1349 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1350 */
1351 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
1352
1353 /**
1354 * @brief Ensure that UART state is valid.
1355 * @param __STATE__ UART state.
1356 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
1357 */
1358 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
1359 ((__STATE__) == UART_STATE_ENABLE))
1360
1361 /**
1362 * @brief Ensure that UART oversampling is valid.
1363 * @param __SAMPLING__ UART oversampling.
1364 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
1365 */
1366 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
1367 ((__SAMPLING__) == UART_OVERSAMPLING_8))
1368
1369 /**
1370 * @brief Ensure that UART frame sampling is valid.
1371 * @param __ONEBIT__ UART frame sampling.
1372 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
1373 */
1374 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
1375 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
1376
1377 /**
1378 * @brief Ensure that UART auto Baud rate detection mode is valid.
1379 * @param __MODE__ UART auto Baud rate detection mode.
1380 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1381 */
1382 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
1383 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
1384 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
1385 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
1386
1387 /**
1388 * @brief Ensure that UART receiver timeout setting is valid.
1389 * @param __TIMEOUT__ UART receiver timeout setting.
1390 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
1391 */
1392 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
1393 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
1394
1395 /** @brief Check the receiver timeout value.
1396 * @note The maximum UART receiver timeout value is 0xFFFFFF.
1397 * @param __TIMEOUTVALUE__ receiver timeout value.
1398 * @retval Test result (TRUE or FALSE)
1399 */
1400 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU)
1401
1402 /**
1403 * @brief Ensure that UART LIN state is valid.
1404 * @param __LIN__ UART LIN state.
1405 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
1406 */
1407 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
1408 ((__LIN__) == UART_LIN_ENABLE))
1409
1410 /**
1411 * @brief Ensure that UART LIN break detection length is valid.
1412 * @param __LENGTH__ UART LIN break detection length.
1413 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
1414 */
1415 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
1416 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
1417
1418 /**
1419 * @brief Ensure that UART DMA TX state is valid.
1420 * @param __DMATX__ UART DMA TX state.
1421 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
1422 */
1423 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
1424 ((__DMATX__) == UART_DMA_TX_ENABLE))
1425
1426 /**
1427 * @brief Ensure that UART DMA RX state is valid.
1428 * @param __DMARX__ UART DMA RX state.
1429 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
1430 */
1431 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
1432 ((__DMARX__) == UART_DMA_RX_ENABLE))
1433
1434 /**
1435 * @brief Ensure that UART half-duplex state is valid.
1436 * @param __HDSEL__ UART half-duplex state.
1437 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
1438 */
1439 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
1440 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
1441
1442 /**
1443 * @brief Ensure that UART wake-up method is valid.
1444 * @param __WAKEUP__ UART wake-up method .
1445 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
1446 */
1447 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
1448 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
1449
1450 /**
1451 * @brief Ensure that UART request parameter is valid.
1452 * @param __PARAM__ UART request parameter.
1453 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1454 */
1455 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
1456 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
1457 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
1458 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
1459 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
1460
1461 /**
1462 * @brief Ensure that UART advanced features initialization is valid.
1463 * @param __INIT__ UART advanced features initialization.
1464 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
1465 */
1466 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
1467 UART_ADVFEATURE_TXINVERT_INIT | \
1468 UART_ADVFEATURE_RXINVERT_INIT | \
1469 UART_ADVFEATURE_DATAINVERT_INIT | \
1470 UART_ADVFEATURE_SWAP_INIT | \
1471 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
1472 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
1473 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
1474 UART_ADVFEATURE_MSBFIRST_INIT))
1475
1476 /**
1477 * @brief Ensure that UART frame TX inversion setting is valid.
1478 * @param __TXINV__ UART frame TX inversion setting.
1479 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
1480 */
1481 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
1482 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
1483
1484 /**
1485 * @brief Ensure that UART frame RX inversion setting is valid.
1486 * @param __RXINV__ UART frame RX inversion setting.
1487 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
1488 */
1489 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
1490 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
1491
1492 /**
1493 * @brief Ensure that UART frame data inversion setting is valid.
1494 * @param __DATAINV__ UART frame data inversion setting.
1495 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
1496 */
1497 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
1498 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
1499
1500 /**
1501 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
1502 * @param __SWAP__ UART frame RX/TX pins swap setting.
1503 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
1504 */
1505 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
1506 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
1507
1508 /**
1509 * @brief Ensure that UART frame overrun setting is valid.
1510 * @param __OVERRUN__ UART frame overrun setting.
1511 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
1512 */
1513 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
1514 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
1515
1516 /**
1517 * @brief Ensure that UART auto Baud rate state is valid.
1518 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
1519 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
1520 */
1521 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \
1522 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
1523 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
1524
1525 /**
1526 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
1527 * @param __DMA__ UART DMA enabling or disabling on error setting.
1528 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
1529 */
1530 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
1531 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
1532
1533 /**
1534 * @brief Ensure that UART frame MSB first setting is valid.
1535 * @param __MSBFIRST__ UART frame MSB first setting.
1536 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
1537 */
1538 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
1539 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
1540
1541 /**
1542 * @brief Ensure that UART stop mode state is valid.
1543 * @param __STOPMODE__ UART stop mode state.
1544 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
1545 */
1546 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
1547 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
1548
1549 /**
1550 * @brief Ensure that UART mute mode state is valid.
1551 * @param __MUTE__ UART mute mode state.
1552 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
1553 */
1554 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
1555 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
1556
1557 /**
1558 * @brief Ensure that UART wake-up selection is valid.
1559 * @param __WAKE__ UART wake-up selection.
1560 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
1561 */
1562 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
1563 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
1564 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
1565
1566 /**
1567 * @brief Ensure that UART driver enable polarity is valid.
1568 * @param __POLARITY__ UART driver enable polarity.
1569 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
1570 */
1571 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
1572 ((__POLARITY__) == UART_DE_POLARITY_LOW))
1573
1574 /**
1575 * @brief Ensure that UART Prescaler is valid.
1576 * @param __CLOCKPRESCALER__ UART Prescaler value.
1577 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1578 */
1579 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \
1580 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \
1581 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \
1582 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \
1583 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \
1584 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \
1585 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \
1586 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \
1587 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \
1588 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \
1589 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
1590 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
1591
1592 /**
1593 * @}
1594 */
1595
1596 /* Include UART HAL Extended module */
1597 #include "stm32h7xx_hal_uart_ex.h"
1598
1599 /* Exported functions --------------------------------------------------------*/
1600 /** @addtogroup UART_Exported_Functions UART Exported Functions
1601 * @{
1602 */
1603
1604 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
1605 * @{
1606 */
1607
1608 /* Initialization and de-initialization functions ****************************/
1609 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
1610 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
1611 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
1612 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
1613 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
1614 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
1615 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
1616
1617 /* Callbacks Register/UnRegister functions ***********************************/
1618 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1619 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
1620 pUART_CallbackTypeDef pCallback);
1621 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
1622
1623 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
1624 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
1625 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1626
1627 /**
1628 * @}
1629 */
1630
1631 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
1632 * @{
1633 */
1634
1635 /* IO operation functions *****************************************************/
1636 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
1637 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1638 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
1639 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1640 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
1641 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1642 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
1643 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
1644 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
1645 /* Transfer Abort functions */
1646 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
1647 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
1648 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
1649 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
1650 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
1651 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
1652
1653 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
1654 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
1655 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
1656 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
1657 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
1658 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
1659 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
1660 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
1661 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
1662
1663 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size);
1664
1665 /**
1666 * @}
1667 */
1668
1669 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
1670 * @{
1671 */
1672
1673 /* Peripheral Control functions ************************************************/
1674 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue);
1675 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart);
1676 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart);
1677
1678 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
1679 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
1680 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
1681 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
1682 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
1683 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
1684
1685 /**
1686 * @}
1687 */
1688
1689 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
1690 * @{
1691 */
1692
1693 /* Peripheral State and Errors functions **************************************************/
1694 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart);
1695 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart);
1696
1697 /**
1698 * @}
1699 */
1700
1701 /**
1702 * @}
1703 */
1704
1705 /* Private functions -----------------------------------------------------------*/
1706 /** @addtogroup UART_Private_Functions UART Private Functions
1707 * @{
1708 */
1709 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1710 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
1711 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1712 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
1713 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
1714 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
1715 uint32_t Tickstart, uint32_t Timeout);
1716 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
1717 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1718 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1719
1720 /**
1721 * @}
1722 */
1723
1724 /* Private variables -----------------------------------------------------------*/
1725 /** @defgroup UART_Private_variables UART Private variables
1726 * @{
1727 */
1728 /* Prescaler Table used in BRR computation macros.
1729 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */
1730 extern const uint16_t UARTPrescTable[12];
1731 /**
1732 * @}
1733 */
1734
1735 /**
1736 * @}
1737 */
1738
1739 /**
1740 * @}
1741 */
1742
1743 #ifdef __cplusplus
1744 }
1745 #endif
1746
1747 #endif /* STM32H7xx_HAL_UART_H */
1748
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