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Merge maintenance-8.x.x fixes into master
[inav.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_usart.h
blob28ba1ed1556d94a5d94e0acbdec1753d52f90c7e
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_usart.h
4 * @author MCD Application Team
5 * @brief Header file of USART HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H7xx_HAL_USART_H
21 #define STM32H7xx_HAL_USART_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h7xx_hal_def.h"
29
30 /** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33
34 /** @addtogroup USART
35 * @{
36 */
37
38 /* Exported types ------------------------------------------------------------*/
39 /** @defgroup USART_Exported_Types USART Exported Types
40 * @{
41 */
42
43 /**
44 * @brief USART Init Structure definition
45 */
46 typedef struct
47 {
48 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
49 The baud rate is computed using the following formula:
50 Baud Rate Register[15:4] = ((2 * fclk_pres) /
51 ((huart->Init.BaudRate)))[15:4]
52 Baud Rate Register[3] = 0
53 Baud Rate Register[2:0] = (((2 * fclk_pres) /
54 ((huart->Init.BaudRate)))[3:0]) >> 1
55 where fclk_pres is the USART input clock frequency (fclk)
56 divided by a prescaler.
57 @note Oversampling by 8 is systematically applied to
58 achieve high baud rates. */
59
60 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
61 This parameter can be a value of @ref USARTEx_Word_Length. */
62
63 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
64 This parameter can be a value of @ref USART_Stop_Bits. */
65
66 uint32_t Parity; /*!< Specifies the parity mode.
67 This parameter can be a value of @ref USART_Parity
68 @note When parity is enabled, the computed parity is inserted
69 at the MSB position of the transmitted data (9th bit when
70 the word length is set to 9 data bits; 8th bit when the
71 word length is set to 8 data bits). */
72
73 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
74 This parameter can be a value of @ref USART_Mode. */
75
76 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
77 This parameter can be a value of @ref USART_Clock_Polarity. */
78
79 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
80 This parameter can be a value of @ref USART_Clock_Phase. */
81
82 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
83 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
84 This parameter can be a value of @ref USART_Last_Bit. */
85
86 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the USART clock source.
87 This parameter can be a value of @ref USART_ClockPrescaler. */
88 } USART_InitTypeDef;
89
90 /**
91 * @brief HAL USART State structures definition
92 */
93 typedef enum
94 {
95 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */
96 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
97 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
98 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
99 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
100 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
101 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
102 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
103 } HAL_USART_StateTypeDef;
104
105 /**
106 * @brief USART clock sources definitions
107 */
108 typedef enum
109 {
110 USART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */
111 USART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */
112 USART_CLOCKSOURCE_PLL2 = 0x02U, /*!< PLL2Q clock source */
113 USART_CLOCKSOURCE_PLL3 = 0x04U, /*!< PLL3Q clock source */
114 USART_CLOCKSOURCE_HSI = 0x08U, /*!< HSI clock source */
115 USART_CLOCKSOURCE_CSI = 0x10U, /*!< CSI clock source */
116 USART_CLOCKSOURCE_LSE = 0x20U, /*!< LSE clock source */
117 USART_CLOCKSOURCE_UNDEFINED = 0x40U /*!< Undefined clock source */
118 } USART_ClockSourceTypeDef;
119
120 /**
121 * @brief USART handle Structure definition
122 */
123 typedef struct __USART_HandleTypeDef
124 {
125 USART_TypeDef *Instance; /*!< USART registers base address */
126
127 USART_InitTypeDef Init; /*!< USART communication parameters */
128
129 const uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
130
131 uint16_t TxXferSize; /*!< USART Tx Transfer size */
132
133 __IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
134
135 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
136
137 uint16_t RxXferSize; /*!< USART Rx Transfer size */
138
139 __IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
140
141 uint16_t Mask; /*!< USART Rx RDR register mask */
142
143 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
144
145 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
146
147 uint32_t SlaveMode; /*!< Enable/Disable USART SPI Slave Mode. This parameter can be a value
148 of @ref USARTEx_Slave_Mode */
149
150 uint32_t FifoMode; /*!< Specifies if the FIFO mode will be used. This parameter can be a value
151 of @ref USARTEx_FIFO_mode. */
152
153 void (*RxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Rx IRQ handler */
154
155 void (*TxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Tx IRQ handler */
156
157 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
158
159 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
160
161 HAL_LockTypeDef Lock; /*!< Locking object */
162
163 __IO HAL_USART_StateTypeDef State; /*!< USART communication state */
164
165 __IO uint32_t ErrorCode; /*!< USART Error code */
166
167 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
168 void (* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Half Complete Callback */
169 void (* TxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Complete Callback */
170 void (* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Half Complete Callback */
171 void (* RxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Complete Callback */
172 void (* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Rx Complete Callback */
173 void (* ErrorCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Error Callback */
174 void (* AbortCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Abort Complete Callback */
175 void (* RxFifoFullCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Fifo Full Callback */
176 void (* TxFifoEmptyCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Fifo Empty Callback */
177
178 void (* MspInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp Init callback */
179 void (* MspDeInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp DeInit callback */
180 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
181
182 } USART_HandleTypeDef;
183
184 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
185 /**
186 * @brief HAL USART Callback ID enumeration definition
187 */
188 typedef enum
189 {
190 HAL_USART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< USART Tx Half Complete Callback ID */
191 HAL_USART_TX_COMPLETE_CB_ID = 0x01U, /*!< USART Tx Complete Callback ID */
192 HAL_USART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< USART Rx Half Complete Callback ID */
193 HAL_USART_RX_COMPLETE_CB_ID = 0x03U, /*!< USART Rx Complete Callback ID */
194 HAL_USART_TX_RX_COMPLETE_CB_ID = 0x04U, /*!< USART Tx Rx Complete Callback ID */
195 HAL_USART_ERROR_CB_ID = 0x05U, /*!< USART Error Callback ID */
196 HAL_USART_ABORT_COMPLETE_CB_ID = 0x06U, /*!< USART Abort Complete Callback ID */
197 HAL_USART_RX_FIFO_FULL_CB_ID = 0x07U, /*!< USART Rx Fifo Full Callback ID */
198 HAL_USART_TX_FIFO_EMPTY_CB_ID = 0x08U, /*!< USART Tx Fifo Empty Callback ID */
199
200 HAL_USART_MSPINIT_CB_ID = 0x09U, /*!< USART MspInit callback ID */
201 HAL_USART_MSPDEINIT_CB_ID = 0x0AU /*!< USART MspDeInit callback ID */
202
203 } HAL_USART_CallbackIDTypeDef;
204
205 /**
206 * @brief HAL USART Callback pointer definition
207 */
208 typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< pointer to an USART callback function */
209
210 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
211
212 /**
213 * @}
214 */
215
216 /* Exported constants --------------------------------------------------------*/
217 /** @defgroup USART_Exported_Constants USART Exported Constants
218 * @{
219 */
220
221 /** @defgroup USART_Error_Definition USART Error Definition
222 * @{
223 */
224 #define HAL_USART_ERROR_NONE (0x00000000U) /*!< No error */
225 #define HAL_USART_ERROR_PE (0x00000001U) /*!< Parity error */
226 #define HAL_USART_ERROR_NE (0x00000002U) /*!< Noise error */
227 #define HAL_USART_ERROR_FE (0x00000004U) /*!< Frame error */
228 #define HAL_USART_ERROR_ORE (0x00000008U) /*!< Overrun error */
229 #define HAL_USART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
230 #define HAL_USART_ERROR_UDR (0x00000020U) /*!< SPI slave underrun error */
231 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
232 #define HAL_USART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */
233 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
234 #define HAL_USART_ERROR_RTO (0x00000080U) /*!< Receiver Timeout error */
235 /**
236 * @}
237 */
238
239 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
240 * @{
241 */
242 #define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */
243 #define USART_STOPBITS_1 0x00000000U /*!< USART frame with 1 stop bit */
244 #define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */
245 #define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */
246 /**
247 * @}
248 */
249
250 /** @defgroup USART_Parity USART Parity
251 * @{
252 */
253 #define USART_PARITY_NONE 0x00000000U /*!< No parity */
254 #define USART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
255 #define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
256 /**
257 * @}
258 */
259
260 /** @defgroup USART_Mode USART Mode
261 * @{
262 */
263 #define USART_MODE_RX USART_CR1_RE /*!< RX mode */
264 #define USART_MODE_TX USART_CR1_TE /*!< TX mode */
265 #define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
266 /**
267 * @}
268 */
269
270 /** @defgroup USART_Clock USART Clock
271 * @{
272 */
273 #define USART_CLOCK_DISABLE 0x00000000U /*!< USART clock disable */
274 #define USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< USART clock enable */
275 /**
276 * @}
277 */
278
279 /** @defgroup USART_Clock_Polarity USART Clock Polarity
280 * @{
281 */
282 #define USART_POLARITY_LOW 0x00000000U /*!< Driver enable signal is active high */
283 #define USART_POLARITY_HIGH USART_CR2_CPOL /*!< Driver enable signal is active low */
284 /**
285 * @}
286 */
287
288 /** @defgroup USART_Clock_Phase USART Clock Phase
289 * @{
290 */
291 #define USART_PHASE_1EDGE 0x00000000U /*!< USART frame phase on first clock transition */
292 #define USART_PHASE_2EDGE USART_CR2_CPHA /*!< USART frame phase on second clock transition */
293 /**
294 * @}
295 */
296
297 /** @defgroup USART_Last_Bit USART Last Bit
298 * @{
299 */
300 #define USART_LASTBIT_DISABLE 0x00000000U /*!< USART frame last data bit clock pulse not output to SCLK pin */
301 #define USART_LASTBIT_ENABLE USART_CR2_LBCL /*!< USART frame last data bit clock pulse output to SCLK pin */
302 /**
303 * @}
304 */
305
306 /** @defgroup USART_ClockPrescaler USART Clock Prescaler
307 * @{
308 */
309 #define USART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
310 #define USART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
311 #define USART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
312 #define USART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
313 #define USART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
314 #define USART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
315 #define USART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
316 #define USART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
317 #define USART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
318 #define USART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
319 #define USART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
320 #define USART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
321
322 /**
323 * @}
324 */
325
326 /** @defgroup USART_Request_Parameters USART Request Parameters
327 * @{
328 */
329 #define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
330 #define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
331 /**
332 * @}
333 */
334
335 /** @defgroup USART_Flags USART Flags
336 * Elements values convention: 0xXXXX
337 * - 0xXXXX : Flag mask in the ISR register
338 * @{
339 */
340 #define USART_FLAG_TXFT USART_ISR_TXFT /*!< USART TXFIFO threshold flag */
341 #define USART_FLAG_RXFT USART_ISR_RXFT /*!< USART RXFIFO threshold flag */
342 #define USART_FLAG_RXFF USART_ISR_RXFF /*!< USART RXFIFO Full flag */
343 #define USART_FLAG_TXFE USART_ISR_TXFE /*!< USART TXFIFO Empty flag */
344 #define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */
345 #define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */
346 #define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */
347 #define USART_FLAG_UDR USART_ISR_UDR /*!< SPI slave underrun error flag */
348 #define USART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< USART transmit data register empty */
349 #define USART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< USART TXFIFO not full */
350 #define USART_FLAG_RTOF USART_ISR_RTOF /*!< USART receiver timeout flag */
351 #define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */
352 #define USART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< USART read data register not empty */
353 #define USART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< USART RXFIFO not empty */
354 #define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */
355 #define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */
356 #define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */
357 #define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */
358 #define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */
359 /**
360 * @}
361 */
362
363 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
364 * Elements values convention: 0000ZZZZ0XXYYYYYb
365 * - YYYYY : Interrupt source position in the XX register (5bits)
366 * - XX : Interrupt source register (2bits)
367 * - 01: CR1 register
368 * - 10: CR2 register
369 * - 11: CR3 register
370 * - ZZZZ : Flag position in the ISR register(4bits)
371 * @{
372 */
373
374 #define USART_IT_PE 0x0028U /*!< USART parity error interruption */
375 #define USART_IT_TXE 0x0727U /*!< USART transmit data register empty interruption */
376 #define USART_IT_TXFNF 0x0727U /*!< USART TX FIFO not full interruption */
377 #define USART_IT_TC 0x0626U /*!< USART transmission complete interruption */
378 #define USART_IT_RXNE 0x0525U /*!< USART read data register not empty interruption */
379 #define USART_IT_RXFNE 0x0525U /*!< USART RXFIFO not empty interruption */
380 #define USART_IT_IDLE 0x0424U /*!< USART idle interruption */
381 #define USART_IT_ERR 0x0060U /*!< USART error interruption */
382 #define USART_IT_ORE 0x0300U /*!< USART overrun error interruption */
383 #define USART_IT_NE 0x0200U /*!< USART noise error interruption */
384 #define USART_IT_FE 0x0100U /*!< USART frame error interruption */
385 #define USART_IT_RXFF 0x183FU /*!< USART RXFIFO full interruption */
386 #define USART_IT_TXFE 0x173EU /*!< USART TXFIFO empty interruption */
387 #define USART_IT_RXFT 0x1A7CU /*!< USART RXFIFO threshold reached interruption */
388 #define USART_IT_TXFT 0x1B77U /*!< USART TXFIFO threshold reached interruption */
389
390 /**
391 * @}
392 */
393
394 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
395 * @{
396 */
397 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
398 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
399 #define USART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
400 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
401 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
402 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
403 #define USART_CLEAR_UDRF USART_ICR_UDRCF /*!< SPI slave underrun error Clear Flag */
404 #define USART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO Empty Clear Flag */
405 #define USART_CLEAR_RTOF USART_ICR_RTOCF /*!< USART receiver timeout clear flag */
406 /**
407 * @}
408 */
409
410 /** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
411 * @{
412 */
413 #define USART_IT_MASK 0x001FU /*!< USART interruptions flags mask */
414 #define USART_CR_MASK 0x00E0U /*!< USART control register mask */
415 #define USART_CR_POS 5U /*!< USART control register position */
416 #define USART_ISR_MASK 0x1F00U /*!< USART ISR register mask */
417 #define USART_ISR_POS 8U /*!< USART ISR register position */
418 /**
419 * @}
420 */
421
422 /**
423 * @}
424 */
425
426 /* Exported macros -----------------------------------------------------------*/
427 /** @defgroup USART_Exported_Macros USART Exported Macros
428 * @{
429 */
430
431 /** @brief Reset USART handle state.
432 * @param __HANDLE__ USART handle.
433 * @retval None
434 */
435 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
436 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) do{ \
437 (__HANDLE__)->State = HAL_USART_STATE_RESET; \
438 (__HANDLE__)->MspInitCallback = NULL; \
439 (__HANDLE__)->MspDeInitCallback = NULL; \
440 } while(0U)
441 #else
442 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
443 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
444
445 /** @brief Check whether the specified USART flag is set or not.
446 * @param __HANDLE__ specifies the USART Handle
447 * @param __FLAG__ specifies the flag to check.
448 * This parameter can be one of the following values:
449 * @arg @ref USART_FLAG_TXFT TXFIFO threshold flag
450 * @arg @ref USART_FLAG_RXFT RXFIFO threshold flag
451 * @arg @ref USART_FLAG_RXFF RXFIFO Full flag
452 * @arg @ref USART_FLAG_TXFE TXFIFO Empty flag
453 * @arg @ref USART_FLAG_REACK Receive enable acknowledge flag
454 * @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag
455 * @arg @ref USART_FLAG_BUSY Busy flag
456 * @arg @ref USART_FLAG_UDR SPI slave underrun error flag
457 * @arg @ref USART_FLAG_TXE Transmit data register empty flag
458 * @arg @ref USART_FLAG_TXFNF TXFIFO not full flag
459 * @arg @ref USART_FLAG_TC Transmission Complete flag
460 * @arg @ref USART_FLAG_RXNE Receive data register not empty flag
461 * @arg @ref USART_FLAG_RXFNE RXFIFO not empty flag
462 * @arg @ref USART_FLAG_RTOF Receiver Timeout flag
463 * @arg @ref USART_FLAG_IDLE Idle Line detection flag
464 * @arg @ref USART_FLAG_ORE OverRun Error flag
465 * @arg @ref USART_FLAG_NE Noise Error flag
466 * @arg @ref USART_FLAG_FE Framing Error flag
467 * @arg @ref USART_FLAG_PE Parity Error flag
468 * @retval The new state of __FLAG__ (TRUE or FALSE).
469 */
470 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
471
472 /** @brief Clear the specified USART pending flag.
473 * @param __HANDLE__ specifies the USART Handle.
474 * @param __FLAG__ specifies the flag to check.
475 * This parameter can be any combination of the following values:
476 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
477 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
478 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
479 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
480 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
481 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
482 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
483 * @arg @ref USART_CLEAR_RTOF Receiver Timeout clear flag
484 * @arg @ref USART_CLEAR_UDRF SPI slave underrun error Clear Flag
485 * @retval None
486 */
487 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
488
489 /** @brief Clear the USART PE pending flag.
490 * @param __HANDLE__ specifies the USART Handle.
491 * @retval None
492 */
493 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
494
495 /** @brief Clear the USART FE pending flag.
496 * @param __HANDLE__ specifies the USART Handle.
497 * @retval None
498 */
499 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
500
501 /** @brief Clear the USART NE pending flag.
502 * @param __HANDLE__ specifies the USART Handle.
503 * @retval None
504 */
505 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
506
507 /** @brief Clear the USART ORE pending flag.
508 * @param __HANDLE__ specifies the USART Handle.
509 * @retval None
510 */
511 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
512
513 /** @brief Clear the USART IDLE pending flag.
514 * @param __HANDLE__ specifies the USART Handle.
515 * @retval None
516 */
517 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
518
519 /** @brief Clear the USART TX FIFO empty clear flag.
520 * @param __HANDLE__ specifies the USART Handle.
521 * @retval None
522 */
523 #define __HAL_USART_CLEAR_TXFECF(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_TXFECF)
524
525 /** @brief Clear SPI slave underrun error flag.
526 * @param __HANDLE__ specifies the USART Handle.
527 * @retval None
528 */
529 #define __HAL_USART_CLEAR_UDRFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_UDRF)
530
531 /** @brief Enable the specified USART interrupt.
532 * @param __HANDLE__ specifies the USART Handle.
533 * @param __INTERRUPT__ specifies the USART interrupt source to enable.
534 * This parameter can be one of the following values:
535 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
536 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
537 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
538 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
539 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
540 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
541 * @arg @ref USART_IT_TC Transmission complete interrupt
542 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
543 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
544 * @arg @ref USART_IT_IDLE Idle line detection interrupt
545 * @arg @ref USART_IT_PE Parity Error interrupt
546 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
547 * @retval None
548 */
549 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)\
550 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\
551 ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
552 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\
553 ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
554 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
555
556 /** @brief Disable the specified USART interrupt.
557 * @param __HANDLE__ specifies the USART Handle.
558 * @param __INTERRUPT__ specifies the USART interrupt source to disable.
559 * This parameter can be one of the following values:
560 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
561 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
562 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
563 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
564 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
565 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
566 * @arg @ref USART_IT_TC Transmission complete interrupt
567 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
568 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
569 * @arg @ref USART_IT_IDLE Idle line detection interrupt
570 * @arg @ref USART_IT_PE Parity Error interrupt
571 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
572 * @retval None
573 */
574 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__)\
575 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\
576 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
577 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\
578 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
579 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
580
581 /** @brief Check whether the specified USART interrupt has occurred or not.
582 * @param __HANDLE__ specifies the USART Handle.
583 * @param __INTERRUPT__ specifies the USART interrupt source to check.
584 * This parameter can be one of the following values:
585 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
586 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
587 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
588 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
589 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
590 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
591 * @arg @ref USART_IT_TC Transmission complete interrupt
592 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
593 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
594 * @arg @ref USART_IT_IDLE Idle line detection interrupt
595 * @arg @ref USART_IT_ORE OverRun Error interrupt
596 * @arg @ref USART_IT_NE Noise Error interrupt
597 * @arg @ref USART_IT_FE Framing Error interrupt
598 * @arg @ref USART_IT_PE Parity Error interrupt
599 * @retval The new state of __INTERRUPT__ (SET or RESET).
600 */
601 #define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
602 & (0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>>\
603 USART_ISR_POS))) != 0U) ? SET : RESET)
604
605 /** @brief Check whether the specified USART interrupt source is enabled or not.
606 * @param __HANDLE__ specifies the USART Handle.
607 * @param __INTERRUPT__ specifies the USART interrupt source to check.
608 * This parameter can be one of the following values:
609 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
610 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
611 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
612 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
613 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
614 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
615 * @arg @ref USART_IT_TC Transmission complete interrupt
616 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
617 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
618 * @arg @ref USART_IT_IDLE Idle line detection interrupt
619 * @arg @ref USART_IT_ORE OverRun Error interrupt
620 * @arg @ref USART_IT_NE Noise Error interrupt
621 * @arg @ref USART_IT_FE Framing Error interrupt
622 * @arg @ref USART_IT_PE Parity Error interrupt
623 * @retval The new state of __INTERRUPT__ (SET or RESET).
624 */
625 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ?\
626 (__HANDLE__)->Instance->CR1 : \
627 (((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ?\
628 (__HANDLE__)->Instance->CR2 : \
629 (__HANDLE__)->Instance->CR3)) & (0x01U <<\
630 (((uint16_t)(__INTERRUPT__)) &\
631 USART_IT_MASK))) != 0U) ? SET : RESET)
632
633 /** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
634 * @param __HANDLE__ specifies the USART Handle.
635 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
636 * to clear the corresponding interrupt.
637 * This parameter can be one of the following values:
638 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
639 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
640 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
641 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
642 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
643 * @arg @ref USART_CLEAR_RTOF Receiver timeout clear flag
644 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
645 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
646 * @retval None
647 */
648 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
649
650 /** @brief Set a specific USART request flag.
651 * @param __HANDLE__ specifies the USART Handle.
652 * @param __REQ__ specifies the request flag to set.
653 * This parameter can be one of the following values:
654 * @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request
655 * @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request
656 *
657 * @retval None
658 */
659 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
660
661 /** @brief Enable the USART one bit sample method.
662 * @param __HANDLE__ specifies the USART Handle.
663 * @retval None
664 */
665 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
666
667 /** @brief Disable the USART one bit sample method.
668 * @param __HANDLE__ specifies the USART Handle.
669 * @retval None
670 */
671 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
672
673 /** @brief Enable USART.
674 * @param __HANDLE__ specifies the USART Handle.
675 * @retval None
676 */
677 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
678
679 /** @brief Disable USART.
680 * @param __HANDLE__ specifies the USART Handle.
681 * @retval None
682 */
683 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
684
685 /**
686 * @}
687 */
688
689 /* Private macros --------------------------------------------------------*/
690 /** @defgroup USART_Private_Macros USART Private Macros
691 * @{
692 */
693
694 /** @brief Get USART clock division factor from clock prescaler value.
695 * @param __CLOCKPRESCALER__ USART prescaler value.
696 * @retval USART clock division factor
697 */
698 #define USART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
699 (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) ? 1U : \
700 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) ? 2U : \
701 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) ? 4U : \
702 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) ? 6U : \
703 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) ? 8U : \
704 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) ? 10U : \
705 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) ? 12U : \
706 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) ? 16U : \
707 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) ? 32U : \
708 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) ? 64U : \
709 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : 256U)
710
711 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
712 * @param __PCLK__ USART clock.
713 * @param __BAUD__ Baud rate set by the user.
714 * @param __CLOCKPRESCALER__ USART prescaler value.
715 * @retval Division result
716 */
717 #define USART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__)\
718 (((((__PCLK__)/USART_GET_DIV_FACTOR(__CLOCKPRESCALER__))*2U)\
719 + ((__BAUD__)/2U)) / (__BAUD__))
720
721 /** @brief Report the USART clock source.
722 * @param __HANDLE__ specifies the USART Handle.
723 * @param __CLOCKSOURCE__ output variable.
724 * @retval the USART clocking source, written in __CLOCKSOURCE__.
725 */
726 #if defined(UART9) && defined(USART10)
727 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
728 do { \
729 if((__HANDLE__)->Instance == USART1) \
730 { \
731 switch(__HAL_RCC_GET_USART1_SOURCE()) \
732 { \
733 case RCC_USART1CLKSOURCE_D2PCLK2: \
734 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
735 break; \
736 case RCC_USART1CLKSOURCE_PLL2: \
737 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
738 break; \
739 case RCC_USART1CLKSOURCE_PLL3: \
740 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
741 break; \
742 case RCC_USART1CLKSOURCE_HSI: \
743 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
744 break; \
745 case RCC_USART1CLKSOURCE_CSI: \
746 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
747 break; \
748 case RCC_USART1CLKSOURCE_LSE: \
749 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
750 break; \
751 default: \
752 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
753 break; \
754 } \
755 } \
756 else if((__HANDLE__)->Instance == USART2) \
757 { \
758 switch(__HAL_RCC_GET_USART2_SOURCE()) \
759 { \
760 case RCC_USART2CLKSOURCE_D2PCLK1: \
761 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
762 break; \
763 case RCC_USART2CLKSOURCE_PLL2: \
764 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
765 break; \
766 case RCC_USART2CLKSOURCE_PLL3: \
767 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
768 break; \
769 case RCC_USART2CLKSOURCE_HSI: \
770 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
771 break; \
772 case RCC_USART2CLKSOURCE_CSI: \
773 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
774 break; \
775 case RCC_USART2CLKSOURCE_LSE: \
776 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
777 break; \
778 default: \
779 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
780 break; \
781 } \
782 } \
783 else if((__HANDLE__)->Instance == USART3) \
784 { \
785 switch(__HAL_RCC_GET_USART3_SOURCE()) \
786 { \
787 case RCC_USART3CLKSOURCE_D2PCLK1: \
788 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
789 break; \
790 case RCC_USART3CLKSOURCE_PLL2: \
791 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
792 break; \
793 case RCC_USART3CLKSOURCE_PLL3: \
794 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
795 break; \
796 case RCC_USART3CLKSOURCE_HSI: \
797 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
798 break; \
799 case RCC_USART3CLKSOURCE_CSI: \
800 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
801 break; \
802 case RCC_USART3CLKSOURCE_LSE: \
803 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
804 break; \
805 default: \
806 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
807 break; \
808 } \
809 } \
810 else if((__HANDLE__)->Instance == USART6) \
811 { \
812 switch(__HAL_RCC_GET_USART6_SOURCE()) \
813 { \
814 case RCC_USART6CLKSOURCE_D2PCLK2: \
815 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
816 break; \
817 case RCC_USART6CLKSOURCE_PLL2: \
818 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
819 break; \
820 case RCC_USART6CLKSOURCE_PLL3: \
821 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
822 break; \
823 case RCC_USART6CLKSOURCE_HSI: \
824 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
825 break; \
826 case RCC_USART6CLKSOURCE_CSI: \
827 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
828 break; \
829 case RCC_USART6CLKSOURCE_LSE: \
830 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
831 break; \
832 default: \
833 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
834 break; \
835 } \
836 } \
837 else if((__HANDLE__)->Instance == USART10) \
838 { \
839 switch(__HAL_RCC_GET_USART10_SOURCE()) \
840 { \
841 case RCC_USART10CLKSOURCE_D2PCLK2: \
842 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
843 break; \
844 case RCC_USART10CLKSOURCE_PLL2: \
845 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
846 break; \
847 case RCC_USART10CLKSOURCE_PLL3: \
848 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
849 break; \
850 case RCC_USART10CLKSOURCE_HSI: \
851 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
852 break; \
853 case RCC_USART10CLKSOURCE_CSI: \
854 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
855 break; \
856 case RCC_USART10CLKSOURCE_LSE: \
857 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
858 break; \
859 default: \
860 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
861 break; \
862 } \
863 } \
864 else \
865 { \
866 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
867 } \
868 } while(0U)
869 #else
870 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
871 do { \
872 if((__HANDLE__)->Instance == USART1) \
873 { \
874 switch(__HAL_RCC_GET_USART1_SOURCE()) \
875 { \
876 case RCC_USART1CLKSOURCE_D2PCLK2: \
877 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
878 break; \
879 case RCC_USART1CLKSOURCE_PLL2: \
880 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
881 break; \
882 case RCC_USART1CLKSOURCE_PLL3: \
883 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
884 break; \
885 case RCC_USART1CLKSOURCE_HSI: \
886 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
887 break; \
888 case RCC_USART1CLKSOURCE_CSI: \
889 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
890 break; \
891 case RCC_USART1CLKSOURCE_LSE: \
892 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
893 break; \
894 default: \
895 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
896 break; \
897 } \
898 } \
899 else if((__HANDLE__)->Instance == USART2) \
900 { \
901 switch(__HAL_RCC_GET_USART2_SOURCE()) \
902 { \
903 case RCC_USART2CLKSOURCE_D2PCLK1: \
904 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
905 break; \
906 case RCC_USART2CLKSOURCE_PLL2: \
907 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
908 break; \
909 case RCC_USART2CLKSOURCE_PLL3: \
910 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
911 break; \
912 case RCC_USART2CLKSOURCE_HSI: \
913 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
914 break; \
915 case RCC_USART2CLKSOURCE_CSI: \
916 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
917 break; \
918 case RCC_USART2CLKSOURCE_LSE: \
919 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
920 break; \
921 default: \
922 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
923 break; \
924 } \
925 } \
926 else if((__HANDLE__)->Instance == USART3) \
927 { \
928 switch(__HAL_RCC_GET_USART3_SOURCE()) \
929 { \
930 case RCC_USART3CLKSOURCE_D2PCLK1: \
931 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \
932 break; \
933 case RCC_USART3CLKSOURCE_PLL2: \
934 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
935 break; \
936 case RCC_USART3CLKSOURCE_PLL3: \
937 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
938 break; \
939 case RCC_USART3CLKSOURCE_HSI: \
940 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
941 break; \
942 case RCC_USART3CLKSOURCE_CSI: \
943 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
944 break; \
945 case RCC_USART3CLKSOURCE_LSE: \
946 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
947 break; \
948 default: \
949 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
950 break; \
951 } \
952 } \
953 else if((__HANDLE__)->Instance == USART6) \
954 { \
955 switch(__HAL_RCC_GET_USART6_SOURCE()) \
956 { \
957 case RCC_USART6CLKSOURCE_D2PCLK2: \
958 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \
959 break; \
960 case RCC_USART6CLKSOURCE_PLL2: \
961 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \
962 break; \
963 case RCC_USART6CLKSOURCE_PLL3: \
964 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \
965 break; \
966 case RCC_USART6CLKSOURCE_HSI: \
967 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
968 break; \
969 case RCC_USART6CLKSOURCE_CSI: \
970 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \
971 break; \
972 case RCC_USART6CLKSOURCE_LSE: \
973 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
974 break; \
975 default: \
976 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
977 break; \
978 } \
979 } \
980 else \
981 { \
982 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
983 } \
984 } while(0U)
985 #endif /* UART9 && USART10 */
986
987 /** @brief Check USART Baud rate.
988 * @param __BAUDRATE__ Baudrate specified by the user.
989 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz)
990 * divided by the smallest oversampling used on the USART (i.e. 8)
991 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) */
992 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
993
994 /**
995 * @brief Ensure that USART frame number of stop bits is valid.
996 * @param __STOPBITS__ USART frame number of stop bits.
997 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
998 */
999 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
1000 ((__STOPBITS__) == USART_STOPBITS_1) || \
1001 ((__STOPBITS__) == USART_STOPBITS_1_5) || \
1002 ((__STOPBITS__) == USART_STOPBITS_2))
1003
1004 /**
1005 * @brief Ensure that USART frame parity is valid.
1006 * @param __PARITY__ USART frame parity.
1007 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1008 */
1009 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
1010 ((__PARITY__) == USART_PARITY_EVEN) || \
1011 ((__PARITY__) == USART_PARITY_ODD))
1012
1013 /**
1014 * @brief Ensure that USART communication mode is valid.
1015 * @param __MODE__ USART communication mode.
1016 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1017 */
1018 #define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U))
1019
1020 /**
1021 * @brief Ensure that USART clock state is valid.
1022 * @param __CLOCK__ USART clock state.
1023 * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid)
1024 */
1025 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
1026 ((__CLOCK__) == USART_CLOCK_ENABLE))
1027
1028 /**
1029 * @brief Ensure that USART frame polarity is valid.
1030 * @param __CPOL__ USART frame polarity.
1031 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
1032 */
1033 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
1034
1035 /**
1036 * @brief Ensure that USART frame phase is valid.
1037 * @param __CPHA__ USART frame phase.
1038 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
1039 */
1040 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
1041
1042 /**
1043 * @brief Ensure that USART frame last bit clock pulse setting is valid.
1044 * @param __LASTBIT__ USART frame last bit clock pulse setting.
1045 * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
1046 */
1047 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
1048 ((__LASTBIT__) == USART_LASTBIT_ENABLE))
1049
1050 /**
1051 * @brief Ensure that USART request parameter is valid.
1052 * @param __PARAM__ USART request parameter.
1053 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1054 */
1055 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
1056 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
1057
1058 /**
1059 * @brief Ensure that USART Prescaler is valid.
1060 * @param __CLOCKPRESCALER__ USART Prescaler value.
1061 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1062 */
1063 #define IS_USART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) || \
1064 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) || \
1065 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) || \
1066 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) || \
1067 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) || \
1068 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) || \
1069 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) || \
1070 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) || \
1071 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) || \
1072 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) || \
1073 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) || \
1074 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256))
1075
1076 /**
1077 * @}
1078 */
1079
1080 /* Include USART HAL Extended module */
1081 #include "stm32h7xx_hal_usart_ex.h"
1082
1083 /* Exported functions --------------------------------------------------------*/
1084 /** @addtogroup USART_Exported_Functions USART Exported Functions
1085 * @{
1086 */
1087
1088 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
1089 * @{
1090 */
1091
1092 /* Initialization and de-initialization functions ****************************/
1093 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
1094 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
1095 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
1096 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
1097
1098 /* Callbacks Register/UnRegister functions ***********************************/
1099 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
1100 HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID,
1101 pUSART_CallbackTypeDef pCallback);
1102 HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID);
1103 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */
1104
1105 /**
1106 * @}
1107 */
1108
1109 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions
1110 * @{
1111 */
1112
1113 /* IO operation functions *****************************************************/
1114 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size,
1115 uint32_t Timeout);
1116 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
1117 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1118 uint16_t Size, uint32_t Timeout);
1119 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
1120 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
1121 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1122 uint16_t Size);
1123 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size);
1124 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
1125 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1126 uint16_t Size);
1127 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
1128 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
1129 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
1130 /* Transfer Abort functions */
1131 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
1132 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
1133
1134 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
1135 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
1136 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
1137 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
1138 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
1139 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
1140 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
1141 void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart);
1142
1143 /**
1144 * @}
1145 */
1146
1147 /** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions
1148 * @{
1149 */
1150
1151 /* Peripheral State and Error functions ***************************************/
1152 HAL_USART_StateTypeDef HAL_USART_GetState(const USART_HandleTypeDef *husart);
1153 uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart);
1154
1155 /**
1156 * @}
1157 */
1158
1159 /**
1160 * @}
1161 */
1162
1163 /**
1164 * @}
1165 */
1166
1167 /**
1168 * @}
1169 */
1170
1171 #ifdef __cplusplus
1172 }
1173 #endif
1174
1175 #endif /* STM32H7xx_HAL_USART_H */
1176
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