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Merge maintenance-8.x.x fixes into master
[inav.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Src / stm32h7xx_hal_dac.c
blob02076770066703b5f1060bf837815e62a99e7066
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2017 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### DAC Peripheral features #####
28 ==============================================================================
29 [..]
30 *** DAC Channels ***
31 ====================
32 [..]
33 STM32H7 devices integrate two 12-bit Digital Analog Converters
34
35 The 2 converters (i.e. channel1 & channel2)
36 can be used independently or simultaneously (dual mode):
37 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
38 peripherals (ex. OPAMPs, comparators).
39 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
40 peripherals (ex. OPAMPs, comparators).
41
42 *** DAC Triggers ***
43 ====================
44 [..]
45 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
46 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
47 [..]
48 Digital to Analog conversion can be triggered by:
49 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
50 The used pin (GPIOx_PIN_9) must be configured in input mode.
51
52 (#) Timers TRGO: TIM1, TIM2, TIM4, TIM5, TIM6, TIM7, TIM8, TIM15, TIM23 and TIM24
53 (DAC_TRIGGER_T1_TRGO, DAC_TRIGGER_T2_TRGO...)
54
55 (#) Low Power Timers TRGO: LPTIM1, LPTIM2 and LPTIM3
56 (DAC_TRIGGER_LPTIM1_OUT, DAC_TRIGGER_LPTIM2_OUT)
57
58 (#) High Resolution Timer TRGO: HRTIM1
59 (DAC_TRIGGER_HR1_TRGO1, DAC_TRIGGER_HR1_TRGO2)
60
61 (#) Software using DAC_TRIGGER_SOFTWARE
62
63 *** DAC Buffer mode feature ***
64 ===============================
65 [..]
66 Each DAC channel integrates an output buffer that can be used to
67 reduce the output impedance, and to drive external loads directly
68 without having to add an external operational amplifier.
69 To enable, the output buffer use
70 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
71 [..]
72 (@) Refer to the device datasheet for more details about output
73 impedance value with and without output buffer.
74
75 *** GPIO configurations guidelines ***
76 =====================
77 [..]
78 When a DAC channel is used (ex channel1 on PA4) and the other is not
79 (ex channel2 on PA5 is configured in Analog and disabled).
80 Channel1 may disturb channel2 as coupling effect.
81 Note that there is no coupling on channel2 as soon as channel2 is turned on.
82 Coupling on adjacent channel could be avoided as follows:
83 when unused PA5 is configured as INPUT PULL-UP or DOWN.
84 PA5 is configured in ANALOG just before it is turned on.
85
86 *** DAC Sample and Hold feature ***
87 ========================
88 [..]
89 For each converter, 2 modes are supported: normal mode and
90 "sample and hold" mode (i.e. low power mode).
91 In the sample and hold mode, the DAC core converts data, then holds the
92 converted voltage on a capacitor. When not converting, the DAC cores and
93 buffer are completely turned off between samples and the DAC output is
94 tri-stated, therefore reducing the overall power consumption. A new
95 stabilization period is needed before each new conversion.
96
97 The sample and hold allow setting internal or external voltage @
98 low power consumption cost (output value can be at any given rate either
99 by CPU or DMA).
100
101 The Sample and hold block and registers uses either LSI & run in
102 several power modes: run mode, sleep mode, low power run, low power sleep
103 mode & stop1 mode.
104
105 Low power stop1 mode allows only static conversion.
106
107 To enable Sample and Hold mode
108 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
109 RCC_LSI_ON parameters.
110
111 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
112 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
113 DAC_HoldTime & DAC_RefreshTime;
114
115 *** DAC calibration feature ***
116 ===================================
117 [..]
118 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
119 (++) Calibration aims at correcting some offset of output buffer.
120 (++) The DAC uses either factory calibration settings OR user defined
121 calibration (trimming) settings (i.e. trimming mode).
122 (++) The user defined settings can be figured out using self calibration
123 handled by HAL_DACEx_SelfCalibrate.
124 (++) HAL_DACEx_SelfCalibrate:
125 (+++) Runs automatically the calibration.
126 (+++) Enables the user trimming mode
127 (+++) Updates a structure with trimming values with fresh calibration
128 results.
129 The user may store the calibration results for larger
130 (ex monitoring the trimming as a function of temperature
131 for instance)
132
133 *** DAC wave generation feature ***
134 ===================================
135 [..]
136 Both DAC channels can be used to generate
137 (#) Noise wave
138 (#) Triangle wave
139
140 *** DAC data format ***
141 =======================
142 [..]
143 The DAC data format can be:
144 (#) 8-bit right alignment using DAC_ALIGN_8B_R
145 (#) 12-bit left alignment using DAC_ALIGN_12B_L
146 (#) 12-bit right alignment using DAC_ALIGN_12B_R
147
148 *** DAC data value to voltage correspondence ***
149 ================================================
150 [..]
151 The analog output voltage on each DAC channel pin is determined
152 by the following equation:
153 [..]
154 DAC_OUTx = VREF+ * DOR / 4095
155 (+) with DOR is the Data Output Register
156 [..]
157 VREF+ is the input voltage reference (refer to the device datasheet)
158 [..]
159 e.g. To set DAC_OUT1 to 0.7V, use
160 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
161
162 *** DMA requests ***
163 =====================
164 [..]
165 A DMA request can be generated when an external trigger (but not a software trigger)
166 occurs if DMA requests are enabled using HAL_DAC_Start_DMA().
167 DMA requests are mapped as following:
168 (#) DAC channel1: mapped on DMA_REQUEST_DAC1_CH1
169 (#) DAC channel2: mapped on DMA_REQUEST_DAC1_CH2
170
171 [..]
172 (@) For Dual mode and specific signal (Triangle and noise) generation please
173 refer to Extended Features Driver description
174
175 ##### How to use this driver #####
176 ==============================================================================
177 [..]
178 (+) DAC APB clock must be enabled to get write access to DAC
179 registers using HAL_DAC_Init()
180 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
181 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
182 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
183
184 *** Calibration mode IO operation ***
185 ======================================
186 [..]
187 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
188 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
189 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
190
191 *** Polling mode IO operation ***
192 =================================
193 [..]
194 (+) Start the DAC peripheral using HAL_DAC_Start()
195 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
196 (+) Stop the DAC peripheral using HAL_DAC_Stop()
197
198 *** DMA mode IO operation ***
199 ==============================
200 [..]
201 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
202 of data to be transferred at each end of conversion
203 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
204 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
205 function is executed and user can add his own code by customization of function pointer
206 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
207 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
208 function is executed and user can add his own code by customization of function pointer
209 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
210 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
211 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
212 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
213 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
214 function is executed and user can add his own code by customization of function pointer
215 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
216 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
217 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
218
219 *** Callback registration ***
220 =============================================
221 [..]
222 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
223 allows the user to configure dynamically the driver callbacks.
224
225 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
226 it allows to register following callbacks:
227 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
228 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
229 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
230 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
231 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
232 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
233 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
234 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
235 (+) MspInitCallback : DAC MspInit.
236 (+) MspDeInitCallback : DAC MspdeInit.
237 This function takes as parameters the HAL peripheral handle, the Callback ID
238 and a pointer to the user callback function.
239
240 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
241 weak (overridden) function. It allows to reset following callbacks:
242 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
243 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
244 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
245 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
246 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
247 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
248 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
249 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
250 (+) MspInitCallback : DAC MspInit.
251 (+) MspDeInitCallback : DAC MspdeInit.
252 (+) All Callbacks
253 This function) takes as parameters the HAL peripheral handle and the Callback ID.
254
255 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
256 all callbacks are reset to the corresponding legacy weak (overridden) functions.
257 Exception done for MspInit and MspDeInit callbacks that are respectively
258 reset to the legacy weak (overridden) functions in the HAL_DAC_Init
259 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
260 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
261 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
262
263 Callbacks can be registered/unregistered in READY state only.
264 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
265 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
266 during the Init/DeInit.
267 In that case first register the MspInit/MspDeInit user callbacks
268 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
269 or HAL_DAC_Init function.
270
271 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
272 not defined, the callback registering feature is not available
273 and weak (overridden) callbacks are used.
274
275 *** DAC HAL driver macros list ***
276 =============================================
277 [..]
278 Below the list of most used macros in DAC HAL driver.
279
280 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
281 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
282 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
283 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
284
285 [..]
286 (@) You can refer to the DAC HAL driver header file for more useful macros
287
288 @endverbatim
289 ******************************************************************************
290 */
291
292 /* Includes ------------------------------------------------------------------*/
293 #include "stm32h7xx_hal.h"
294
295 /** @addtogroup STM32H7xx_HAL_Driver
296 * @{
297 */
298
299 #ifdef HAL_DAC_MODULE_ENABLED
300 #if defined(DAC1) || defined(DAC2)
301
302 /** @defgroup DAC DAC
303 * @brief DAC driver modules
304 * @{
305 */
306
307 /* Private typedef -----------------------------------------------------------*/
308 /* Private define ------------------------------------------------------------*/
309 /* Private constants ---------------------------------------------------------*/
310 /** @addtogroup DAC_Private_Constants DAC Private Constants
311 * @{
312 */
313 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
314
315 /**
316 * @}
317 */
318
319 /* Private macro -------------------------------------------------------------*/
320 /* Private variables ---------------------------------------------------------*/
321 /* Private function prototypes -----------------------------------------------*/
322 /* Exported functions -------------------------------------------------------*/
323
324 /** @defgroup DAC_Exported_Functions DAC Exported Functions
325 * @{
326 */
327
328 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
329 * @brief Initialization and Configuration functions
330 *
331 @verbatim
332 ==============================================================================
333 ##### Initialization and de-initialization functions #####
334 ==============================================================================
335 [..] This section provides functions allowing to:
336 (+) Initialize and configure the DAC.
337 (+) De-initialize the DAC.
338
339 @endverbatim
340 * @{
341 */
342
343 /**
344 * @brief Initialize the DAC peripheral according to the specified parameters
345 * in the DAC_InitStruct and initialize the associated handle.
346 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
347 * the configuration information for the specified DAC.
348 * @retval HAL status
349 */
350 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
351 {
352 /* Check the DAC peripheral handle */
353 if (hdac == NULL)
354 {
355 return HAL_ERROR;
356 }
357 /* Check the parameters */
358 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
359
360 if (hdac->State == HAL_DAC_STATE_RESET)
361 {
362 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
363 /* Init the DAC Callback settings */
364 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
365 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
366 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
367 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
368
369 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
370 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
371 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
372 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
373
374 if (hdac->MspInitCallback == NULL)
375 {
376 hdac->MspInitCallback = HAL_DAC_MspInit;
377 }
378 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
379
380 /* Allocate lock resource and initialize it */
381 hdac->Lock = HAL_UNLOCKED;
382
383 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
384 /* Init the low level hardware */
385 hdac->MspInitCallback(hdac);
386 #else
387 /* Init the low level hardware */
388 HAL_DAC_MspInit(hdac);
389 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
390 }
391
392 /* Initialize the DAC state*/
393 hdac->State = HAL_DAC_STATE_BUSY;
394
395 /* Set DAC error code to none */
396 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
397
398 /* Initialize the DAC state*/
399 hdac->State = HAL_DAC_STATE_READY;
400
401 /* Return function status */
402 return HAL_OK;
403 }
404
405 /**
406 * @brief Deinitialize the DAC peripheral registers to their default reset values.
407 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
408 * the configuration information for the specified DAC.
409 * @retval HAL status
410 */
411 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
412 {
413 /* Check the DAC peripheral handle */
414 if (hdac == NULL)
415 {
416 return HAL_ERROR;
417 }
418
419 /* Check the parameters */
420 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
421
422 /* Change DAC state */
423 hdac->State = HAL_DAC_STATE_BUSY;
424
425 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
426 if (hdac->MspDeInitCallback == NULL)
427 {
428 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
429 }
430 /* DeInit the low level hardware */
431 hdac->MspDeInitCallback(hdac);
432 #else
433 /* DeInit the low level hardware */
434 HAL_DAC_MspDeInit(hdac);
435 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
436
437 /* Set DAC error code to none */
438 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
439
440 /* Change DAC state */
441 hdac->State = HAL_DAC_STATE_RESET;
442
443 /* Release Lock */
444 __HAL_UNLOCK(hdac);
445
446 /* Return function status */
447 return HAL_OK;
448 }
449
450 /**
451 * @brief Initialize the DAC MSP.
452 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
453 * the configuration information for the specified DAC.
454 * @retval None
455 */
456 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
457 {
458 /* Prevent unused argument(s) compilation warning */
459 UNUSED(hdac);
460
461 /* NOTE : This function should not be modified, when the callback is needed,
462 the HAL_DAC_MspInit could be implemented in the user file
463 */
464 }
465
466 /**
467 * @brief DeInitialize the DAC MSP.
468 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
469 * the configuration information for the specified DAC.
470 * @retval None
471 */
472 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
473 {
474 /* Prevent unused argument(s) compilation warning */
475 UNUSED(hdac);
476
477 /* NOTE : This function should not be modified, when the callback is needed,
478 the HAL_DAC_MspDeInit could be implemented in the user file
479 */
480 }
481
482 /**
483 * @}
484 */
485
486 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
487 * @brief IO operation functions
488 *
489 @verbatim
490 ==============================================================================
491 ##### IO operation functions #####
492 ==============================================================================
493 [..] This section provides functions allowing to:
494 (+) Start conversion.
495 (+) Stop conversion.
496 (+) Start conversion and enable DMA transfer.
497 (+) Stop conversion and disable DMA transfer.
498 (+) Get result of conversion.
499
500 @endverbatim
501 * @{
502 */
503
504 /**
505 * @brief Enables DAC and starts conversion of channel.
506 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
507 * the configuration information for the specified DAC.
508 * @param Channel The selected DAC channel.
509 * This parameter can be one of the following values:
510 * @arg DAC_CHANNEL_1: DAC Channel1 selected
511 * @arg DAC_CHANNEL_2: DAC Channel2 selected
512 * @retval HAL status
513 */
514 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
515 {
516 /* Check the DAC peripheral handle */
517 if (hdac == NULL)
518 {
519 return HAL_ERROR;
520 }
521
522 /* Check the parameters */
523 assert_param(IS_DAC_CHANNEL(Channel));
524
525 /* Process locked */
526 __HAL_LOCK(hdac);
527
528 /* Change DAC state */
529 hdac->State = HAL_DAC_STATE_BUSY;
530
531 /* Enable the Peripheral */
532 __HAL_DAC_ENABLE(hdac, Channel);
533
534 if (Channel == DAC_CHANNEL_1)
535 {
536 /* Check if software trigger enabled */
537 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
538 {
539 /* Enable the selected DAC software conversion */
540 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
541 }
542 }
543
544 else
545 {
546 /* Check if software trigger enabled */
547 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
548 {
549 /* Enable the selected DAC software conversion*/
550 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
551 }
552 }
553
554
555 /* Change DAC state */
556 hdac->State = HAL_DAC_STATE_READY;
557
558 /* Process unlocked */
559 __HAL_UNLOCK(hdac);
560
561 /* Return function status */
562 return HAL_OK;
563 }
564
565 /**
566 * @brief Disables DAC and stop conversion of channel.
567 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
568 * the configuration information for the specified DAC.
569 * @param Channel The selected DAC channel.
570 * This parameter can be one of the following values:
571 * @arg DAC_CHANNEL_1: DAC Channel1 selected
572 * @arg DAC_CHANNEL_2: DAC Channel2 selected
573 * @retval HAL status
574 */
575 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
576 {
577 /* Check the DAC peripheral handle */
578 if (hdac == NULL)
579 {
580 return HAL_ERROR;
581 }
582
583 /* Check the parameters */
584 assert_param(IS_DAC_CHANNEL(Channel));
585
586 /* Disable the Peripheral */
587 __HAL_DAC_DISABLE(hdac, Channel);
588
589 /* Change DAC state */
590 hdac->State = HAL_DAC_STATE_READY;
591
592 /* Return function status */
593 return HAL_OK;
594 }
595
596 /**
597 * @brief Enables DAC and starts conversion of channel.
598 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
599 * the configuration information for the specified DAC.
600 * @param Channel The selected DAC channel.
601 * This parameter can be one of the following values:
602 * @arg DAC_CHANNEL_1: DAC Channel1 selected
603 * @arg DAC_CHANNEL_2: DAC Channel2 selected
604 * @param pData The source Buffer address.
605 * @param Length The length of data to be transferred from memory to DAC peripheral
606 * @param Alignment Specifies the data alignment for DAC channel.
607 * This parameter can be one of the following values:
608 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
609 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
610 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
611 * @retval HAL status
612 */
613 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
614 uint32_t Alignment)
615 {
616 HAL_StatusTypeDef status;
617 uint32_t tmpreg;
618
619 /* Check the DAC peripheral handle */
620 if (hdac == NULL)
621 {
622 return HAL_ERROR;
623 }
624
625 /* Check the parameters */
626 assert_param(IS_DAC_CHANNEL(Channel));
627 assert_param(IS_DAC_ALIGN(Alignment));
628
629 /* Process locked */
630 __HAL_LOCK(hdac);
631
632 /* Change DAC state */
633 hdac->State = HAL_DAC_STATE_BUSY;
634
635 if (Channel == DAC_CHANNEL_1)
636 {
637 /* Set the DMA transfer complete callback for channel1 */
638 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
639
640 /* Set the DMA half transfer complete callback for channel1 */
641 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
642
643 /* Set the DMA error callback for channel1 */
644 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
645
646 /* Enable the selected DAC channel1 DMA request */
647 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
648
649 /* Case of use of channel 1 */
650 switch (Alignment)
651 {
652 case DAC_ALIGN_12B_R:
653 /* Get DHR12R1 address */
654 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
655 break;
656 case DAC_ALIGN_12B_L:
657 /* Get DHR12L1 address */
658 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
659 break;
660 default: /* case DAC_ALIGN_8B_R */
661 /* Get DHR8R1 address */
662 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
663 break;
664 }
665 }
666
667 else
668 {
669 /* Set the DMA transfer complete callback for channel2 */
670 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
671
672 /* Set the DMA half transfer complete callback for channel2 */
673 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
674
675 /* Set the DMA error callback for channel2 */
676 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
677
678 /* Enable the selected DAC channel2 DMA request */
679 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
680
681 /* Case of use of channel 2 */
682 switch (Alignment)
683 {
684 case DAC_ALIGN_12B_R:
685 /* Get DHR12R2 address */
686 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
687 break;
688 case DAC_ALIGN_12B_L:
689 /* Get DHR12L2 address */
690 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
691 break;
692 default: /* case DAC_ALIGN_8B_R */
693 /* Get DHR8R2 address */
694 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
695 break;
696 }
697 }
698
699 if (Channel == DAC_CHANNEL_1)
700 {
701 /* Enable the DAC DMA underrun interrupt */
702 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
703
704 /* Enable the DMA Stream */
705 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
706 }
707
708 else
709 {
710 /* Enable the DAC DMA underrun interrupt */
711 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
712
713 /* Enable the DMA Stream */
714 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
715 }
716
717
718 /* Process Unlocked */
719 __HAL_UNLOCK(hdac);
720
721 if (status == HAL_OK)
722 {
723 /* Enable the Peripheral */
724 __HAL_DAC_ENABLE(hdac, Channel);
725 }
726 else
727 {
728 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
729 }
730
731 /* Return function status */
732 return status;
733 }
734
735 /**
736 * @brief Disables DAC and stop conversion of channel.
737 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
738 * the configuration information for the specified DAC.
739 * @param Channel The selected DAC channel.
740 * This parameter can be one of the following values:
741 * @arg DAC_CHANNEL_1: DAC Channel1 selected
742 * @arg DAC_CHANNEL_2: DAC Channel2 selected
743 * @retval HAL status
744 */
745 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
746 {
747 /* Check the DAC peripheral handle */
748 if (hdac == NULL)
749 {
750 return HAL_ERROR;
751 }
752
753 /* Check the parameters */
754 assert_param(IS_DAC_CHANNEL(Channel));
755
756 /* Disable the selected DAC channel DMA request */
757 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
758
759 /* Disable the Peripheral */
760 __HAL_DAC_DISABLE(hdac, Channel);
761
762 /* Disable the DMA Stream */
763
764 /* Channel1 is used */
765 if (Channel == DAC_CHANNEL_1)
766 {
767 /* Disable the DMA Stream */
768 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
769
770 /* Disable the DAC DMA underrun interrupt */
771 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
772 }
773
774 else /* Channel2 is used for */
775 {
776 /* Disable the DMA Stream */
777 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
778
779 /* Disable the DAC DMA underrun interrupt */
780 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
781 }
782
783
784 /* Change DAC state */
785 hdac->State = HAL_DAC_STATE_READY;
786
787 /* Return function status */
788 return HAL_OK;
789 }
790
791 /**
792 * @brief Handles DAC interrupt request
793 * This function uses the interruption of DMA
794 * underrun.
795 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
796 * the configuration information for the specified DAC.
797 * @retval None
798 */
799 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
800 {
801 uint32_t itsource = hdac->Instance->CR;
802 uint32_t itflag = hdac->Instance->SR;
803
804 if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1)
805 {
806 /* Check underrun flag of DAC channel 1 */
807 if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1)
808 {
809 /* Change DAC state to error state */
810 hdac->State = HAL_DAC_STATE_ERROR;
811
812 /* Set DAC error code to channel1 DMA underrun error */
813 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
814
815 /* Clear the underrun flag */
816 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
817
818 /* Disable the selected DAC channel1 DMA request */
819 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1);
820
821 /* Error callback */
822 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
823 hdac->DMAUnderrunCallbackCh1(hdac);
824 #else
825 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
826 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
827 }
828 }
829
830
831 if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2)
832 {
833 /* Check underrun flag of DAC channel 2 */
834 if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2)
835 {
836 /* Change DAC state to error state */
837 hdac->State = HAL_DAC_STATE_ERROR;
838
839 /* Set DAC error code to channel2 DMA underrun error */
840 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
841
842 /* Clear the underrun flag */
843 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
844
845 /* Disable the selected DAC channel2 DMA request */
846 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2);
847
848 /* Error callback */
849 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
850 hdac->DMAUnderrunCallbackCh2(hdac);
851 #else
852 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
853 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
854 }
855 }
856
857 }
858
859 /**
860 * @brief Set the specified data holding register value for DAC channel.
861 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
862 * the configuration information for the specified DAC.
863 * @param Channel The selected DAC channel.
864 * This parameter can be one of the following values:
865 * @arg DAC_CHANNEL_1: DAC Channel1 selected
866 * @arg DAC_CHANNEL_2: DAC Channel2 selected
867 * @param Alignment Specifies the data alignment.
868 * This parameter can be one of the following values:
869 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
870 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
871 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
872 * @param Data Data to be loaded in the selected data holding register.
873 * @retval HAL status
874 */
875 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
876 {
877 __IO uint32_t tmp = 0UL;
878
879 /* Check the DAC peripheral handle */
880 if (hdac == NULL)
881 {
882 return HAL_ERROR;
883 }
884
885 /* Check the parameters */
886 assert_param(IS_DAC_CHANNEL(Channel));
887 assert_param(IS_DAC_ALIGN(Alignment));
888 assert_param(IS_DAC_DATA(Data));
889
890 tmp = (uint32_t)hdac->Instance;
891 if (Channel == DAC_CHANNEL_1)
892 {
893 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
894 }
895
896 else
897 {
898 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
899 }
900
901
902 /* Set the DAC channel selected data holding register */
903 *(__IO uint32_t *) tmp = Data;
904
905 /* Return function status */
906 return HAL_OK;
907 }
908
909 /**
910 * @brief Conversion complete callback in non-blocking mode for Channel1
911 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
912 * the configuration information for the specified DAC.
913 * @retval None
914 */
915 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
916 {
917 /* Prevent unused argument(s) compilation warning */
918 UNUSED(hdac);
919
920 /* NOTE : This function should not be modified, when the callback is needed,
921 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
922 */
923 }
924
925 /**
926 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
927 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
928 * the configuration information for the specified DAC.
929 * @retval None
930 */
931 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
932 {
933 /* Prevent unused argument(s) compilation warning */
934 UNUSED(hdac);
935
936 /* NOTE : This function should not be modified, when the callback is needed,
937 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
938 */
939 }
940
941 /**
942 * @brief Error DAC callback for Channel1.
943 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
944 * the configuration information for the specified DAC.
945 * @retval None
946 */
947 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
948 {
949 /* Prevent unused argument(s) compilation warning */
950 UNUSED(hdac);
951
952 /* NOTE : This function should not be modified, when the callback is needed,
953 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
954 */
955 }
956
957 /**
958 * @brief DMA underrun DAC callback for channel1.
959 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
960 * the configuration information for the specified DAC.
961 * @retval None
962 */
963 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
964 {
965 /* Prevent unused argument(s) compilation warning */
966 UNUSED(hdac);
967
968 /* NOTE : This function should not be modified, when the callback is needed,
969 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
970 */
971 }
972
973 /**
974 * @}
975 */
976
977 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
978 * @brief Peripheral Control functions
979 *
980 @verbatim
981 ==============================================================================
982 ##### Peripheral Control functions #####
983 ==============================================================================
984 [..] This section provides functions allowing to:
985 (+) Configure channels.
986 (+) Set the specified data holding register value for DAC channel.
987
988 @endverbatim
989 * @{
990 */
991
992 /**
993 * @brief Returns the last data output value of the selected DAC channel.
994 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
995 * the configuration information for the specified DAC.
996 * @param Channel The selected DAC channel.
997 * This parameter can be one of the following values:
998 * @arg DAC_CHANNEL_1: DAC Channel1 selected
999 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1000 * @retval The selected DAC channel data output value.
1001 */
1002 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel)
1003 {
1004 uint32_t result;
1005
1006 /* Check the DAC peripheral handle */
1007 assert_param(hdac != NULL);
1008
1009 /* Check the parameters */
1010 assert_param(IS_DAC_CHANNEL(Channel));
1011
1012 if (Channel == DAC_CHANNEL_1)
1013 {
1014 result = hdac->Instance->DOR1;
1015 }
1016
1017 else
1018 {
1019 result = hdac->Instance->DOR2;
1020 }
1021
1022 /* Returns the DAC channel data output register value */
1023 return result;
1024 }
1025
1026 /**
1027 * @brief Configures the selected DAC channel.
1028 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1029 * the configuration information for the specified DAC.
1030 * @param sConfig DAC configuration structure.
1031 * @param Channel The selected DAC channel.
1032 * This parameter can be one of the following values:
1033 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1034 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1035 * @retval HAL status
1036 */
1037 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
1038 const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1039 {
1040 HAL_StatusTypeDef status = HAL_OK;
1041 uint32_t tmpreg1;
1042 uint32_t tmpreg2;
1043 uint32_t tickstart;
1044 uint32_t connectOnChip;
1045
1046 /* Check the DAC peripheral handle and channel configuration struct */
1047 if ((hdac == NULL) || (sConfig == NULL))
1048 {
1049 return HAL_ERROR;
1050 }
1051
1052 /* Check the DAC parameters */
1053 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1054 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1055 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1056 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1057 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1058 {
1059 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1060 }
1061 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1062 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1063 {
1064 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1065 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1066 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1067 }
1068 else
1069 {
1070 /* In case of mode normal and buffer disabled, connection to both on chip periph and external pin is not possible */
1071 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_DISABLE)
1072 {
1073 assert_param(sConfig->DAC_ConnectOnChipPeripheral != DAC_CHIPCONNECT_BOTH);
1074 }
1075 }
1076 assert_param(IS_DAC_CHANNEL(Channel));
1077
1078 /* Process locked */
1079 __HAL_LOCK(hdac);
1080
1081 /* Change DAC state */
1082 hdac->State = HAL_DAC_STATE_BUSY;
1083
1084 /* Sample and hold configuration */
1085 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1086 {
1087 /* Get timeout */
1088 tickstart = HAL_GetTick();
1089
1090 if (Channel == DAC_CHANNEL_1)
1091 {
1092 /* SHSR1 can be written when BWST1 is cleared */
1093 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1094 {
1095 /* Check for the Timeout */
1096 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1097 {
1098 /* New check to avoid false timeout detection in case of preemption */
1099 if (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1100 {
1101 /* Update error code */
1102 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1103
1104 /* Change the DMA state */
1105 hdac->State = HAL_DAC_STATE_TIMEOUT;
1106
1107 return HAL_TIMEOUT;
1108 }
1109 }
1110 }
1111 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1112 }
1113
1114 else /* Channel 2 */
1115 {
1116 /* SHSR2 can be written when BWST2 is cleared */
1117 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1118 {
1119 /* Check for the Timeout */
1120 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1121 {
1122 /* New check to avoid false timeout detection in case of preemption */
1123 if (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1124 {
1125 /* Update error code */
1126 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1127
1128 /* Change the DMA state */
1129 hdac->State = HAL_DAC_STATE_TIMEOUT;
1130
1131 return HAL_TIMEOUT;
1132 }
1133 }
1134 }
1135 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1136 }
1137
1138
1139 /* HoldTime */
1140 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1141 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1142 /* RefreshTime */
1143 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1144 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1145 }
1146
1147 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1148 /* USER TRIMMING */
1149 {
1150 /* Get the DAC CCR value */
1151 tmpreg1 = hdac->Instance->CCR;
1152 /* Clear trimming value */
1153 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1154 /* Configure for the selected trimming offset */
1155 tmpreg2 = sConfig->DAC_TrimmingValue;
1156 /* Calculate CCR register value depending on DAC_Channel */
1157 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1158 /* Write to DAC CCR */
1159 hdac->Instance->CCR = tmpreg1;
1160 }
1161 /* else factory trimming is used (factory setting are available at reset)*/
1162 /* SW Nothing has nothing to do */
1163
1164 /* Get the DAC MCR value */
1165 tmpreg1 = hdac->Instance->MCR;
1166 /* Clear DAC_MCR_MODEx bits */
1167 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1168 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1169
1170
1171 if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_EXTERNAL)
1172 {
1173 connectOnChip = 0x00000000UL;
1174 }
1175 else if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_INTERNAL)
1176 {
1177 connectOnChip = DAC_MCR_MODE1_0;
1178 }
1179 else /* (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_BOTH) */
1180 {
1181 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE)
1182 {
1183 connectOnChip = DAC_MCR_MODE1_0;
1184 }
1185 else
1186 {
1187 connectOnChip = 0x00000000UL;
1188 }
1189 }
1190 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip);
1191 /* Calculate MCR register value depending on DAC_Channel */
1192 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1193 /* Write to DAC MCR */
1194 hdac->Instance->MCR = tmpreg1;
1195
1196 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1197 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1198
1199 /* Get the DAC CR value */
1200 tmpreg1 = hdac->Instance->CR;
1201 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1202 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1203 /* Configure for the selected DAC channel: trigger */
1204 /* Set TSELx and TENx bits according to DAC_Trigger value */
1205 tmpreg2 = sConfig->DAC_Trigger;
1206 /* Calculate CR register value depending on DAC_Channel */
1207 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1208 /* Write to DAC CR */
1209 hdac->Instance->CR = tmpreg1;
1210 /* Disable wave generation */
1211 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
1212
1213 /* Change DAC state */
1214 hdac->State = HAL_DAC_STATE_READY;
1215
1216 /* Process unlocked */
1217 __HAL_UNLOCK(hdac);
1218
1219 /* Return function status */
1220 return status;
1221 }
1222
1223 /**
1224 * @}
1225 */
1226
1227 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1228 * @brief Peripheral State and Errors functions
1229 *
1230 @verbatim
1231 ==============================================================================
1232 ##### Peripheral State and Errors functions #####
1233 ==============================================================================
1234 [..]
1235 This subsection provides functions allowing to
1236 (+) Check the DAC state.
1237 (+) Check the DAC Errors.
1238
1239 @endverbatim
1240 * @{
1241 */
1242
1243 /**
1244 * @brief return the DAC handle state
1245 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1246 * the configuration information for the specified DAC.
1247 * @retval HAL state
1248 */
1249 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac)
1250 {
1251 /* Return DAC handle state */
1252 return hdac->State;
1253 }
1254
1255
1256 /**
1257 * @brief Return the DAC error code
1258 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1259 * the configuration information for the specified DAC.
1260 * @retval DAC Error Code
1261 */
1262 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac)
1263 {
1264 return hdac->ErrorCode;
1265 }
1266
1267 /**
1268 * @}
1269 */
1270
1271 /**
1272 * @}
1273 */
1274
1275 /** @addtogroup DAC_Exported_Functions
1276 * @{
1277 */
1278
1279 /** @addtogroup DAC_Exported_Functions_Group1
1280 * @{
1281 */
1282 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1283 /**
1284 * @brief Register a User DAC Callback
1285 * To be used instead of the weak (overridden) predefined callback
1286 * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register
1287 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1288 * @param hdac DAC handle
1289 * @param CallbackID ID of the callback to be registered
1290 * This parameter can be one of the following values:
1291 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1292 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1293 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1294 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1295 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1296 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1297 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1298 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1299 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1300 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1301 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1302 *
1303 * @param pCallback pointer to the Callback function
1304 * @retval status
1305 */
1306 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1307 pDAC_CallbackTypeDef pCallback)
1308 {
1309 HAL_StatusTypeDef status = HAL_OK;
1310
1311 /* Check the DAC peripheral handle */
1312 if (hdac == NULL)
1313 {
1314 return HAL_ERROR;
1315 }
1316
1317 if (pCallback == NULL)
1318 {
1319 /* Update the error code */
1320 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1321 return HAL_ERROR;
1322 }
1323
1324 if (hdac->State == HAL_DAC_STATE_READY)
1325 {
1326 switch (CallbackID)
1327 {
1328 case HAL_DAC_CH1_COMPLETE_CB_ID :
1329 hdac->ConvCpltCallbackCh1 = pCallback;
1330 break;
1331 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1332 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1333 break;
1334 case HAL_DAC_CH1_ERROR_ID :
1335 hdac->ErrorCallbackCh1 = pCallback;
1336 break;
1337 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1338 hdac->DMAUnderrunCallbackCh1 = pCallback;
1339 break;
1340
1341 case HAL_DAC_CH2_COMPLETE_CB_ID :
1342 hdac->ConvCpltCallbackCh2 = pCallback;
1343 break;
1344 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1345 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1346 break;
1347 case HAL_DAC_CH2_ERROR_ID :
1348 hdac->ErrorCallbackCh2 = pCallback;
1349 break;
1350 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1351 hdac->DMAUnderrunCallbackCh2 = pCallback;
1352 break;
1353
1354 case HAL_DAC_MSPINIT_CB_ID :
1355 hdac->MspInitCallback = pCallback;
1356 break;
1357 case HAL_DAC_MSPDEINIT_CB_ID :
1358 hdac->MspDeInitCallback = pCallback;
1359 break;
1360 default :
1361 /* Update the error code */
1362 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1363 /* update return status */
1364 status = HAL_ERROR;
1365 break;
1366 }
1367 }
1368 else if (hdac->State == HAL_DAC_STATE_RESET)
1369 {
1370 switch (CallbackID)
1371 {
1372 case HAL_DAC_MSPINIT_CB_ID :
1373 hdac->MspInitCallback = pCallback;
1374 break;
1375 case HAL_DAC_MSPDEINIT_CB_ID :
1376 hdac->MspDeInitCallback = pCallback;
1377 break;
1378 default :
1379 /* Update the error code */
1380 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1381 /* update return status */
1382 status = HAL_ERROR;
1383 break;
1384 }
1385 }
1386 else
1387 {
1388 /* Update the error code */
1389 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1390 /* update return status */
1391 status = HAL_ERROR;
1392 }
1393
1394 return status;
1395 }
1396
1397 /**
1398 * @brief Unregister a User DAC Callback
1399 * DAC Callback is redirected to the weak (overridden) predefined callback
1400 * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register
1401 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1402 * @param hdac DAC handle
1403 * @param CallbackID ID of the callback to be unregistered
1404 * This parameter can be one of the following values:
1405 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1406 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1407 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1408 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1409 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1410 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1411 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1412 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1413 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1414 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1415 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1416 * @retval status
1417 */
1418 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1419 {
1420 HAL_StatusTypeDef status = HAL_OK;
1421
1422 /* Check the DAC peripheral handle */
1423 if (hdac == NULL)
1424 {
1425 return HAL_ERROR;
1426 }
1427
1428 if (hdac->State == HAL_DAC_STATE_READY)
1429 {
1430 switch (CallbackID)
1431 {
1432 case HAL_DAC_CH1_COMPLETE_CB_ID :
1433 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1434 break;
1435 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1436 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1437 break;
1438 case HAL_DAC_CH1_ERROR_ID :
1439 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1440 break;
1441 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1442 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1443 break;
1444
1445 case HAL_DAC_CH2_COMPLETE_CB_ID :
1446 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1447 break;
1448 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1449 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1450 break;
1451 case HAL_DAC_CH2_ERROR_ID :
1452 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1453 break;
1454 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1455 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1456 break;
1457
1458 case HAL_DAC_MSPINIT_CB_ID :
1459 hdac->MspInitCallback = HAL_DAC_MspInit;
1460 break;
1461 case HAL_DAC_MSPDEINIT_CB_ID :
1462 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1463 break;
1464 case HAL_DAC_ALL_CB_ID :
1465 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1466 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1467 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1468 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1469
1470 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1471 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1472 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1473 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1474
1475 hdac->MspInitCallback = HAL_DAC_MspInit;
1476 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1477 break;
1478 default :
1479 /* Update the error code */
1480 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1481 /* update return status */
1482 status = HAL_ERROR;
1483 break;
1484 }
1485 }
1486 else if (hdac->State == HAL_DAC_STATE_RESET)
1487 {
1488 switch (CallbackID)
1489 {
1490 case HAL_DAC_MSPINIT_CB_ID :
1491 hdac->MspInitCallback = HAL_DAC_MspInit;
1492 break;
1493 case HAL_DAC_MSPDEINIT_CB_ID :
1494 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1495 break;
1496 default :
1497 /* Update the error code */
1498 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1499 /* update return status */
1500 status = HAL_ERROR;
1501 break;
1502 }
1503 }
1504 else
1505 {
1506 /* Update the error code */
1507 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1508 /* update return status */
1509 status = HAL_ERROR;
1510 }
1511
1512 return status;
1513 }
1514 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1515
1516 /**
1517 * @}
1518 */
1519
1520 /**
1521 * @}
1522 */
1523
1524 /** @addtogroup DAC_Private_Functions
1525 * @{
1526 */
1527
1528 /**
1529 * @brief DMA conversion complete callback.
1530 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1531 * the configuration information for the specified DMA module.
1532 * @retval None
1533 */
1534 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1535 {
1536 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1537
1538 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1539 hdac->ConvCpltCallbackCh1(hdac);
1540 #else
1541 HAL_DAC_ConvCpltCallbackCh1(hdac);
1542 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1543
1544 hdac->State = HAL_DAC_STATE_READY;
1545 }
1546
1547 /**
1548 * @brief DMA half transfer complete callback.
1549 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1550 * the configuration information for the specified DMA module.
1551 * @retval None
1552 */
1553 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1554 {
1555 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1556 /* Conversion complete callback */
1557 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1558 hdac->ConvHalfCpltCallbackCh1(hdac);
1559 #else
1560 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1561 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1562 }
1563
1564 /**
1565 * @brief DMA error callback
1566 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1567 * the configuration information for the specified DMA module.
1568 * @retval None
1569 */
1570 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1571 {
1572 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1573
1574 /* Set DAC error code to DMA error */
1575 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1576
1577 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1578 hdac->ErrorCallbackCh1(hdac);
1579 #else
1580 HAL_DAC_ErrorCallbackCh1(hdac);
1581 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1582
1583 hdac->State = HAL_DAC_STATE_READY;
1584 }
1585
1586 /**
1587 * @}
1588 */
1589
1590 /**
1591 * @}
1592 */
1593
1594 #endif /* DAC1 || DAC2 */
1595
1596 #endif /* HAL_DAC_MODULE_ENABLED */
1597 /**
1598 * @}
1599 */
INAV: Navigation-enabled flight control software