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Merge pull request #10592 from iNavFlight/MrD_Update-parameter-description
[inav.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Src / stm32h7xx_hal_lptim.c
blobb11c521a7ac799dda357db633587dff13d895cd9
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The LPTIM HAL driver can be used as follows:
20
21 (#)Initialize the LPTIM low level resources by implementing the
22 HAL_LPTIM_MspInit():
23 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
24 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
25 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
26 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
27 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
28
29 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
30 configures mainly:
31 (++) The instance: LPTIM1 or LPTIM2.
32 (++) Clock: the counter clock.
33 (+++) Source : it can be either the ULPTIM input (IN1) or one of
34 the internal clock; (APB, LSE, LSI or MSI).
35 (+++) Prescaler: select the clock divider.
36 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
37 as counter clock source.
38 (+++) Polarity: polarity of the active edge for the counter unit
39 if the ULPTIM input is selected.
40 (+++) SampleTime: clock sampling time to configure the clock glitch
41 filter.
42 (++) Trigger: How the counter start.
43 (+++) Source: trigger can be software or one of the hardware triggers.
44 (+++) ActiveEdge : only for hardware trigger.
45 (+++) SampleTime : trigger sampling time to configure the trigger
46 glitch filter.
47 (++) OutputPolarity : 2 opposite polarities are possible.
48 (++) UpdateMode: specifies whether the update of the autoreload and
49 the compare values is done immediately or after the end of current
50 period.
51 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
52 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
53 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
54
55 (#)Six modes are available:
56
57 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
59 mode.
60
61 (++) One Pulse Mode: To generate pulse with specified width in response
62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
64
65 (++) Set once Mode: In this mode, the output changes the level (from
66 low level to high level if the output polarity is configured high, else
67 the opposite) when a compare match occurs. To start this mode, call
68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
69 interruption mode.
70
71 (++) Encoder Mode: To use the encoder interface call
72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
73 interruption mode. Only available for LPTIM1 instance.
74
75 (++) Time out Mode: an active edge on one selected trigger input rests
76 the counter. The first trigger event will start the timer, any
77 successive trigger event will reset the counter and the timer will
78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
80
81 (++) Counter Mode: counter can be used to count external events on
82 the LPTIM Input1 or it can be used to count internal clock cycles.
83 To start this mode, call HAL_LPTIM_Counter_Start() or
84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
85
86
87 (#) User can stop any process by calling the corresponding API:
88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
89 already started in interruption mode.
90
91 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
92
93 *** Callback registration ***
94 =============================================
95 [..]
96 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
97 allows the user to configure dynamically the driver callbacks.
98 [..]
99 Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
100 @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
101 the Callback ID and a pointer to the user callback function.
102 [..]
103 Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
104 default weak function.
105 @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
106 and the Callback ID.
107 [..]
108 These functions allow to register/unregister following callbacks:
109
110 (+) MspInitCallback : LPTIM Base Msp Init Callback.
111 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
112 (+) CompareMatchCallback : Compare match Callback.
113 (+) AutoReloadMatchCallback : Auto-reload match Callback.
114 (+) TriggerCallback : External trigger event detection Callback.
115 (+) CompareWriteCallback : Compare register write complete Callback.
116 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
117 (+) DirectionUpCallback : Up-counting direction change Callback.
118 (+) DirectionDownCallback : Down-counting direction change Callback.
119
120 [..]
121 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
122 all interrupt callbacks are set to the corresponding weak functions:
123 examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
124
125 [..]
126 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
127 functionalities in the Init/DeInit only when these callbacks are null
128 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
129 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
130
131 [..]
132 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
133 Exception done MspInit/MspDeInit that can be registered/unregistered
134 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
135 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
136 In that case first register the MspInit/MspDeInit user callbacks
137 using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
138
139 [..]
140 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
141 not defined, the callback registration feature is not available and all callbacks
142 are set to the corresponding weak functions.
143
144 @endverbatim
145 ******************************************************************************
146 * @attention
147 *
148 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
149 * All rights reserved.</center></h2>
150 *
151 * This software component is licensed by ST under BSD 3-Clause license,
152 * the "License"; You may not use this file except in compliance with the
153 * License. You may obtain a copy of the License at:
154 * opensource.org/licenses/BSD-3-Clause
155 *
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32h7xx_hal.h"
161
162 /** @addtogroup STM32H7xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /* Private macro -------------------------------------------------------------*/
178 /** @addtogroup LPTIM_Private_Constants
179 * @{
180 */
181 #define TIMEOUT 1000UL /* Timeout is 1s */
182 /**
183 * @}
184 */
185
186 /* Private variables ---------------------------------------------------------*/
187 /* Private function prototypes -----------------------------------------------*/
188 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
189 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
190 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
191 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
192
193 /* Exported functions --------------------------------------------------------*/
194
195 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
196 * @{
197 */
198
199 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
200 * @brief Initialization and Configuration functions.
201 *
202 @verbatim
203 ==============================================================================
204 ##### Initialization and de-initialization functions #####
205 ==============================================================================
206 [..] This section provides functions allowing to:
207 (+) Initialize the LPTIM according to the specified parameters in the
208 LPTIM_InitTypeDef and initialize the associated handle.
209 (+) DeInitialize the LPTIM peripheral.
210 (+) Initialize the LPTIM MSP.
211 (+) DeInitialize the LPTIM MSP.
212
213 @endverbatim
214 * @{
215 */
216
217 /**
218 * @brief Initialize the LPTIM according to the specified parameters in the
219 * LPTIM_InitTypeDef and initialize the associated handle.
220 * @param hlptim LPTIM handle
221 * @retval HAL status
222 */
223 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
224 {
225 uint32_t tmpcfgr;
226
227 /* Check the LPTIM handle allocation */
228 if (hlptim == NULL)
229 {
230 return HAL_ERROR;
231 }
232
233 /* Check the parameters */
234 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
235
236 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
237 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
238 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
239 {
240 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
241 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
242 }
243 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
244 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
245 {
246 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
247 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
248 }
249 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
250 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
251 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
252
253 if (hlptim->State == HAL_LPTIM_STATE_RESET)
254 {
255 /* Allocate lock resource and initialize it */
256 hlptim->Lock = HAL_UNLOCKED;
257
258 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
259 /* Reset interrupt callbacks to legacy weak callbacks */
260 LPTIM_ResetCallback(hlptim);
261
262 if (hlptim->MspInitCallback == NULL)
263 {
264 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
265 }
266
267 /* Init the low level hardware : GPIO, CLOCK, NVIC */
268 hlptim->MspInitCallback(hlptim);
269 #else
270 /* Init the low level hardware : GPIO, CLOCK, NVIC */
271 HAL_LPTIM_MspInit(hlptim);
272 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
273 }
274
275 /* Change the LPTIM state */
276 hlptim->State = HAL_LPTIM_STATE_BUSY;
277
278 /* Get the LPTIMx CFGR value */
279 tmpcfgr = hlptim->Instance->CFGR;
280
281 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
282 {
283 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
284 }
285 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
286 {
287 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
288 }
289
290 /* Clear CKSEL, CKPOL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
291 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_CKPOL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
292 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
293
294 /* Set initialization parameters */
295 tmpcfgr |= (hlptim->Init.Clock.Source |
296 hlptim->Init.Clock.Prescaler |
297 hlptim->Init.OutputPolarity |
298 hlptim->Init.UpdateMode |
299 hlptim->Init.CounterSource);
300
301 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
302 {
303 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
304 hlptim->Init.UltraLowPowerClock.SampleTime);
305 }
306
307 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
308 {
309 /* Enable External trigger and set the trigger source */
310 tmpcfgr |= (hlptim->Init.Trigger.Source |
311 hlptim->Init.Trigger.ActiveEdge |
312 hlptim->Init.Trigger.SampleTime);
313 }
314
315 /* Write to LPTIMx CFGR */
316 hlptim->Instance->CFGR = tmpcfgr;
317
318 /* Configure LPTIM input sources */
319 if ((hlptim->Instance == LPTIM1)||(hlptim->Instance == LPTIM2))
320 {
321 /* Check LPTIM Input1 and Input2 sources */
322 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
323 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
324
325 /* Configure LPTIM Input1 and Input2 sources */
326 hlptim->Instance->CFGR2 = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
327 }
328 else
329 {
330 if(hlptim->Instance == LPTIM3)
331 {
332 /* Check LPTIM3 Input1 source */
333 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
334
335 /* Configure LPTIM3 Input1 source */
336 hlptim->Instance->CFGR2 = hlptim->Init.Input1Source;
337 }
338 }
339
340 /* Change the LPTIM state */
341 hlptim->State = HAL_LPTIM_STATE_READY;
342
343 /* Return function status */
344 return HAL_OK;
345 }
346
347 /**
348 * @brief DeInitialize the LPTIM peripheral.
349 * @param hlptim LPTIM handle
350 * @retval HAL status
351 */
352 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
353 {
354 /* Check the LPTIM handle allocation */
355 if (hlptim == NULL)
356 {
357 return HAL_ERROR;
358 }
359
360 /* Change the LPTIM state */
361 hlptim->State = HAL_LPTIM_STATE_BUSY;
362
363 /* Disable the LPTIM Peripheral Clock */
364 __HAL_LPTIM_DISABLE(hlptim);
365
366 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
367 {
368 return HAL_TIMEOUT;
369 }
370
371 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
372 if (hlptim->MspDeInitCallback == NULL)
373 {
374 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
375 }
376
377 /* DeInit the low level hardware: CLOCK, NVIC.*/
378 hlptim->MspDeInitCallback(hlptim);
379 #else
380 /* DeInit the low level hardware: CLOCK, NVIC.*/
381 HAL_LPTIM_MspDeInit(hlptim);
382 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
383
384 /* Change the LPTIM state */
385 hlptim->State = HAL_LPTIM_STATE_RESET;
386
387 /* Release Lock */
388 __HAL_UNLOCK(hlptim);
389
390 /* Return function status */
391 return HAL_OK;
392 }
393
394 /**
395 * @brief Initialize the LPTIM MSP.
396 * @param hlptim LPTIM handle
397 * @retval None
398 */
399 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
400 {
401 /* Prevent unused argument(s) compilation warning */
402 UNUSED(hlptim);
403
404 /* NOTE : This function should not be modified, when the callback is needed,
405 the HAL_LPTIM_MspInit could be implemented in the user file
406 */
407 }
408
409 /**
410 * @brief DeInitialize LPTIM MSP.
411 * @param hlptim LPTIM handle
412 * @retval None
413 */
414 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
415 {
416 /* Prevent unused argument(s) compilation warning */
417 UNUSED(hlptim);
418
419 /* NOTE : This function should not be modified, when the callback is needed,
420 the HAL_LPTIM_MspDeInit could be implemented in the user file
421 */
422 }
423
424 /**
425 * @}
426 */
427
428 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
429 * @brief Start-Stop operation functions.
430 *
431 @verbatim
432 ==============================================================================
433 ##### LPTIM Start Stop operation functions #####
434 ==============================================================================
435 [..] This section provides functions allowing to:
436 (+) Start the PWM mode.
437 (+) Stop the PWM mode.
438 (+) Start the One pulse mode.
439 (+) Stop the One pulse mode.
440 (+) Start the Set once mode.
441 (+) Stop the Set once mode.
442 (+) Start the Encoder mode.
443 (+) Stop the Encoder mode.
444 (+) Start the Timeout mode.
445 (+) Stop the Timeout mode.
446 (+) Start the Counter mode.
447 (+) Stop the Counter mode.
448
449
450 @endverbatim
451 * @{
452 */
453
454 /**
455 * @brief Start the LPTIM PWM generation.
456 * @param hlptim LPTIM handle
457 * @param Period Specifies the Autoreload value.
458 * This parameter must be a value between 0x0000 and 0xFFFF.
459 * @param Pulse Specifies the compare value.
460 * This parameter must be a value between 0x0000 and 0xFFFF.
461 * @retval HAL status
462 */
463 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
464 {
465 /* Check the parameters */
466 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
467 assert_param(IS_LPTIM_PERIOD(Period));
468 assert_param(IS_LPTIM_PULSE(Pulse));
469
470 /* Set the LPTIM state */
471 hlptim->State = HAL_LPTIM_STATE_BUSY;
472
473 /* Reset WAVE bit to set PWM mode */
474 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
475
476 /* Enable the Peripheral */
477 __HAL_LPTIM_ENABLE(hlptim);
478
479 /* Clear flag */
480 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
481
482 /* Load the period value in the autoreload register */
483 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
484
485 /* Wait for the completion of the write operation to the LPTIM_ARR register */
486 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
487 {
488 return HAL_TIMEOUT;
489 }
490
491 /* Clear flag */
492 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
493
494 /* Load the pulse value in the compare register */
495 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
496
497 /* Wait for the completion of the write operation to the LPTIM_CMP register */
498 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
499 {
500 return HAL_TIMEOUT;
501 }
502
503 /* Start timer in continuous mode */
504 __HAL_LPTIM_START_CONTINUOUS(hlptim);
505
506 /* Change the TIM state*/
507 hlptim->State = HAL_LPTIM_STATE_READY;
508
509 /* Return function status */
510 return HAL_OK;
511 }
512
513 /**
514 * @brief Stop the LPTIM PWM generation.
515 * @param hlptim LPTIM handle
516 * @retval HAL status
517 */
518 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
519 {
520 /* Check the parameters */
521 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
522
523 /* Set the LPTIM state */
524 hlptim->State = HAL_LPTIM_STATE_BUSY;
525
526 /* Disable the Peripheral */
527 __HAL_LPTIM_DISABLE(hlptim);
528
529 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
530 {
531 return HAL_TIMEOUT;
532 }
533
534 /* Change the TIM state*/
535 hlptim->State = HAL_LPTIM_STATE_READY;
536
537 /* Return function status */
538 return HAL_OK;
539 }
540
541 /**
542 * @brief Start the LPTIM PWM generation in interrupt mode.
543 * @param hlptim LPTIM handle
544 * @param Period Specifies the Autoreload value.
545 * This parameter must be a value between 0x0000 and 0xFFFF
546 * @param Pulse Specifies the compare value.
547 * This parameter must be a value between 0x0000 and 0xFFFF
548 * @retval HAL status
549 */
550 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
551 {
552 /* Check the parameters */
553 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
554 assert_param(IS_LPTIM_PERIOD(Period));
555 assert_param(IS_LPTIM_PULSE(Pulse));
556
557 /* Set the LPTIM state */
558 hlptim->State = HAL_LPTIM_STATE_BUSY;
559
560 /* Reset WAVE bit to set PWM mode */
561 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
562
563 /* Enable the Peripheral */
564 __HAL_LPTIM_ENABLE(hlptim);
565
566 /* Clear flag */
567 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
568
569 /* Load the period value in the autoreload register */
570 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
571
572 /* Wait for the completion of the write operation to the LPTIM_ARR register */
573 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
574 {
575 return HAL_TIMEOUT;
576 }
577
578 /* Clear flag */
579 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
580
581 /* Load the pulse value in the compare register */
582 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
583
584 /* Wait for the completion of the write operation to the LPTIM_CMP register */
585 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
586 {
587 return HAL_TIMEOUT;
588 }
589
590 /* Disable the Peripheral */
591 __HAL_LPTIM_DISABLE(hlptim);
592
593 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
594 {
595 return HAL_TIMEOUT;
596 }
597
598 /* Enable Autoreload write complete interrupt */
599 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
600
601 /* Enable Compare write complete interrupt */
602 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
603
604 /* Enable Autoreload match interrupt */
605 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
606
607 /* Enable Compare match interrupt */
608 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
609
610 /* If external trigger source is used, then enable external trigger interrupt */
611 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
612 {
613 /* Enable external trigger interrupt */
614 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
615 }
616
617 /* Enable the Peripheral */
618 __HAL_LPTIM_ENABLE(hlptim);
619
620 /* Start timer in continuous mode */
621 __HAL_LPTIM_START_CONTINUOUS(hlptim);
622
623 /* Change the TIM state*/
624 hlptim->State = HAL_LPTIM_STATE_READY;
625
626 /* Return function status */
627 return HAL_OK;
628 }
629
630 /**
631 * @brief Stop the LPTIM PWM generation in interrupt mode.
632 * @param hlptim LPTIM handle
633 * @retval HAL status
634 */
635 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
636 {
637 /* Check the parameters */
638 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
639
640 /* Set the LPTIM state */
641 hlptim->State = HAL_LPTIM_STATE_BUSY;
642
643 /* Disable the Peripheral */
644 __HAL_LPTIM_DISABLE(hlptim);
645
646 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
647 {
648 return HAL_TIMEOUT;
649 }
650
651 /* Disable Autoreload write complete interrupt */
652 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
653
654 /* Disable Compare write complete interrupt */
655 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
656
657 /* Disable Autoreload match interrupt */
658 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
659
660 /* Disable Compare match interrupt */
661 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
662
663 /* If external trigger source is used, then disable external trigger interrupt */
664 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
665 {
666 /* Disable external trigger interrupt */
667 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
668 }
669
670 /* Change the TIM state*/
671 hlptim->State = HAL_LPTIM_STATE_READY;
672
673 /* Return function status */
674 return HAL_OK;
675 }
676
677 /**
678 * @brief Start the LPTIM One pulse generation.
679 * @param hlptim LPTIM handle
680 * @param Period Specifies the Autoreload value.
681 * This parameter must be a value between 0x0000 and 0xFFFF.
682 * @param Pulse Specifies the compare value.
683 * This parameter must be a value between 0x0000 and 0xFFFF.
684 * @retval HAL status
685 */
686 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
687 {
688 /* Check the parameters */
689 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
690 assert_param(IS_LPTIM_PERIOD(Period));
691 assert_param(IS_LPTIM_PULSE(Pulse));
692
693 /* Set the LPTIM state */
694 hlptim->State = HAL_LPTIM_STATE_BUSY;
695
696 /* Reset WAVE bit to set one pulse mode */
697 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
698
699 /* Enable the Peripheral */
700 __HAL_LPTIM_ENABLE(hlptim);
701
702 /* Clear flag */
703 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
704
705 /* Load the period value in the autoreload register */
706 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
707
708 /* Wait for the completion of the write operation to the LPTIM_ARR register */
709 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
710 {
711 return HAL_TIMEOUT;
712 }
713
714 /* Clear flag */
715 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
716
717 /* Load the pulse value in the compare register */
718 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
719
720 /* Wait for the completion of the write operation to the LPTIM_CMP register */
721 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
722 {
723 return HAL_TIMEOUT;
724 }
725
726 /* Start timer in single (one shot) mode */
727 __HAL_LPTIM_START_SINGLE(hlptim);
728
729 /* Change the TIM state*/
730 hlptim->State = HAL_LPTIM_STATE_READY;
731
732 /* Return function status */
733 return HAL_OK;
734 }
735
736 /**
737 * @brief Stop the LPTIM One pulse generation.
738 * @param hlptim LPTIM handle
739 * @retval HAL status
740 */
741 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
742 {
743 /* Check the parameters */
744 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
745
746 /* Set the LPTIM state */
747 hlptim->State = HAL_LPTIM_STATE_BUSY;
748
749 /* Disable the Peripheral */
750 __HAL_LPTIM_DISABLE(hlptim);
751
752 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
753 {
754 return HAL_TIMEOUT;
755 }
756
757 /* Change the TIM state*/
758 hlptim->State = HAL_LPTIM_STATE_READY;
759
760 /* Return function status */
761 return HAL_OK;
762 }
763
764 /**
765 * @brief Start the LPTIM One pulse generation in interrupt mode.
766 * @param hlptim LPTIM handle
767 * @param Period Specifies the Autoreload value.
768 * This parameter must be a value between 0x0000 and 0xFFFF.
769 * @param Pulse Specifies the compare value.
770 * This parameter must be a value between 0x0000 and 0xFFFF.
771 * @retval HAL status
772 */
773 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
774 {
775 /* Check the parameters */
776 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
777 assert_param(IS_LPTIM_PERIOD(Period));
778 assert_param(IS_LPTIM_PULSE(Pulse));
779
780 /* Set the LPTIM state */
781 hlptim->State = HAL_LPTIM_STATE_BUSY;
782
783 /* Reset WAVE bit to set one pulse mode */
784 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
785
786 /* Enable the Peripheral */
787 __HAL_LPTIM_ENABLE(hlptim);
788
789 /* Clear flag */
790 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
791
792 /* Load the period value in the autoreload register */
793 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
794
795 /* Wait for the completion of the write operation to the LPTIM_ARR register */
796 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
797 {
798 return HAL_TIMEOUT;
799 }
800
801 /* Clear flag */
802 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
803
804 /* Load the pulse value in the compare register */
805 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
806
807 /* Wait for the completion of the write operation to the LPTIM_CMP register */
808 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
809 {
810 return HAL_TIMEOUT;
811 }
812
813 /* Disable the Peripheral */
814 __HAL_LPTIM_DISABLE(hlptim);
815
816 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
817 {
818 return HAL_TIMEOUT;
819 }
820
821 /* Enable Autoreload write complete interrupt */
822 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
823
824 /* Enable Compare write complete interrupt */
825 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
826
827 /* Enable Autoreload match interrupt */
828 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
829
830 /* Enable Compare match interrupt */
831 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
832
833 /* If external trigger source is used, then enable external trigger interrupt */
834 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
835 {
836 /* Enable external trigger interrupt */
837 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
838 }
839
840 /* Enable the Peripheral */
841 __HAL_LPTIM_ENABLE(hlptim);
842
843 /* Start timer in single (one shot) mode */
844 __HAL_LPTIM_START_SINGLE(hlptim);
845
846 /* Change the TIM state*/
847 hlptim->State = HAL_LPTIM_STATE_READY;
848
849 /* Return function status */
850 return HAL_OK;
851 }
852
853 /**
854 * @brief Stop the LPTIM One pulse generation in interrupt mode.
855 * @param hlptim LPTIM handle
856 * @retval HAL status
857 */
858 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
859 {
860 /* Check the parameters */
861 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
862
863 /* Set the LPTIM state */
864 hlptim->State = HAL_LPTIM_STATE_BUSY;
865
866 /* Disable the Peripheral */
867 __HAL_LPTIM_DISABLE(hlptim);
868
869 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
870 {
871 return HAL_TIMEOUT;
872 }
873
874 /* Disable Autoreload write complete interrupt */
875 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
876
877 /* Disable Compare write complete interrupt */
878 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
879
880 /* Disable Autoreload match interrupt */
881 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
882
883 /* Disable Compare match interrupt */
884 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
885
886 /* If external trigger source is used, then disable external trigger interrupt */
887 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
888 {
889 /* Disable external trigger interrupt */
890 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
891 }
892
893 /* Change the TIM state*/
894 hlptim->State = HAL_LPTIM_STATE_READY;
895
896 /* Return function status */
897 return HAL_OK;
898 }
899
900 /**
901 * @brief Start the LPTIM in Set once mode.
902 * @param hlptim LPTIM handle
903 * @param Period Specifies the Autoreload value.
904 * This parameter must be a value between 0x0000 and 0xFFFF.
905 * @param Pulse Specifies the compare value.
906 * This parameter must be a value between 0x0000 and 0xFFFF.
907 * @retval HAL status
908 */
909 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
910 {
911 /* Check the parameters */
912 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
913 assert_param(IS_LPTIM_PERIOD(Period));
914 assert_param(IS_LPTIM_PULSE(Pulse));
915
916 /* Set the LPTIM state */
917 hlptim->State = HAL_LPTIM_STATE_BUSY;
918
919 /* Set WAVE bit to enable the set once mode */
920 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
921
922 /* Enable the Peripheral */
923 __HAL_LPTIM_ENABLE(hlptim);
924
925 /* Clear flag */
926 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
927
928 /* Load the period value in the autoreload register */
929 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
930
931 /* Wait for the completion of the write operation to the LPTIM_ARR register */
932 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
933 {
934 return HAL_TIMEOUT;
935 }
936
937 /* Clear flag */
938 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
939
940 /* Load the pulse value in the compare register */
941 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
942
943 /* Wait for the completion of the write operation to the LPTIM_CMP register */
944 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
945 {
946 return HAL_TIMEOUT;
947 }
948
949 /* Start timer in single (one shot) mode */
950 __HAL_LPTIM_START_SINGLE(hlptim);
951
952 /* Change the TIM state*/
953 hlptim->State = HAL_LPTIM_STATE_READY;
954
955 /* Return function status */
956 return HAL_OK;
957 }
958
959 /**
960 * @brief Stop the LPTIM Set once mode.
961 * @param hlptim LPTIM handle
962 * @retval HAL status
963 */
964 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
965 {
966 /* Check the parameters */
967 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
968
969 /* Set the LPTIM state */
970 hlptim->State = HAL_LPTIM_STATE_BUSY;
971
972 /* Disable the Peripheral */
973 __HAL_LPTIM_DISABLE(hlptim);
974
975 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
976 {
977 return HAL_TIMEOUT;
978 }
979
980 /* Change the TIM state*/
981 hlptim->State = HAL_LPTIM_STATE_READY;
982
983 /* Return function status */
984 return HAL_OK;
985 }
986
987 /**
988 * @brief Start the LPTIM Set once mode in interrupt mode.
989 * @param hlptim LPTIM handle
990 * @param Period Specifies the Autoreload value.
991 * This parameter must be a value between 0x0000 and 0xFFFF.
992 * @param Pulse Specifies the compare value.
993 * This parameter must be a value between 0x0000 and 0xFFFF.
994 * @retval HAL status
995 */
996 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
997 {
998 /* Check the parameters */
999 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1000 assert_param(IS_LPTIM_PERIOD(Period));
1001 assert_param(IS_LPTIM_PULSE(Pulse));
1002
1003 /* Set the LPTIM state */
1004 hlptim->State = HAL_LPTIM_STATE_BUSY;
1005
1006 /* Set WAVE bit to enable the set once mode */
1007 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1008
1009 /* Enable the Peripheral */
1010 __HAL_LPTIM_ENABLE(hlptim);
1011
1012 /* Clear flag */
1013 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1014
1015 /* Load the period value in the autoreload register */
1016 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1017
1018 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1019 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1020 {
1021 return HAL_TIMEOUT;
1022 }
1023
1024 /* Clear flag */
1025 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1026
1027 /* Load the pulse value in the compare register */
1028 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1029
1030 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1031 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1032 {
1033 return HAL_TIMEOUT;
1034 }
1035
1036 /* Disable the Peripheral */
1037 __HAL_LPTIM_DISABLE(hlptim);
1038
1039 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1040 {
1041 return HAL_TIMEOUT;
1042 }
1043
1044 /* Enable Autoreload write complete interrupt */
1045 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1046
1047 /* Enable Compare write complete interrupt */
1048 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1049
1050 /* Enable Autoreload match interrupt */
1051 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1052
1053 /* Enable Compare match interrupt */
1054 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1055
1056 /* If external trigger source is used, then enable external trigger interrupt */
1057 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1058 {
1059 /* Enable external trigger interrupt */
1060 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1061 }
1062
1063 /* Enable the Peripheral */
1064 __HAL_LPTIM_ENABLE(hlptim);
1065
1066 /* Start timer in single (one shot) mode */
1067 __HAL_LPTIM_START_SINGLE(hlptim);
1068
1069 /* Change the TIM state*/
1070 hlptim->State = HAL_LPTIM_STATE_READY;
1071
1072 /* Return function status */
1073 return HAL_OK;
1074 }
1075
1076 /**
1077 * @brief Stop the LPTIM Set once mode in interrupt mode.
1078 * @param hlptim LPTIM handle
1079 * @retval HAL status
1080 */
1081 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1082 {
1083 /* Check the parameters */
1084 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1085
1086 /* Set the LPTIM state */
1087 hlptim->State = HAL_LPTIM_STATE_BUSY;
1088
1089 /* Disable the Peripheral */
1090 __HAL_LPTIM_DISABLE(hlptim);
1091
1092 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1093 {
1094 return HAL_TIMEOUT;
1095 }
1096
1097 /* Disable Autoreload write complete interrupt */
1098 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1099
1100 /* Disable Compare write complete interrupt */
1101 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1102
1103 /* Disable Autoreload match interrupt */
1104 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1105
1106 /* Disable Compare match interrupt */
1107 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1108
1109 /* If external trigger source is used, then disable external trigger interrupt */
1110 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1111 {
1112 /* Disable external trigger interrupt */
1113 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1114 }
1115
1116 /* Change the TIM state*/
1117 hlptim->State = HAL_LPTIM_STATE_READY;
1118
1119 /* Return function status */
1120 return HAL_OK;
1121 }
1122
1123 /**
1124 * @brief Start the Encoder interface.
1125 * @param hlptim LPTIM handle
1126 * @param Period Specifies the Autoreload value.
1127 * This parameter must be a value between 0x0000 and 0xFFFF.
1128 * @retval HAL status
1129 */
1130 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1131 {
1132 uint32_t tmpcfgr;
1133
1134 /* Check the parameters */
1135 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1136 assert_param(IS_LPTIM_PERIOD(Period));
1137 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1138 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1139 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1140
1141 /* Set the LPTIM state */
1142 hlptim->State = HAL_LPTIM_STATE_BUSY;
1143
1144 /* Get the LPTIMx CFGR value */
1145 tmpcfgr = hlptim->Instance->CFGR;
1146
1147 /* Clear CKPOL bits */
1148 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1149
1150 /* Set Input polarity */
1151 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1152
1153 /* Write to LPTIMx CFGR */
1154 hlptim->Instance->CFGR = tmpcfgr;
1155
1156 /* Set ENC bit to enable the encoder interface */
1157 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1158
1159 /* Enable the Peripheral */
1160 __HAL_LPTIM_ENABLE(hlptim);
1161
1162 /* Clear flag */
1163 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1164
1165 /* Load the period value in the autoreload register */
1166 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1167
1168 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1169 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1170 {
1171 return HAL_TIMEOUT;
1172 }
1173
1174 /* Start timer in continuous mode */
1175 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1176
1177 /* Change the TIM state*/
1178 hlptim->State = HAL_LPTIM_STATE_READY;
1179
1180 /* Return function status */
1181 return HAL_OK;
1182 }
1183
1184 /**
1185 * @brief Stop the Encoder interface.
1186 * @param hlptim LPTIM handle
1187 * @retval HAL status
1188 */
1189 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1190 {
1191 /* Check the parameters */
1192 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1193
1194 /* Set the LPTIM state */
1195 hlptim->State = HAL_LPTIM_STATE_BUSY;
1196
1197 /* Disable the Peripheral */
1198 __HAL_LPTIM_DISABLE(hlptim);
1199
1200 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1201 {
1202 return HAL_TIMEOUT;
1203 }
1204
1205 /* Reset ENC bit to disable the encoder interface */
1206 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1207
1208 /* Change the TIM state*/
1209 hlptim->State = HAL_LPTIM_STATE_READY;
1210
1211 /* Return function status */
1212 return HAL_OK;
1213 }
1214
1215 /**
1216 * @brief Start the Encoder interface in interrupt mode.
1217 * @param hlptim LPTIM handle
1218 * @param Period Specifies the Autoreload value.
1219 * This parameter must be a value between 0x0000 and 0xFFFF.
1220 * @retval HAL status
1221 */
1222 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1223 {
1224 uint32_t tmpcfgr;
1225
1226 /* Check the parameters */
1227 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1228 assert_param(IS_LPTIM_PERIOD(Period));
1229 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1230 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1231 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1232
1233 /* Set the LPTIM state */
1234 hlptim->State = HAL_LPTIM_STATE_BUSY;
1235
1236 /* Configure edge sensitivity for encoder mode */
1237 /* Get the LPTIMx CFGR value */
1238 tmpcfgr = hlptim->Instance->CFGR;
1239
1240 /* Clear CKPOL bits */
1241 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1242
1243 /* Set Input polarity */
1244 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1245
1246 /* Write to LPTIMx CFGR */
1247 hlptim->Instance->CFGR = tmpcfgr;
1248
1249 /* Set ENC bit to enable the encoder interface */
1250 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1251
1252 /* Enable the Peripheral */
1253 __HAL_LPTIM_ENABLE(hlptim);
1254
1255 /* Clear flag */
1256 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1257
1258 /* Load the period value in the autoreload register */
1259 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1260
1261 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1262 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1263 {
1264 return HAL_TIMEOUT;
1265 }
1266
1267 /* Disable the Peripheral */
1268 __HAL_LPTIM_DISABLE(hlptim);
1269
1270 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1271 {
1272 return HAL_TIMEOUT;
1273 }
1274
1275 /* Enable "switch to down direction" interrupt */
1276 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1277
1278 /* Enable "switch to up direction" interrupt */
1279 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1280
1281 /* Enable the Peripheral */
1282 __HAL_LPTIM_ENABLE(hlptim);
1283
1284 /* Start timer in continuous mode */
1285 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1286
1287 /* Change the TIM state*/
1288 hlptim->State = HAL_LPTIM_STATE_READY;
1289
1290 /* Return function status */
1291 return HAL_OK;
1292 }
1293
1294 /**
1295 * @brief Stop the Encoder interface in interrupt mode.
1296 * @param hlptim LPTIM handle
1297 * @retval HAL status
1298 */
1299 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1300 {
1301 /* Check the parameters */
1302 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1303
1304 /* Set the LPTIM state */
1305 hlptim->State = HAL_LPTIM_STATE_BUSY;
1306
1307 /* Disable the Peripheral */
1308 __HAL_LPTIM_DISABLE(hlptim);
1309
1310 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1311 {
1312 return HAL_TIMEOUT;
1313 }
1314
1315 /* Reset ENC bit to disable the encoder interface */
1316 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1317
1318 /* Disable "switch to down direction" interrupt */
1319 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1320
1321 /* Disable "switch to up direction" interrupt */
1322 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1323
1324 /* Change the TIM state*/
1325 hlptim->State = HAL_LPTIM_STATE_READY;
1326
1327 /* Return function status */
1328 return HAL_OK;
1329 }
1330
1331 /**
1332 * @brief Start the Timeout function.
1333 * @note The first trigger event will start the timer, any successive
1334 * trigger event will reset the counter and the timer restarts.
1335 * @param hlptim LPTIM handle
1336 * @param Period Specifies the Autoreload value.
1337 * This parameter must be a value between 0x0000 and 0xFFFF.
1338 * @param Timeout Specifies the TimeOut value to reset the counter.
1339 * This parameter must be a value between 0x0000 and 0xFFFF.
1340 * @retval HAL status
1341 */
1342 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1343 {
1344 /* Check the parameters */
1345 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1346 assert_param(IS_LPTIM_PERIOD(Period));
1347 assert_param(IS_LPTIM_PULSE(Timeout));
1348
1349 /* Set the LPTIM state */
1350 hlptim->State = HAL_LPTIM_STATE_BUSY;
1351
1352 /* Set TIMOUT bit to enable the timeout function */
1353 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1354
1355 /* Enable the Peripheral */
1356 __HAL_LPTIM_ENABLE(hlptim);
1357
1358 /* Clear flag */
1359 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1360
1361 /* Load the period value in the autoreload register */
1362 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1363
1364 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1365 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1366 {
1367 return HAL_TIMEOUT;
1368 }
1369
1370 /* Clear flag */
1371 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1372
1373 /* Load the Timeout value in the compare register */
1374 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1375
1376 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1377 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1378 {
1379 return HAL_TIMEOUT;
1380 }
1381
1382 /* Start timer in continuous mode */
1383 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1384
1385 /* Change the TIM state*/
1386 hlptim->State = HAL_LPTIM_STATE_READY;
1387
1388 /* Return function status */
1389 return HAL_OK;
1390 }
1391
1392 /**
1393 * @brief Stop the Timeout function.
1394 * @param hlptim LPTIM handle
1395 * @retval HAL status
1396 */
1397 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1398 {
1399 /* Check the parameters */
1400 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1401
1402 /* Set the LPTIM state */
1403 hlptim->State = HAL_LPTIM_STATE_BUSY;
1404
1405 /* Disable the Peripheral */
1406 __HAL_LPTIM_DISABLE(hlptim);
1407
1408 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1409 {
1410 return HAL_TIMEOUT;
1411 }
1412
1413 /* Reset TIMOUT bit to enable the timeout function */
1414 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1415
1416 /* Change the TIM state*/
1417 hlptim->State = HAL_LPTIM_STATE_READY;
1418
1419 /* Return function status */
1420 return HAL_OK;
1421 }
1422
1423 /**
1424 * @brief Start the Timeout function in interrupt mode.
1425 * @note The first trigger event will start the timer, any successive
1426 * trigger event will reset the counter and the timer restarts.
1427 * @param hlptim LPTIM handle
1428 * @param Period Specifies the Autoreload value.
1429 * This parameter must be a value between 0x0000 and 0xFFFF.
1430 * @param Timeout Specifies the TimeOut value to reset the counter.
1431 * This parameter must be a value between 0x0000 and 0xFFFF.
1432 * @retval HAL status
1433 */
1434 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1435 {
1436 /* Check the parameters */
1437 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1438 assert_param(IS_LPTIM_PERIOD(Period));
1439 assert_param(IS_LPTIM_PULSE(Timeout));
1440
1441 /* Set the LPTIM state */
1442 hlptim->State = HAL_LPTIM_STATE_BUSY;
1443
1444 /* Set TIMOUT bit to enable the timeout function */
1445 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1446
1447 /* Enable the Peripheral */
1448 __HAL_LPTIM_ENABLE(hlptim);
1449
1450 /* Clear flag */
1451 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1452
1453 /* Load the period value in the autoreload register */
1454 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1455
1456 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1457 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1458 {
1459 return HAL_TIMEOUT;
1460 }
1461
1462 /* Clear flag */
1463 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1464
1465 /* Load the Timeout value in the compare register */
1466 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1467
1468 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1469 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1470 {
1471 return HAL_TIMEOUT;
1472 }
1473
1474 /* Disable the Peripheral */
1475 __HAL_LPTIM_DISABLE(hlptim);
1476
1477 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1478 {
1479 return HAL_TIMEOUT;
1480 }
1481
1482 /* Enable Compare match interrupt */
1483 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1484
1485 /* Enable the Peripheral */
1486 __HAL_LPTIM_ENABLE(hlptim);
1487
1488 /* Start timer in continuous mode */
1489 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1490
1491 /* Change the TIM state*/
1492 hlptim->State = HAL_LPTIM_STATE_READY;
1493
1494 /* Return function status */
1495 return HAL_OK;
1496 }
1497
1498 /**
1499 * @brief Stop the Timeout function in interrupt mode.
1500 * @param hlptim LPTIM handle
1501 * @retval HAL status
1502 */
1503 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1504 {
1505 /* Check the parameters */
1506 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1507
1508 /* Set the LPTIM state */
1509 hlptim->State = HAL_LPTIM_STATE_BUSY;
1510
1511 /* Disable the Peripheral */
1512 __HAL_LPTIM_DISABLE(hlptim);
1513
1514 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1515 {
1516 return HAL_TIMEOUT;
1517 }
1518
1519 /* Reset TIMOUT bit to enable the timeout function */
1520 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1521
1522 /* Disable Compare match interrupt */
1523 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1524
1525 /* Change the TIM state*/
1526 hlptim->State = HAL_LPTIM_STATE_READY;
1527
1528 /* Return function status */
1529 return HAL_OK;
1530 }
1531
1532 /**
1533 * @brief Start the Counter mode.
1534 * @param hlptim LPTIM handle
1535 * @param Period Specifies the Autoreload value.
1536 * This parameter must be a value between 0x0000 and 0xFFFF.
1537 * @retval HAL status
1538 */
1539 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1540 {
1541 /* Check the parameters */
1542 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1543 assert_param(IS_LPTIM_PERIOD(Period));
1544
1545 /* Set the LPTIM state */
1546 hlptim->State = HAL_LPTIM_STATE_BUSY;
1547
1548 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1549 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1550 {
1551 /* Check if clock is prescaled */
1552 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1553 /* Set clock prescaler to 0 */
1554 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1555 }
1556
1557 /* Enable the Peripheral */
1558 __HAL_LPTIM_ENABLE(hlptim);
1559
1560 /* Clear flag */
1561 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1562
1563 /* Load the period value in the autoreload register */
1564 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1565
1566 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1567 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1568 {
1569 return HAL_TIMEOUT;
1570 }
1571
1572 /* Start timer in continuous mode */
1573 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1574
1575 /* Change the TIM state*/
1576 hlptim->State = HAL_LPTIM_STATE_READY;
1577
1578 /* Return function status */
1579 return HAL_OK;
1580 }
1581
1582 /**
1583 * @brief Stop the Counter mode.
1584 * @param hlptim LPTIM handle
1585 * @retval HAL status
1586 */
1587 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1588 {
1589 /* Check the parameters */
1590 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1591
1592 /* Set the LPTIM state */
1593 hlptim->State = HAL_LPTIM_STATE_BUSY;
1594
1595 /* Disable the Peripheral */
1596 __HAL_LPTIM_DISABLE(hlptim);
1597
1598 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1599 {
1600 return HAL_TIMEOUT;
1601 }
1602
1603 /* Change the TIM state*/
1604 hlptim->State = HAL_LPTIM_STATE_READY;
1605
1606 /* Return function status */
1607 return HAL_OK;
1608 }
1609
1610 /**
1611 * @brief Start the Counter mode in interrupt mode.
1612 * @param hlptim LPTIM handle
1613 * @param Period Specifies the Autoreload value.
1614 * This parameter must be a value between 0x0000 and 0xFFFF.
1615 * @retval HAL status
1616 */
1617 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1618 {
1619 /* Check the parameters */
1620 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1621 assert_param(IS_LPTIM_PERIOD(Period));
1622
1623 /* Set the LPTIM state */
1624 hlptim->State = HAL_LPTIM_STATE_BUSY;
1625
1626 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1627 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1628 {
1629 /* Check if clock is prescaled */
1630 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1631 /* Set clock prescaler to 0 */
1632 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1633 }
1634
1635 /* Enable the Peripheral */
1636 __HAL_LPTIM_ENABLE(hlptim);
1637
1638 /* Clear flag */
1639 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1640
1641 /* Load the period value in the autoreload register */
1642 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1643
1644 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1645 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1646 {
1647 return HAL_TIMEOUT;
1648 }
1649
1650 /* Disable the Peripheral */
1651 __HAL_LPTIM_DISABLE(hlptim);
1652
1653 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1654 {
1655 return HAL_TIMEOUT;
1656 }
1657
1658 /* Enable Autoreload write complete interrupt */
1659 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1660
1661 /* Enable Autoreload match interrupt */
1662 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1663
1664 /* Enable the Peripheral */
1665 __HAL_LPTIM_ENABLE(hlptim);
1666
1667 /* Start timer in continuous mode */
1668 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1669
1670 /* Change the TIM state*/
1671 hlptim->State = HAL_LPTIM_STATE_READY;
1672
1673 /* Return function status */
1674 return HAL_OK;
1675 }
1676
1677 /**
1678 * @brief Stop the Counter mode in interrupt mode.
1679 * @param hlptim LPTIM handle
1680 * @retval HAL status
1681 */
1682 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1683 {
1684 /* Check the parameters */
1685 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1686
1687 /* Set the LPTIM state */
1688 hlptim->State = HAL_LPTIM_STATE_BUSY;
1689
1690 /* Disable the Peripheral */
1691 __HAL_LPTIM_DISABLE(hlptim);
1692
1693 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1694 {
1695 return HAL_TIMEOUT;
1696 }
1697
1698 /* Disable Autoreload write complete interrupt */
1699 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1700
1701 /* Disable Autoreload match interrupt */
1702 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1703 /* Change the TIM state*/
1704 hlptim->State = HAL_LPTIM_STATE_READY;
1705
1706 /* Return function status */
1707 return HAL_OK;
1708 }
1709
1710 /**
1711 * @}
1712 */
1713
1714 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1715 * @brief Read operation functions.
1716 *
1717 @verbatim
1718 ==============================================================================
1719 ##### LPTIM Read operation functions #####
1720 ==============================================================================
1721 [..] This section provides LPTIM Reading functions.
1722 (+) Read the counter value.
1723 (+) Read the period (Auto-reload) value.
1724 (+) Read the pulse (Compare)value.
1725 @endverbatim
1726 * @{
1727 */
1728
1729 /**
1730 * @brief Return the current counter value.
1731 * @param hlptim LPTIM handle
1732 * @retval Counter value.
1733 */
1734 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1735 {
1736 /* Check the parameters */
1737 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1738
1739 return (hlptim->Instance->CNT);
1740 }
1741
1742 /**
1743 * @brief Return the current Autoreload (Period) value.
1744 * @param hlptim LPTIM handle
1745 * @retval Autoreload value.
1746 */
1747 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1748 {
1749 /* Check the parameters */
1750 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1751
1752 return (hlptim->Instance->ARR);
1753 }
1754
1755 /**
1756 * @brief Return the current Compare (Pulse) value.
1757 * @param hlptim LPTIM handle
1758 * @retval Compare value.
1759 */
1760 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1761 {
1762 /* Check the parameters */
1763 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1764
1765 return (hlptim->Instance->CMP);
1766 }
1767
1768 /**
1769 * @}
1770 */
1771
1772 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1773 * @brief LPTIM IRQ handler.
1774 *
1775 @verbatim
1776 ==============================================================================
1777 ##### LPTIM IRQ handler and callbacks #####
1778 ==============================================================================
1779 [..] This section provides LPTIM IRQ handler and callback functions called within
1780 the IRQ handler:
1781 (+) LPTIM interrupt request handler
1782 (+) Compare match Callback
1783 (+) Auto-reload match Callback
1784 (+) External trigger event detection Callback
1785 (+) Compare register write complete Callback
1786 (+) Auto-reload register write complete Callback
1787 (+) Up-counting direction change Callback
1788 (+) Down-counting direction change Callback
1789
1790 @endverbatim
1791 * @{
1792 */
1793
1794 /**
1795 * @brief Handle LPTIM interrupt request.
1796 * @param hlptim LPTIM handle
1797 * @retval None
1798 */
1799 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1800 {
1801 /* Compare match interrupt */
1802 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1803 {
1804 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1805 {
1806 /* Clear Compare match flag */
1807 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1808
1809 /* Compare match Callback */
1810 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1811 hlptim->CompareMatchCallback(hlptim);
1812 #else
1813 HAL_LPTIM_CompareMatchCallback(hlptim);
1814 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1815 }
1816 }
1817
1818 /* Autoreload match interrupt */
1819 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1820 {
1821 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1822 {
1823 /* Clear Autoreload match flag */
1824 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1825
1826 /* Autoreload match Callback */
1827 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1828 hlptim->AutoReloadMatchCallback(hlptim);
1829 #else
1830 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1831 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1832 }
1833 }
1834
1835 /* Trigger detected interrupt */
1836 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1837 {
1838 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1839 {
1840 /* Clear Trigger detected flag */
1841 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1842
1843 /* Trigger detected callback */
1844 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1845 hlptim->TriggerCallback(hlptim);
1846 #else
1847 HAL_LPTIM_TriggerCallback(hlptim);
1848 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1849 }
1850 }
1851
1852 /* Compare write interrupt */
1853 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1854 {
1855 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1856 {
1857 /* Clear Compare write flag */
1858 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1859
1860 /* Compare write Callback */
1861 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1862 hlptim->CompareWriteCallback(hlptim);
1863 #else
1864 HAL_LPTIM_CompareWriteCallback(hlptim);
1865 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1866 }
1867 }
1868
1869 /* Autoreload write interrupt */
1870 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1871 {
1872 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1873 {
1874 /* Clear Autoreload write flag */
1875 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1876
1877 /* Autoreload write Callback */
1878 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1879 hlptim->AutoReloadWriteCallback(hlptim);
1880 #else
1881 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1882 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1883 }
1884 }
1885
1886 /* Direction counter changed from Down to Up interrupt */
1887 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1888 {
1889 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1890 {
1891 /* Clear Direction counter changed from Down to Up flag */
1892 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1893
1894 /* Direction counter changed from Down to Up Callback */
1895 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1896 hlptim->DirectionUpCallback(hlptim);
1897 #else
1898 HAL_LPTIM_DirectionUpCallback(hlptim);
1899 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1900 }
1901 }
1902
1903 /* Direction counter changed from Up to Down interrupt */
1904 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1905 {
1906 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1907 {
1908 /* Clear Direction counter changed from Up to Down flag */
1909 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1910
1911 /* Direction counter changed from Up to Down Callback */
1912 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1913 hlptim->DirectionDownCallback(hlptim);
1914 #else
1915 HAL_LPTIM_DirectionDownCallback(hlptim);
1916 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1917 }
1918 }
1919 }
1920
1921 /**
1922 * @brief Compare match callback in non-blocking mode.
1923 * @param hlptim LPTIM handle
1924 * @retval None
1925 */
1926 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1927 {
1928 /* Prevent unused argument(s) compilation warning */
1929 UNUSED(hlptim);
1930
1931 /* NOTE : This function should not be modified, when the callback is needed,
1932 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1933 */
1934 }
1935
1936 /**
1937 * @brief Autoreload match callback in non-blocking mode.
1938 * @param hlptim LPTIM handle
1939 * @retval None
1940 */
1941 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1942 {
1943 /* Prevent unused argument(s) compilation warning */
1944 UNUSED(hlptim);
1945
1946 /* NOTE : This function should not be modified, when the callback is needed,
1947 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1948 */
1949 }
1950
1951 /**
1952 * @brief Trigger detected callback in non-blocking mode.
1953 * @param hlptim LPTIM handle
1954 * @retval None
1955 */
1956 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1957 {
1958 /* Prevent unused argument(s) compilation warning */
1959 UNUSED(hlptim);
1960
1961 /* NOTE : This function should not be modified, when the callback is needed,
1962 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1963 */
1964 }
1965
1966 /**
1967 * @brief Compare write callback in non-blocking mode.
1968 * @param hlptim LPTIM handle
1969 * @retval None
1970 */
1971 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1972 {
1973 /* Prevent unused argument(s) compilation warning */
1974 UNUSED(hlptim);
1975
1976 /* NOTE : This function should not be modified, when the callback is needed,
1977 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1978 */
1979 }
1980
1981 /**
1982 * @brief Autoreload write callback in non-blocking mode.
1983 * @param hlptim LPTIM handle
1984 * @retval None
1985 */
1986 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
1987 {
1988 /* Prevent unused argument(s) compilation warning */
1989 UNUSED(hlptim);
1990
1991 /* NOTE : This function should not be modified, when the callback is needed,
1992 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
1993 */
1994 }
1995
1996 /**
1997 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
1998 * @param hlptim LPTIM handle
1999 * @retval None
2000 */
2001 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2002 {
2003 /* Prevent unused argument(s) compilation warning */
2004 UNUSED(hlptim);
2005
2006 /* NOTE : This function should not be modified, when the callback is needed,
2007 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2008 */
2009 }
2010
2011 /**
2012 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2013 * @param hlptim LPTIM handle
2014 * @retval None
2015 */
2016 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2017 {
2018 /* Prevent unused argument(s) compilation warning */
2019 UNUSED(hlptim);
2020
2021 /* NOTE : This function should not be modified, when the callback is needed,
2022 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2023 */
2024 }
2025
2026 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2027 /**
2028 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2029 * @param hlptim LPTIM handle
2030 * @param CallbackID ID of the callback to be registered
2031 * This parameter can be one of the following values:
2032 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2033 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2034 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2035 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2036 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2037 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2038 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2039 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2040 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2041 * @param pCallback pointer to the callback function
2042 * @retval status
2043 */
2044 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2045 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2046 pLPTIM_CallbackTypeDef pCallback)
2047 {
2048 HAL_StatusTypeDef status = HAL_OK;
2049
2050 if (pCallback == NULL)
2051 {
2052 return HAL_ERROR;
2053 }
2054
2055 /* Process locked */
2056 __HAL_LOCK(hlptim);
2057
2058 if (hlptim->State == HAL_LPTIM_STATE_READY)
2059 {
2060 switch (CallbackID)
2061 {
2062 case HAL_LPTIM_MSPINIT_CB_ID :
2063 hlptim->MspInitCallback = pCallback;
2064 break;
2065
2066 case HAL_LPTIM_MSPDEINIT_CB_ID :
2067 hlptim->MspDeInitCallback = pCallback;
2068 break;
2069
2070 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2071 hlptim->CompareMatchCallback = pCallback;
2072 break;
2073
2074 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2075 hlptim->AutoReloadMatchCallback = pCallback;
2076 break;
2077
2078 case HAL_LPTIM_TRIGGER_CB_ID :
2079 hlptim->TriggerCallback = pCallback;
2080 break;
2081
2082 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2083 hlptim->CompareWriteCallback = pCallback;
2084 break;
2085
2086 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2087 hlptim->AutoReloadWriteCallback = pCallback;
2088 break;
2089
2090 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2091 hlptim->DirectionUpCallback = pCallback;
2092 break;
2093
2094 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2095 hlptim->DirectionDownCallback = pCallback;
2096 break;
2097
2098 default :
2099 /* Return error status */
2100 status = HAL_ERROR;
2101 break;
2102 }
2103 }
2104 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2105 {
2106 switch (CallbackID)
2107 {
2108 case HAL_LPTIM_MSPINIT_CB_ID :
2109 hlptim->MspInitCallback = pCallback;
2110 break;
2111
2112 case HAL_LPTIM_MSPDEINIT_CB_ID :
2113 hlptim->MspDeInitCallback = pCallback;
2114 break;
2115
2116 default :
2117 /* Return error status */
2118 status = HAL_ERROR;
2119 break;
2120 }
2121 }
2122 else
2123 {
2124 /* Return error status */
2125 status = HAL_ERROR;
2126 }
2127
2128 /* Release Lock */
2129 __HAL_UNLOCK(hlptim);
2130
2131 return status;
2132 }
2133
2134 /**
2135 * @brief Unregister a LPTIM callback
2136 * LLPTIM callback is redirected to the weak predefined callback
2137 * @param hlptim LPTIM handle
2138 * @param CallbackID ID of the callback to be unregistered
2139 * This parameter can be one of the following values:
2140 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2141 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2142 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2143 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2144 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2145 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2146 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2147 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2148 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2149 * @retval status
2150 */
2151 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2152 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2153 {
2154 HAL_StatusTypeDef status = HAL_OK;
2155
2156 /* Process locked */
2157 __HAL_LOCK(hlptim);
2158
2159 if (hlptim->State == HAL_LPTIM_STATE_READY)
2160 {
2161 switch (CallbackID)
2162 {
2163 case HAL_LPTIM_MSPINIT_CB_ID :
2164 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2165 break;
2166
2167 case HAL_LPTIM_MSPDEINIT_CB_ID :
2168 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2169 break;
2170
2171 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2172 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
2173 break;
2174
2175 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2176 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
2177 break;
2178
2179 case HAL_LPTIM_TRIGGER_CB_ID :
2180 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
2181 break;
2182
2183 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2184 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
2185 break;
2186
2187 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2188 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
2189 break;
2190
2191 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2192 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
2193 break;
2194
2195 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2196 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
2197 break;
2198
2199 default :
2200 /* Return error status */
2201 status = HAL_ERROR;
2202 break;
2203 }
2204 }
2205 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2206 {
2207 switch (CallbackID)
2208 {
2209 case HAL_LPTIM_MSPINIT_CB_ID :
2210 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2211 break;
2212
2213 case HAL_LPTIM_MSPDEINIT_CB_ID :
2214 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2215 break;
2216
2217 default :
2218 /* Return error status */
2219 status = HAL_ERROR;
2220 break;
2221 }
2222 }
2223 else
2224 {
2225 /* Return error status */
2226 status = HAL_ERROR;
2227 }
2228
2229 /* Release Lock */
2230 __HAL_UNLOCK(hlptim);
2231
2232 return status;
2233 }
2234 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2235
2236 /**
2237 * @}
2238 */
2239
2240 /** @defgroup LPTIM_Group5 Peripheral State functions
2241 * @brief Peripheral State functions.
2242 *
2243 @verbatim
2244 ==============================================================================
2245 ##### Peripheral State functions #####
2246 ==============================================================================
2247 [..]
2248 This subsection permits to get in run-time the status of the peripheral.
2249
2250 @endverbatim
2251 * @{
2252 */
2253
2254 /**
2255 * @brief Return the LPTIM handle state.
2256 * @param hlptim LPTIM handle
2257 * @retval HAL state
2258 */
2259 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2260 {
2261 /* Return LPTIM handle state */
2262 return hlptim->State;
2263 }
2264
2265 /**
2266 * @}
2267 */
2268
2269
2270 /**
2271 * @}
2272 */
2273
2274 /* Private functions ---------------------------------------------------------*/
2275
2276 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2277 * @{
2278 */
2279 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2280 /**
2281 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2282 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2283 * the configuration information for LPTIM module.
2284 * @retval None
2285 */
2286 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2287 {
2288 /* Reset the LPTIM callback to the legacy weak callbacks */
2289 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
2290 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
2291 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
2292 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
2293 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
2294 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
2295 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
2296 }
2297 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2298
2299 /**
2300 * @brief LPTimer Wait for flag set
2301 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2302 * the configuration information for LPTIM module.
2303 * @param flag The lptim flag
2304 * @retval HAL status
2305 */
2306 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2307 {
2308 HAL_StatusTypeDef result = HAL_OK;
2309 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2310 do
2311 {
2312 count--;
2313 if (count == 0UL)
2314 {
2315 result = HAL_TIMEOUT;
2316 }
2317 }
2318 while((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2319
2320 return result;
2321 }
2322
2323 /**
2324 * @brief Disable LPTIM HW instance.
2325 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2326 * the configuration information for LPTIM module.
2327 * @note The following sequence is required to solve LPTIM disable HW limitation.
2328 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2329 * stuck in LPTIM interrupt when entering Stop mode" section.
2330 * @retval None
2331 */
2332 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2333 {
2334 uint32_t tmpclksource = 0;
2335 uint32_t tmpIER;
2336 uint32_t tmpCFGR;
2337 uint32_t tmpCMP;
2338 uint32_t tmpARR;
2339 uint32_t tmpCFGR2;
2340
2341 __disable_irq();
2342
2343 /*********** Save LPTIM Config ***********/
2344 /* Save LPTIM source clock */
2345 switch ((uint32_t)hlptim->Instance)
2346 {
2347 case LPTIM1_BASE:
2348 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2349 break;
2350 case LPTIM2_BASE:
2351 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2352 break;
2353 #if defined(LPTIM3)
2354 case LPTIM3_BASE:
2355 tmpclksource = __HAL_RCC_GET_LPTIM3_SOURCE();
2356 break;
2357 #endif /* LPTIM3 */
2358 #if defined(LPTIM4)
2359 case LPTIM4_BASE:
2360 tmpclksource = __HAL_RCC_GET_LPTIM4_SOURCE();
2361 break;
2362 #endif /* LPTIM4 */
2363 #if defined(LPTIM5)
2364 case LPTIM5_BASE:
2365 tmpclksource = __HAL_RCC_GET_LPTIM5_SOURCE();
2366 break;
2367 #endif /* LPTIM5 */
2368 default:
2369 break;
2370 }
2371
2372 /* Save LPTIM configuration registers */
2373 tmpIER = hlptim->Instance->IER;
2374 tmpCFGR = hlptim->Instance->CFGR;
2375 tmpCMP = hlptim->Instance->CMP;
2376 tmpARR = hlptim->Instance->ARR;
2377 tmpCFGR2 = hlptim->Instance->CFGR2;
2378
2379 /*********** Reset LPTIM ***********/
2380 switch ((uint32_t)hlptim->Instance)
2381 {
2382 case LPTIM1_BASE:
2383 __HAL_RCC_LPTIM1_FORCE_RESET();
2384 __HAL_RCC_LPTIM1_RELEASE_RESET();
2385 break;
2386 case LPTIM2_BASE:
2387 __HAL_RCC_LPTIM2_FORCE_RESET();
2388 __HAL_RCC_LPTIM2_RELEASE_RESET();
2389 break;
2390 #if defined(LPTIM3)
2391 case LPTIM3_BASE:
2392 __HAL_RCC_LPTIM3_FORCE_RESET();
2393 __HAL_RCC_LPTIM3_RELEASE_RESET();
2394 break;
2395 #endif /* LPTIM3 */
2396 #if defined(LPTIM4)
2397 case LPTIM4_BASE:
2398 __HAL_RCC_LPTIM4_FORCE_RESET();
2399 __HAL_RCC_LPTIM4_RELEASE_RESET();
2400 break;
2401 #endif /* LPTIM4 */
2402 #if defined(LPTIM5)
2403 case LPTIM5_BASE:
2404 __HAL_RCC_LPTIM5_FORCE_RESET();
2405 __HAL_RCC_LPTIM5_RELEASE_RESET();
2406 break;
2407 #endif /* LPTIM5 */
2408 default:
2409 break;
2410 }
2411
2412 /*********** Restore LPTIM Config ***********/
2413 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2414 {
2415 /* Force LPTIM source kernel clock from APB */
2416 switch ((uint32_t)hlptim->Instance)
2417 {
2418 case LPTIM1_BASE:
2419 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_D2PCLK1);
2420 break;
2421 case LPTIM2_BASE:
2422 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_D3PCLK1);
2423 break;
2424 #if defined(LPTIM3)
2425 case LPTIM3_BASE:
2426 __HAL_RCC_LPTIM3_CONFIG(RCC_LPTIM3CLKSOURCE_D3PCLK1);
2427 break;
2428 #endif /* LPTIM3 */
2429 #if defined(LPTIM4)
2430 case LPTIM4_BASE:
2431 __HAL_RCC_LPTIM4_CONFIG(RCC_LPTIM4CLKSOURCE_D3PCLK1);
2432 break;
2433 #endif /* LPTIM4 */
2434 #if defined(LPTIM5)
2435 case LPTIM5_BASE:
2436 __HAL_RCC_LPTIM5_CONFIG(RCC_LPTIM5CLKSOURCE_D3PCLK1);
2437 break;
2438 #endif /* LPTIM5 */
2439 default:
2440 break;
2441 }
2442
2443 if (tmpCMP != 0UL)
2444 {
2445 /* Restore CMP register (LPTIM should be enabled first) */
2446 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2447 hlptim->Instance->CMP = tmpCMP;
2448
2449 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2450 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2451 {
2452 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2453 }
2454 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2455 }
2456
2457 if (tmpARR != 0UL)
2458 {
2459 /* Restore ARR register (LPTIM should be enabled first) */
2460 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2461 hlptim->Instance->ARR = tmpARR;
2462
2463 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2464 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2465 {
2466 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2467 }
2468
2469 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2470 }
2471
2472 /* Restore LPTIM source kernel clock */
2473 switch ((uint32_t)hlptim->Instance)
2474 {
2475 case LPTIM1_BASE:
2476 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2477 break;
2478 case LPTIM2_BASE:
2479 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2480 break;
2481 #if defined(LPTIM3)
2482 case LPTIM3_BASE:
2483 __HAL_RCC_LPTIM3_CONFIG(tmpclksource);
2484 break;
2485 #endif /* LPTIM3 */
2486 #if defined(LPTIM4)
2487 case LPTIM4_BASE:
2488 __HAL_RCC_LPTIM4_CONFIG(tmpclksource);
2489 break;
2490 #endif /* LPTIM4 */
2491 #if defined(LPTIM5)
2492 case LPTIM5_BASE:
2493 __HAL_RCC_LPTIM5_CONFIG(tmpclksource);
2494 break;
2495 #endif /* LPTIM5 */
2496 default:
2497 break;
2498 }
2499 }
2500
2501 /* Restore configuration registers (LPTIM should be disabled first) */
2502 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2503 hlptim->Instance->IER = tmpIER;
2504 hlptim->Instance->CFGR = tmpCFGR;
2505 hlptim->Instance->CFGR2 = tmpCFGR2;
2506
2507 __enable_irq();
2508 }
2509 /**
2510 * @}
2511 */
2512 #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 || LPTIM5 */
2513
2514 #endif /* HAL_LPTIM_MODULE_ENABLED */
2515 /**
2516 * @}
2517 */
2518
2519 /**
2520 * @}
2521 */
2522
2523 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
INAV: Navigation-enabled flight control software