src/main/drivers/bus_quadspi_impl.h

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  *
  20  * Author: Dominic Clifton
  21  */
  22
  23 #pragma once
  24
  25
  26 typedef struct quadSpiPinDef_s {
  27     ioTag_t pin;
  28 #if defined(STM32H7)
  29     uint8_t af;
  30 #endif
  31 } quadSpiPinDef_t;
  32
  33 #if defined(STM32H7)
  34 #define MAX_QUADSPI_PIN_SEL 3
  35 #endif
  36
  37 typedef struct quadSpiHardware_s {
  38     QUADSPIDevice device;
  39     QUADSPI_TypeDef *reg;
  40     quadSpiPinDef_t clkPins[MAX_QUADSPI_PIN_SEL];
  41     quadSpiPinDef_t bk1IO0Pins[MAX_QUADSPI_PIN_SEL];
  42     quadSpiPinDef_t bk1IO1Pins[MAX_QUADSPI_PIN_SEL];
  43     quadSpiPinDef_t bk1IO2Pins[MAX_QUADSPI_PIN_SEL];
  44     quadSpiPinDef_t bk1IO3Pins[MAX_QUADSPI_PIN_SEL];
  45     quadSpiPinDef_t bk1CSPins[MAX_QUADSPI_PIN_SEL];
  46     quadSpiPinDef_t bk2IO0Pins[MAX_QUADSPI_PIN_SEL];
  47     quadSpiPinDef_t bk2IO1Pins[MAX_QUADSPI_PIN_SEL];
  48     quadSpiPinDef_t bk2IO2Pins[MAX_QUADSPI_PIN_SEL];
  49     quadSpiPinDef_t bk2IO3Pins[MAX_QUADSPI_PIN_SEL];
  50     quadSpiPinDef_t bk2CSPins[MAX_QUADSPI_PIN_SEL];
  51
  52     rccPeriphTag_t rcc;
  53 } quadSpiHardware_t;
  54
  55 extern const quadSpiHardware_t quadSpiHardware[];
  56
  57 typedef struct QUADSPIDevice_s {
  58     QUADSPI_TypeDef *dev;
  59     ioTag_t clk;
  60     ioTag_t bk1IO0;
  61     ioTag_t bk1IO1;
  62     ioTag_t bk1IO2;
  63     ioTag_t bk1IO3;
  64     ioTag_t bk1CS;
  65     ioTag_t bk2IO0;
  66     ioTag_t bk2IO1;
  67     ioTag_t bk2IO2;
  68     ioTag_t bk2IO3;
  69     ioTag_t bk2CS;
  70 #if defined(STM32H7)
  71     uint8_t bk1IO0AF;
  72     uint8_t bk1IO1AF;
  73     uint8_t bk1IO2AF;
  74     uint8_t bk1IO3AF;
  75     uint8_t bk1CSAF;
  76     uint8_t bk2IO0AF;
  77     uint8_t bk2IO1AF;
  78     uint8_t bk2IO2AF;
  79     uint8_t bk2IO3AF;
  80     uint8_t bk2CSAF;
  81 #endif
  82     uint8_t mode;
  83     uint8_t csFlags;
  84     rccPeriphTag_t rcc;
  85     volatile uint16_t errorCount;
  86 #if defined(USE_HAL_DRIVER)
  87     QSPI_HandleTypeDef hquadSpi;
  88 #endif
  89 } quadSpiDevice_t;
  90
  91 extern quadSpiDevice_t quadSpiDevice[QUADSPIDEV_COUNT];
  92
  93 void quadSpiInitDevice(QUADSPIDevice device);
  94 uint32_t quadSpiTimeoutUserCallback(QUADSPI_TypeDef *instance);