Merge pull request #10558 from iNavFlight/MrD_Correct-comments-on-OSD-symbols
[inav.git] / src / main / drivers / i2c_application.h
blobd63abaa4a467a16c2714a56c2e9b37ab2741b3ba
1 /**
2 **************************************************************************
3 * @file i2c_application.h
4 * @version v2.1.0
5 * @date 2022-08-16
6 * @brief i2c application libray header file
7 **************************************************************************
8 * Copyright notice & Disclaimer
10 * The software Board Support Package (BSP) that is made available to
11 * download from Artery official website is the copyrighted work of Artery.
12 * Artery authorizes customers to use, copy, and distribute the BSP
13 * software and its related documentation for the purpose of design and
14 * development in conjunction with Artery microcontrollers. Use of the
15 * software is governed by this copyright notice and the following disclaimer.
17 * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
18 * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
19 * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
20 * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
21 * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
24 **************************************************************************
27 /*!< define to prevent recursive inclusion -------------------------------------*/
28 #ifndef __I2C_APPLICATION_H
29 #define __I2C_APPLICATION_H
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
35 /* includes ------------------------------------------------------------------*/
36 #include "at32f435_437.h"
38 /** @addtogroup AT32F435_437_middlewares_i2c_application_library
39 * @{
43 /** @defgroup I2C_library_event_check_flag
44 * @{
47 #define I2C_EVENT_CHECK_NONE ((uint32_t)0x00000000) /*!< check flag none */
48 #define I2C_EVENT_CHECK_ACKFAIL ((uint32_t)0x00000001) /*!< check flag ackfail */
49 #define I2C_EVENT_CHECK_STOP ((uint32_t)0x00000002) /*!< check flag stop */
51 /**
52 * @}
55 /** @defgroup I2C_library_memory_address_width_mode
56 * @{
59 typedef enum
61 I2C_MEM_ADDR_WIDIH_8 = 0x01, /*!< memory address is 8 bit */
62 I2C_MEM_ADDR_WIDIH_16 = 0x02, /*!< memory address is 16 bit */
63 } i2c_mem_address_width_type;
65 /**
66 * @}
69 /** @defgroup I2C_library_transmission_mode
70 * @{
73 typedef enum
75 I2C_INT_MA_TX = 0,
76 I2C_INT_MA_RX,
77 I2C_INT_SLA_TX,
78 I2C_INT_SLA_RX,
79 I2C_DMA_MA_TX,
80 I2C_DMA_MA_RX,
81 I2C_DMA_SLA_TX,
82 I2C_DMA_SLA_RX,
83 } i2c_mode_type;
85 /**
86 * @}
89 /** @defgroup I2C_library_status_code
90 * @{
93 typedef enum
95 I2C_OK = 0, /*!< no error */
96 I2C_ERR_STEP_1, /*!< step 1 error */
97 I2C_ERR_STEP_2, /*!< step 2 error */
98 I2C_ERR_STEP_3, /*!< step 3 error */
99 I2C_ERR_STEP_4, /*!< step 4 error */
100 I2C_ERR_STEP_5, /*!< step 5 error */
101 I2C_ERR_STEP_6, /*!< step 6 error */
102 I2C_ERR_STEP_7, /*!< step 7 error */
103 I2C_ERR_STEP_8, /*!< step 8 error */
104 I2C_ERR_STEP_9, /*!< step 9 error */
105 I2C_ERR_STEP_10, /*!< step 10 error */
106 I2C_ERR_STEP_11, /*!< step 11 error */
107 I2C_ERR_STEP_12, /*!< step 12 error */
108 I2C_ERR_TCRLD, /*!< tcrld error */
109 I2C_ERR_TDC, /*!< tdc error */
110 I2C_ERR_ADDR, /*!< addr error */
111 I2C_ERR_STOP, /*!< stop error */
112 I2C_ERR_ACKFAIL, /*!< ackfail error */
113 I2C_ERR_TIMEOUT, /*!< timeout error */
114 I2C_ERR_INTERRUPT, /*!< interrupt error */
115 } i2c_status_type;
118 * @}
121 /** @defgroup I2C_library_handler
122 * @{
125 typedef struct
127 i2c_type *i2cx; /*!< i2c registers base address */
128 uint8_t *pbuff; /*!< pointer to i2c transfer buffer */
129 __IO uint16_t psize; /*!< i2c transfer size */
130 __IO uint16_t pcount; /*!< i2c transfer counter */
131 __IO uint32_t mode; /*!< i2c communication mode */
132 __IO uint32_t status; /*!< i2c communication status */
133 __IO i2c_status_type error_code; /*!< i2c error code */
134 dma_channel_type *dma_tx_channel; /*!< dma transmit channel */
135 dma_channel_type *dma_rx_channel; /*!< dma receive channel */
136 dma_init_type dma_init_struct; /*!< dma init parameters */
137 } i2c_handle_type;
140 * @}
143 /** @defgroup I2C_library_exported_functions
144 * @{
147 void i2c_config (i2c_handle_type* hi2c);
148 void i2c_lowlevel_init (i2c_handle_type* hi2c);
149 void i2c_reset_ctrl2_register (i2c_handle_type* hi2c);
150 i2c_status_type i2c_wait_end (i2c_handle_type* hi2c, uint32_t timeout);
151 i2c_status_type i2c_wait_flag (i2c_handle_type* hi2c, uint32_t flag, uint32_t event_check, uint32_t timeout);
153 i2c_status_type i2c_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
154 i2c_status_type i2c_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
155 i2c_status_type i2c_slave_transmit (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
156 i2c_status_type i2c_slave_receive (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
158 i2c_status_type i2c_master_transmit_int (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
159 i2c_status_type i2c_master_receive_int (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
160 i2c_status_type i2c_slave_transmit_int (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
161 i2c_status_type i2c_slave_receive_int (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
163 i2c_status_type i2c_master_transmit_dma (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
164 i2c_status_type i2c_master_receive_dma (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
165 i2c_status_type i2c_slave_transmit_dma (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
166 i2c_status_type i2c_slave_receive_dma (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
168 i2c_status_type i2c_smbus_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
169 i2c_status_type i2c_smbus_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout);
170 i2c_status_type i2c_smbus_slave_transmit (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
171 i2c_status_type i2c_smbus_slave_receive (i2c_handle_type* hi2c, uint8_t* pdata, uint16_t size, uint32_t timeout);
173 i2c_status_type i2c_memory_write (i2c_handle_type* hi2c, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
174 i2c_status_type i2c_memory_write_int (i2c_handle_type* hi2c, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
175 i2c_status_type i2c_memory_write_dma (i2c_handle_type* hi2c, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
176 i2c_status_type i2c_memory_read (i2c_handle_type* hi2c, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
177 i2c_status_type i2c_memory_read_int (i2c_handle_type* hi2c, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
178 i2c_status_type i2c_memory_read_dma (i2c_handle_type* hi2c, i2c_mem_address_width_type mem_address_width, uint16_t address, uint16_t mem_address, uint8_t* pdata, uint16_t size, uint32_t timeout);
180 void i2c_evt_irq_handler (i2c_handle_type* hi2c);
181 void i2c_err_irq_handler (i2c_handle_type* hi2c);
182 void i2c_dma_tx_irq_handler (i2c_handle_type* hi2c);
183 void i2c_dma_rx_irq_handler (i2c_handle_type* hi2c);
186 * @}
190 * @}
193 #ifdef __cplusplus
195 #endif
197 #endif