src/main/drivers/persistent.c

   1 /*
   2  * This file is part of INAV.
   3  *
   4  * INAV free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * INAV distributed in the hope that it
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 /*
  22  * An implementation of persistent data storage utilizing RTC backup data register.
  23  * Retains values written across software resets and boot loader activities.
  24  */
  25
  26 #include <stdint.h>
  27 #include "platform.h"
  28
  29 #include "drivers/persistent.h"
  30 #include "drivers/system.h"
  31
  32 #define PERSISTENT_OBJECT_MAGIC_VALUE (('i' << 24)|('N' << 16)|('a' << 8)|('v' << 0))
  33
  34 #if defined(AT32F43x)
  35
  36     uint32_t persistentObjectRead(persistentObjectId_e id)
  37     {
  38         uint32_t value = ertc_bpr_data_read((ertc_dt_type)id);
  39         return value;
  40
  41     }
  42
  43     void persistentObjectWrite(persistentObjectId_e id, uint32_t value)
  44     {
  45         ertc_bpr_data_write((ertc_dt_type)id,value);
  46     }
  47     // examples ertc
  48     void persistentObjectRTCEnable(void)
  49     {
  50          /* enable the pwc clock interface */
  51         crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
  52
  53         /* allow access to bpr domain */
  54         pwc_battery_powered_domain_access(TRUE);
  55
  56         // We don't need a clock source for RTC itself. Skip it.
  57         ertc_write_protect_enable();
  58         ertc_write_protect_disable();
  59
  60     }
  61
  62 #elif defined(USE_HAL_DRIVER)
  63
  64 uint32_t persistentObjectRead(persistentObjectId_e id)
  65 {
  66     RTC_HandleTypeDef rtcHandle = { .Instance = RTC };
  67
  68     uint32_t value = HAL_RTCEx_BKUPRead(&rtcHandle, id);
  69
  70     return value;
  71 }
  72
  73 void persistentObjectWrite(persistentObjectId_e id, uint32_t value)
  74 {
  75     RTC_HandleTypeDef rtcHandle = { .Instance = RTC };
  76
  77     HAL_RTCEx_BKUPWrite(&rtcHandle, id, value);
  78 }
  79
  80 void persistentObjectRTCEnable(void)
  81 {
  82     RTC_HandleTypeDef rtcHandle = { .Instance = RTC };
  83
  84 #if !defined(STM32H7)
  85     __HAL_RCC_PWR_CLK_ENABLE(); // Enable Access to PWR
  86 #endif
  87     HAL_PWR_EnableBkUpAccess(); // Disable backup domain protection
  88
  89 #if defined(__HAL_RCC_RTC_CLK_ENABLE)
  90     // For those MCUs with RTCAPBEN bit in RCC clock enable register, turn it on.
  91     __HAL_RCC_RTC_CLK_ENABLE(); // Enable RTC module
  92 #endif
  93
  94     // We don't need a clock source for RTC itself. Skip it.
  95
  96     __HAL_RTC_WRITEPROTECTION_ENABLE(&rtcHandle);  // Reset sequence
  97     __HAL_RTC_WRITEPROTECTION_DISABLE(&rtcHandle); // Apply sequence
  98 }
  99
 100 #else
 101 uint32_t persistentObjectRead(persistentObjectId_e id)
 102 {
 103     uint32_t value = RTC_ReadBackupRegister(id);
 104
 105     return value;
 106 }
 107
 108 void persistentObjectWrite(persistentObjectId_e id, uint32_t value)
 109 {
 110     RTC_WriteBackupRegister(id, value);
 111 }
 112
 113 void persistentObjectRTCEnable(void)
 114 {
 115     RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); // Enable Access to PWR
 116     PWR_BackupAccessCmd(ENABLE); // Disable backup domain protection
 117
 118     // We don't need a clock source for RTC itself. Skip it.
 119
 120     RTC_WriteProtectionCmd(ENABLE);  // Reset sequence
 121     RTC_WriteProtectionCmd(DISABLE); // Apply sequence
 122 }
 123 #endif
 124
 125 void persistentObjectInit(void)
 126 {
 127     // Configure and enable RTC for backup register access
 128
 129     persistentObjectRTCEnable();
 130
 131     // XXX Magic value checking may be sufficient
 132
 133     uint32_t wasSoftReset;
 134
 135 #if defined(AT32F43x)
 136     wasSoftReset = crm_flag_get(CRM_SW_RESET_FLAG);
 137 #elif defined(STM32H7)
 138     wasSoftReset = RCC->RSR & RCC_RSR_SFTRSTF;
 139 #else
 140     wasSoftReset = RCC->CSR & RCC_CSR_SFTRSTF;
 141 #endif
 142
 143     if (!wasSoftReset || (persistentObjectRead(PERSISTENT_OBJECT_MAGIC) != PERSISTENT_OBJECT_MAGIC_VALUE)) {
 144         for (int i = 1; i < PERSISTENT_OBJECT_COUNT; i++) {
 145             persistentObjectWrite(i, 0);
 146         }
 147         persistentObjectWrite(PERSISTENT_OBJECT_MAGIC, PERSISTENT_OBJECT_MAGIC_VALUE);
 148     }
 149 }