src/main/drivers/timer_stm32f4xx.c

   1 /*
   2  * This file is part of INAV.
   3  *
   4  * INAV is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * INAV is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with INAV.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <stdbool.h>
  19 #include <stdint.h>
  20
  21 #include "platform.h"
  22
  23 #include "build/atomic.h"
  24
  25 #include "common/utils.h"
  26
  27 #include "drivers/io.h"
  28 #include "drivers/rcc.h"
  29 #include "drivers/time.h"
  30 #include "drivers/nvic.h"
  31 #include "drivers/timer.h"
  32 #include "drivers/timer_impl.h"
  33
  34 #include "stm32f4xx.h"
  35
  36 const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
  37 #if defined(TIM1)
  38     [0] = { .tim = TIM1,  .rcc = RCC_APB2(TIM1),  .irq = TIM1_CC_IRQn, .secondIrq = TIM1_UP_TIM10_IRQn },
  39 #endif
  40
  41 #if defined(TIM2)
  42     [1] = { .tim = TIM2,  .rcc = RCC_APB1(TIM2),  .irq = TIM2_IRQn},
  43 #endif
  44
  45 #if defined(TIM3)
  46     [2] = { .tim = TIM3,  .rcc = RCC_APB1(TIM3),  .irq = TIM3_IRQn},
  47 #endif
  48
  49 #if defined(TIM4)
  50     [3] = { .tim = TIM4,  .rcc = RCC_APB1(TIM4),  .irq = TIM4_IRQn},
  51 #endif
  52
  53 #if defined(TIM5)
  54     [4] = { .tim = TIM5,  .rcc = RCC_APB1(TIM5),  .irq = TIM5_IRQn},
  55 #endif
  56
  57 #if defined(TIM6)
  58     [5] = { .tim = TIM6,  .rcc = RCC_APB1(TIM6),  .irq = 0},
  59 #endif
  60
  61 #if defined(TIM7)
  62     [6] = { .tim = TIM7,  .rcc = RCC_APB1(TIM7),  .irq = 0},
  63 #endif
  64
  65 #if defined(TIM8) && !defined(STM32F411xE)
  66 #if defined(STM32F446xx)
  67     [7] = { .tim = TIM8,  .rcc = RCC_APB2(TIM8),  .irq = 0 },
  68 #else
  69     [7] = { .tim = TIM8,  .rcc = RCC_APB2(TIM8),  .irq = TIM8_CC_IRQn, .secondIrq = TIM8_UP_TIM13_IRQn },
  70 #endif
  71 #endif
  72
  73 #if defined(TIM9)
  74     [8] = { .tim = TIM9,  .rcc = RCC_APB2(TIM9),  .irq = TIM1_BRK_TIM9_IRQn},
  75 #endif
  76
  77 #if defined(TIM10)
  78     [9] = { .tim = TIM10, .rcc = RCC_APB2(TIM10), .irq = TIM1_UP_TIM10_IRQn},
  79 #endif
  80
  81 #if defined(TIM11)
  82     [10] = { .tim = TIM11, .rcc = RCC_APB2(TIM11), .irq = TIM1_TRG_COM_TIM11_IRQn},
  83 #endif
  84
  85 #if defined(TIM12) && !defined(STM32F411xE)
  86     [11] = { .tim = TIM12, .rcc = RCC_APB1(TIM12), .irq = TIM8_BRK_TIM12_IRQn},
  87 #endif
  88
  89 #if defined(TIM13) && !defined(STM32F411xE)
  90     [12] = { .tim = TIM13, .rcc = RCC_APB1(TIM13), .irq = TIM8_UP_TIM13_IRQn},
  91 #endif
  92
  93 #if defined(TIM14) && !defined(STM32F411xE)
  94     [13] = { .tim = TIM14, .rcc = RCC_APB1(TIM14), .irq = TIM8_TRG_COM_TIM14_IRQn},
  95 #endif
  96 };
  97
  98 uint32_t timerClock(TIM_TypeDef *tim)
  99 {
 100 #if defined (STM32F411xE)
 101     UNUSED(tim);
 102     return SystemCoreClock;
 103 #elif defined (STM32F40_41xxx) || defined (STM32F427_437xx) || defined (STM32F446xx)
 104     if (tim == TIM1 || tim == TIM8 || tim == TIM9 || tim == TIM10 || tim == TIM11) {
 105         return SystemCoreClock;
 106     } else {
 107         return SystemCoreClock / 2;
 108     }
 109 #else
 110     #error "No timer clock defined correctly for the MCU"
 111 #endif
 112 }
 113
 114 // Timer IRQ handlers
 115 _TIM_IRQ_HANDLER(TIM1_CC_IRQHandler, 1);
 116 _TIM_IRQ_HANDLER2(TIM1_BRK_TIM9_IRQHandler, 1, 9);
 117 _TIM_IRQ_HANDLER2(TIM1_UP_TIM10_IRQHandler, 1, 10);
 118 _TIM_IRQ_HANDLER2(TIM1_TRG_COM_TIM11_IRQHandler, 1, 11);
 119 _TIM_IRQ_HANDLER(TIM2_IRQHandler, 2);
 120 _TIM_IRQ_HANDLER(TIM3_IRQHandler, 3);
 121 _TIM_IRQ_HANDLER(TIM4_IRQHandler, 4);
 122 _TIM_IRQ_HANDLER(TIM5_IRQHandler, 5);
 123
 124 #if defined(TIM8) && !defined(STM32F411xE)
 125 _TIM_IRQ_HANDLER(TIM8_CC_IRQHandler, 8);
 126 _TIM_IRQ_HANDLER(TIM8_UP_IRQHandler, 8);
 127 #endif
 128
 129 #if defined(TIM12) && !defined(STM32F411xE)
 130 _TIM_IRQ_HANDLER2(TIM8_BRK_TIM12_IRQHandler, 8, 12);
 131 #endif
 132
 133 #if defined(TIM13) && !defined(STM32F411xE)
 134 _TIM_IRQ_HANDLER2(TIM8_UP_TIM13_IRQHandler, 8, 13);
 135 #endif
 136
 137 #if defined(TIM14) && !defined(STM32F411xE)
 138 _TIM_IRQ_HANDLER2(TIM8_TRG_COM_TIM14_IRQHandler, 8, 14);
 139 #endif