src/main/target/system_at32f435_437.c

   1 /**
   2   **************************************************************************
   3   * @file     system_at32f435_437.c
   4   * @version  v2.1.0
   5   * @date     2022-08-16
   6   * @brief    contains all the functions for cmsis cortex-m4 system source file
   7   **************************************************************************
   8   *                       Copyright notice & Disclaimer
   9   *
  10   * The software Board Support Package (BSP) that is made available to
  11   * download from Artery official website is the copyrighted work of Artery.
  12   * Artery authorizes customers to use, copy, and distribute the BSP
  13   * software and its related documentation for the purpose of design and
  14   * development in conjunction with Artery microcontrollers. Use of the
  15   * software is governed by this copyright notice and the following disclaimer.
  16   *
  17   * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  18   * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  19   * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  20   * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  21   * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  22   * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  23   *
  24   **************************************************************************
  25   */
  26
  27 /** @addtogroup CMSIS
  28   * @{
  29   */
  30
  31 /** @addtogroup AT32F435_437_system
  32   * @{
  33   */
  34
  35 #include "at32f435_437.h"
  36 #include "drivers/system.h"
  37 #include "platform.h"
  38 #include "drivers/persistent.h"
  39
  40 /** @addtogroup AT32F435_437_system_private_defines
  41   * @{
  42   */
  43 #define VECT_TAB_OFFSET                  0x0 /*!< vector table base offset field. this value must be a multiple of 0x200. */
  44 /**
  45   * @}
  46   */
  47
  48 /** @addtogroup AT32F435_437_system_private_variables
  49   * @{
  50   */
  51 unsigned int system_core_clock           = HICK_VALUE; /*!< system clock frequency (core clock) */
  52 /**
  53   * @}
  54   */
  55
  56 /** @addtogroup AT32F435_437_system_private_functions
  57   * @{
  58   */
  59
  60 /**
  61   * @brief  setup the microcontroller system
  62   *         initialize the flash interface.
  63   * @note   this function should be used only after reset.
  64   * @param  none
  65   * @retval none
  66   */
  67 void SystemInit (void)
  68 {
  69     initialiseMemorySections();
  70 #if defined (__FPU_USED) && (__FPU_USED == 1U)
  71   SCB->CPACR |= ((3U << 10U * 2U) |         /* set cp10 full access */
  72                  (3U << 11U * 2U)  );       /* set cp11 full access */
  73 #endif
  74
  75   /* reset the crm clock configuration to the default reset state(for debug purpose) */
  76   /* set hicken bit */
  77   CRM->ctrl_bit.hicken = TRUE;
  78
  79   /* wait hick stable */
  80   while(CRM->ctrl_bit.hickstbl != SET);
  81
  82   /* hick used as system clock */
  83   CRM->cfg_bit.sclksel = CRM_SCLK_HICK;
  84
  85   /* wait sclk switch status */
  86   while(CRM->cfg_bit.sclksts != CRM_SCLK_HICK);
  87
  88   /* reset hexten, hextbyps, cfden and pllen bits */
  89   CRM->ctrl &= ~(0x010D0000U);
  90
  91   /* reset cfg register, include sclk switch, ahbdiv, apb1div, apb2div, adcdiv, clkout bits */
  92   CRM->cfg = 0;
  93
  94   /* reset pllms pllns pllfr pllrcs bits */
  95   CRM->pllcfg = 0x00033002U;
  96
  97   /* reset clkout[3], usbbufs, hickdiv, clkoutdiv */
  98   CRM->misc1 = 0;
  99
 100   /* disable all interrupts enable and clear pending bits  */
 101   CRM->clkint = 0x009F0000U;
 102 // set vector table relocation
 103 #ifdef VECT_TAB_SRAM
 104   SCB->VTOR = SRAM_BASE  | VECT_TAB_OFFSET;  /* vector table relocation in internal sram. */
 105 #else
 106   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;  /* vector table relocation in internal flash. */
 107 #endif
 108 }
 109
 110 /**
 111   * @brief  update system_core_clock variable according to clock register values.
 112   *         the system_core_clock variable contains the core clock (hclk), it can
 113   *         be used by the user application to setup the systick timer or configure
 114   *         other parameters.
 115   * @param  none
 116   * @retval none
 117   */
 118 void system_core_clock_update(void)
 119 {
 120   uint32_t pll_ns = 0, pll_ms = 0, pll_fr = 0, pll_clock_source = 0, pllrcsfreq = 0;
 121   uint32_t temp = 0, div_value = 0;
 122   crm_sclk_type sclk_source;
 123
 124   static const uint8_t sys_ahb_div_table[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 125   static const uint8_t pll_fr_table[6] = {1, 2, 4, 8, 16, 32};
 126
 127   /* get sclk source */
 128   sclk_source = crm_sysclk_switch_status_get();
 129
 130   switch(sclk_source)
 131   {
 132     case CRM_SCLK_HICK:
 133       if(((CRM->misc1_bit.hick_to_sclk) != RESET) && ((CRM->misc1_bit.hickdiv) != RESET))
 134         system_core_clock = HICK_VALUE * 6;
 135       else
 136         system_core_clock = HICK_VALUE;
 137       break;
 138     case CRM_SCLK_HEXT:
 139       system_core_clock = HEXT_VALUE;
 140       break;
 141     case CRM_SCLK_PLL:
 142       /* get pll clock source */
 143       pll_clock_source = CRM->pllcfg_bit.pllrcs;
 144
 145       /* get multiplication factor */
 146       pll_ns = CRM->pllcfg_bit.pllns;
 147       pll_ms = CRM->pllcfg_bit.pllms;
 148       pll_fr = pll_fr_table[CRM->pllcfg_bit.pllfr];
 149
 150       if (pll_clock_source == CRM_PLL_SOURCE_HICK)
 151       {
 152         /* hick selected as pll clock entry */
 153         pllrcsfreq = HICK_VALUE;
 154       }
 155       else
 156       {
 157         /* hext selected as pll clock entry */
 158         pllrcsfreq = HEXT_VALUE;
 159       }
 160
 161       system_core_clock = (uint32_t)(((uint64_t)pllrcsfreq * pll_ns) / (pll_ms * pll_fr));
 162       break;
 163     default:
 164       system_core_clock = HICK_VALUE;
 165       break;
 166   }
 167
 168   /* compute sclk, ahbclk frequency */
 169   /* get ahb division */
 170   temp = CRM->cfg_bit.ahbdiv;
 171   div_value = sys_ahb_div_table[temp];
 172   /* ahbclk frequency */
 173   system_core_clock = system_core_clock >> div_value;
 174 }
 175 /**
 176   * @}
 177   */
 178
 179 /**
 180   * @}
 181   */
 182
 183 /**
 184   * @}
 185   */
 186