2 **************************************************************************
3 * @file at32f435_437_wdt.h
6 * @brief at32f435_437 wdt header file
7 **************************************************************************
8 * Copyright notice & Disclaimer
10 * The software Board Support Package (BSP) that is made available to
11 * download from Artery official website is the copyrighted work of Artery.
12 * Artery authorizes customers to use, copy, and distribute the BSP
13 * software and its related documentation for the purpose of design and
14 * development in conjunction with Artery microcontrollers. Use of the
15 * software is governed by this copyright notice and the following disclaimer.
17 * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
18 * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
19 * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
20 * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
21 * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
24 **************************************************************************
27 /* Define to prevent recursive inclusion -------------------------------------*/
28 #ifndef __AT32F435_437_WDT_H
29 #define __AT32F435_437_WDT_H
36 /* Includes ------------------------------------------------------------------*/
37 #include "at32f435_437.h"
39 /** @addtogroup AT32F435_437_periph_driver
48 /** @defgroup WDT_flags_definition
53 #define WDT_DIVF_UPDATE_FLAG ((uint16_t)0x0001) /*!< wdt division value update complete flag */
54 #define WDT_RLDF_UPDATE_FLAG ((uint16_t)0x0002) /*!< wdt reload value update complete flag */
55 #define WDT_WINF_UPDATE_FLAG ((uint16_t)0x0004) /*!< wdt window value update complete flag */
61 /** @defgroup WDT_exported_types
66 * @brief wdt division value type
70 WDT_CLK_DIV_4
= 0x00, /*!< wdt clock divider value is 4 */
71 WDT_CLK_DIV_8
= 0x01, /*!< wdt clock divider value is 8 */
72 WDT_CLK_DIV_16
= 0x02, /*!< wdt clock divider value is 16 */
73 WDT_CLK_DIV_32
= 0x03, /*!< wdt clock divider value is 32 */
74 WDT_CLK_DIV_64
= 0x04, /*!< wdt clock divider value is 64 */
75 WDT_CLK_DIV_128
= 0x05, /*!< wdt clock divider value is 128 */
76 WDT_CLK_DIV_256
= 0x06 /*!< wdt clock divider value is 256 */
80 * @brief wdt cmd value type
84 WDT_CMD_LOCK
= 0x0000, /*!< disable write protection command */
85 WDT_CMD_UNLOCK
= 0x5555, /*!< enable write protection command */
86 WDT_CMD_ENABLE
= 0xCCCC, /*!< enable wdt command */
87 WDT_CMD_RELOAD
= 0xAAAA /*!< reload command */
91 * @brief type define wdt register all
97 * @brief wdt cmd register, offset:0x00
104 __IO
uint32_t cmd
: 16;/* [15:0] */
105 __IO
uint32_t reserved1
: 16;/* [31:16] */
110 * @brief wdt div register, offset:0x04
117 __IO
uint32_t div
: 3; /* [2:0] */
118 __IO
uint32_t reserved1
: 29;/* [31:3] */
123 * @brief wdt rld register, offset:0x08
130 __IO
uint32_t rld
: 12;/* [11:0] */
131 __IO
uint32_t reserved1
: 20;/* [31:12] */
136 * @brief wdt sts register, offset:0x0C
143 __IO
uint32_t divf
: 1; /* [0] */
144 __IO
uint32_t rldf
: 1; /* [1] */
145 __IO
uint32_t reserved1
: 30;/* [31:2] */
150 * @brief wdt win register, offset:0x10
157 __IO
uint32_t win
: 12;/* [11:0] */
158 __IO
uint32_t reserved1
: 20;/* [31:12] */
167 #define WDT ((wdt_type *) WDT_BASE)
169 /** @defgroup WDT_exported_functions
173 void wdt_enable(void);
174 void wdt_counter_reload(void);
175 void wdt_reload_value_set(uint16_t reload_value
);
176 void wdt_divider_set(wdt_division_type division
);
177 void wdt_register_write_enable( confirm_state new_state
);
178 flag_status
wdt_flag_get(uint16_t wdt_flag
);
179 void wdt_window_counter_set(uint16_t window_cnt
);