lib/main/AT32F43x/Drivers/AT32F43x_StdPeriph_Driver/src/at32f435_437_misc.c

   1 /**
   2   **************************************************************************
   3   * @file     at32f435_437_misc.c
   4   * @version  v2.1.0
   5   * @date     2022-08-16
   6   * @brief    contains all the functions for the misc firmware library
   7   **************************************************************************
   8   *                       Copyright notice & Disclaimer
   9   *
  10   * The software Board Support Package (BSP) that is made available to
  11   * download from Artery official website is the copyrighted work of Artery.
  12   * Artery authorizes customers to use, copy, and distribute the BSP
  13   * software and its related documentation for the purpose of design and
  14   * development in conjunction with Artery microcontrollers. Use of the
  15   * software is governed by this copyright notice and the following disclaimer.
  16   *
  17   * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  18   * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  19   * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  20   * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  21   * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  22   * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  23   *
  24   **************************************************************************
  25   */
  26
  27 /* includes ------------------------------------------------------------------*/
  28 #include "at32f435_437_conf.h"
  29
  30 /** @addtogroup AT32F435_437_periph_driver
  31   * @{
  32   */
  33
  34 /** @defgroup MISC
  35   * @brief MISC driver modules
  36   * @{
  37   */
  38
  39 #ifdef MISC_MODULE_ENABLED
  40
  41 /** @defgroup MISC_private_functions
  42   * @{
  43   */
  44
  45 #define AIRCR_VECTKEY_MASK    ((uint32_t)0x05FA0000)
  46
  47 /**
  48   * @brief  system reset
  49   * @param  none
  50   * @retval none
  51   */
  52 void nvic_system_reset(void)
  53 {
  54   NVIC_SystemReset();
  55 }
  56
  57 /**
  58   * @brief  enable nvic irq
  59   * @param  irqn (IRQn_Type number)
  60   * @param  preempt_priority: preemptive priority value (starting from 0)
  61   * @param  sub_priority: subpriority value (starting from 0)
  62   * @retval none
  63   */
  64 void nvic_irq_enable(IRQn_Type irqn, uint32_t preempt_priority, uint32_t sub_priority)
  65 {
  66   uint32_t temp_priority = 0;
  67
  68   /* encode priority */
  69   temp_priority = NVIC_EncodePriority(NVIC_GetPriorityGrouping(), preempt_priority, sub_priority);
  70   /* set priority */
  71   NVIC_SetPriority(irqn, temp_priority);
  72   /* enable irqn */
  73   NVIC_EnableIRQ(irqn);
  74 }
  75
  76 /**
  77   * @brief  disable nvic irq number
  78   * @param  irqn (IRQn_Type number)
  79   * @retval none
  80   */
  81 void nvic_irq_disable(IRQn_Type irqn)
  82 {
  83   NVIC_DisableIRQ(irqn);
  84 }
  85
  86 /**
  87   * @brief  config nvic priority group
  88   * @param  priority_group
  89   *         this parameter can be one of the following values:
  90   *         - NVIC_PRIORITY_GROUP_0
  91   *         - NVIC_PRIORITY_GROUP_1
  92   *         - NVIC_PRIORITY_GROUP_2
  93   *         - NVIC_PRIORITY_GROUP_3
  94   *         - NVIC_PRIORITY_GROUP_4
  95   * @retval none
  96   */
  97 void nvic_priority_group_config(nvic_priority_group_type priority_group)
  98 {
  99   /* set the prigroup[10:8] bits according to nvic_prioritygroup value */
 100   NVIC_SetPriorityGrouping(priority_group);
 101 }
 102
 103 /**
 104   * @brief  set the vector table location and offset.
 105   * @param  base
 106   *         this parameter can be one of the following values:
 107   *         - NVIC_VECTTAB_RAM
 108   *         - NVIC_VECTTAB_FLASH
 109   * @param  offset (vector table base offset field. this value must be a multiple of 0x200)
 110   * @retval none
 111   */
 112 void nvic_vector_table_set(uint32_t base, uint32_t offset)
 113 {
 114   SCB->VTOR = base | (offset & (uint32_t)0x1FFFFF80);
 115 }
 116
 117 /**
 118   * @brief  config nvic lowpower mode
 119   * @param  lp_mode
 120   *         this parameter can be one of the following values:
 121   *         - NVIC_LP_SEVONPEND
 122   *         - NVIC_LP_SLEEPDEEP
 123   *         - NVIC_LP_SLEEPONEXIT
 124   * @param  new_state (new state of lp condition. ENABLE or DISABLE)
 125   * @retval none
 126   */
 127 void nvic_lowpower_mode_config(nvic_lowpower_mode_type lp_mode, confirm_state new_state)
 128 {
 129   if(new_state != FALSE)
 130   {
 131     SCB->SCR |= lp_mode;
 132   }
 133   else
 134   {
 135     SCB->SCR &= (uint32_t)(~(uint32_t)lp_mode);
 136   }
 137 }
 138
 139 /**
 140   * @brief  config systick clock source
 141   * @param  source
 142   *         this parameter can be one of the following values:
 143   *         - SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8
 144   *         - SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV
 145   * @retval none
 146   */
 147 void systick_clock_source_config(systick_clock_source_type source)
 148 {
 149   if(source == SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV)
 150   {
 151     SysTick->CTRL |= SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV;
 152   }
 153   else
 154   {
 155     SysTick->CTRL &= ~(uint32_t)SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV;
 156   }
 157 }
 158
 159 /**
 160   * @}
 161   */
 162
 163 #endif
 164
 165 /**
 166   * @}
 167   */
 168
 169 /**
 170   * @}
 171   */
 172
 173