lib/main/STM32F7/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_ll_usart.c
   4   * @author  MCD Application Team
   5   * @version V1.2.2
   6   * @date    14-April-2017
   7   * @brief   USART LL module driver.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37 #if defined(USE_FULL_LL_DRIVER)
  38
  39 /* Includes ------------------------------------------------------------------*/
  40 #include "stm32f7xx_ll_usart.h"
  41 #include "stm32f7xx_ll_rcc.h"
  42 #include "stm32f7xx_ll_bus.h"
  43 #ifdef  USE_FULL_ASSERT
  44 #include "stm32_assert.h"
  45 #else
  46 #define assert_param(expr) ((void)0U)
  47 #endif
  48
  49 /** @addtogroup STM32F7xx_LL_Driver
  50   * @{
  51   */
  52
  53 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8)
  54
  55 /** @addtogroup USART_LL
  56   * @{
  57   */
  58
  59 /* Private types -------------------------------------------------------------*/
  60 /* Private variables ---------------------------------------------------------*/
  61 /* Private constants ---------------------------------------------------------*/
  62 /** @addtogroup USART_LL_Private_Constants
  63   * @{
  64   */
  65
  66 /**
  67   * @}
  68   */
  69
  70
  71 /* Private macros ------------------------------------------------------------*/
  72 /** @addtogroup USART_LL_Private_Macros
  73   * @{
  74   */
  75
  76 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  77  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
  78 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 27000000U)
  79
  80 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
  81 #define IS_LL_USART_BRR(__VALUE__) (((__VALUE__) >= 16U) \
  82                                     && ((__VALUE__) <= 0x0000FFFFU))
  83
  84 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  85                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  86                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  87                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  88
  89 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  90                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  91                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
  92
  93 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
  94                                        || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  95                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  96
  97 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  98                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  99
 100 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
 101                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
 102
 103 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
 104                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
 105
 106 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
 107                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
 108
 109 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
 110                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
 111
 112 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
 113                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
 114                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
 115                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
 116
 117 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
 118                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
 119                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
 120                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
 121
 122 /**
 123   * @}
 124   */
 125
 126 /* Private function prototypes -----------------------------------------------*/
 127
 128 /* Exported functions --------------------------------------------------------*/
 129 /** @addtogroup USART_LL_Exported_Functions
 130   * @{
 131   */
 132
 133 /** @addtogroup USART_LL_EF_Init
 134   * @{
 135   */
 136
 137 /**
 138   * @brief  De-initialize USART registers (Registers restored to their default values).
 139   * @param  USARTx USART Instance
 140   * @retval An ErrorStatus enumeration value:
 141   *          - SUCCESS: USART registers are de-initialized
 142   *          - ERROR: USART registers are not de-initialized
 143   */
 144 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
 145 {
 146   ErrorStatus status = SUCCESS;
 147
 148   /* Check the parameters */
 149   assert_param(IS_UART_INSTANCE(USARTx));
 150
 151   if (USARTx == USART1)
 152   {
 153     /* Force reset of USART clock */
 154     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
 155
 156     /* Release reset of USART clock */
 157     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
 158   }
 159   else if (USARTx == USART2)
 160   {
 161     /* Force reset of USART clock */
 162     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
 163
 164     /* Release reset of USART clock */
 165     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
 166   }
 167   else if (USARTx == USART3)
 168   {
 169     /* Force reset of USART clock */
 170     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
 171
 172     /* Release reset of USART clock */
 173     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
 174   }
 175   else if (USARTx == USART6)
 176   {
 177     /* Force reset of USART clock */
 178     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
 179
 180     /* Release reset of USART clock */
 181     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
 182   }
 183   else if (USARTx == UART4)
 184   {
 185     /* Force reset of UART clock */
 186     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
 187
 188     /* Release reset of UART clock */
 189     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
 190   }
 191   else if (USARTx == UART5)
 192   {
 193     /* Force reset of UART clock */
 194     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
 195
 196     /* Release reset of UART clock */
 197     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
 198   }
 199   else if (USARTx == UART7)
 200   {
 201     /* Force reset of UART clock */
 202     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
 203
 204     /* Release reset of UART clock */
 205     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
 206   }
 207   else if (USARTx == UART8)
 208   {
 209     /* Force reset of UART clock */
 210     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
 211
 212     /* Release reset of UART clock */
 213     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
 214   }
 215   else
 216   {
 217     status = ERROR;
 218   }
 219
 220   return (status);
 221 }
 222
 223 /**
 224   * @brief  Initialize USART registers according to the specified
 225   *         parameters in USART_InitStruct.
 226   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 227   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 228   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
 229   * @param  USARTx USART Instance
 230   * @param  USART_InitStruct: pointer to a LL_USART_InitTypeDef structure
 231   *         that contains the configuration information for the specified USART peripheral.
 232   * @retval An ErrorStatus enumeration value:
 233   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
 234   *          - ERROR: Problem occurred during USART Registers initialization
 235   */
 236 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 237 {
 238   ErrorStatus status = ERROR;
 239   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 240
 241   /* Check the parameters */
 242   assert_param(IS_UART_INSTANCE(USARTx));
 243   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
 244   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
 245   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
 246   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
 247   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
 248   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
 249   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 250
 251   /* USART needs to be in disabled state, in order to be able to configure some bits in
 252      CRx registers */
 253   if (LL_USART_IsEnabled(USARTx) == 0U)
 254   {
 255     /*---------------------------- USART CR1 Configuration ---------------------
 256      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
 257      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
 258      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
 259      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
 260      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
 261      */
 262     MODIFY_REG(USARTx->CR1,
 263                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 264                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
 265                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 266                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
 267
 268     /*---------------------------- USART CR2 Configuration ---------------------
 269      * Configure USARTx CR2 (Stop bits) with parameters:
 270      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
 271      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
 272      */
 273     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
 274
 275     /*---------------------------- USART CR3 Configuration ---------------------
 276      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
 277      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
 278      */
 279     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
 280
 281     /*---------------------------- USART BRR Configuration ---------------------
 282      * Retrieve Clock frequency used for USART Peripheral
 283      */
 284     if (USARTx == USART1)
 285     {
 286       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
 287     }
 288     else if (USARTx == USART2)
 289     {
 290       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
 291     }
 292     else if (USARTx == USART3)
 293     {
 294       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
 295     }
 296     else if (USARTx == USART6)
 297     {
 298       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
 299     }
 300     else if (USARTx == UART4)
 301     {
 302       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
 303     }
 304     else if (USARTx == UART5)
 305     {
 306       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
 307     }
 308     else if (USARTx == UART7)
 309     {
 310       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
 311     }
 312     else if (USARTx == UART8)
 313     {
 314       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
 315     }
 316     else
 317     {
 318       /* Nothing to do, as error code is already assigned to ERROR value */
 319     }
 320
 321     /* Configure the USART Baud Rate :
 322        - valid baud rate value (different from 0) is required
 323        - Peripheral clock as returned by RCC service, should be valid (different from 0).
 324     */
 325     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
 326         && (USART_InitStruct->BaudRate != 0U))
 327     {
 328       status = SUCCESS;
 329       LL_USART_SetBaudRate(USARTx,
 330                            periphclk,
 331                            USART_InitStruct->OverSampling,
 332                            USART_InitStruct->BaudRate);
 333
 334       /* Check BRR is greater than or equal to 16d */
 335       assert_param(IS_LL_USART_BRR(USARTx->BRR));
 336     }
 337   }
 338   /* Endif (=> USART not in Disabled state => return ERROR) */
 339
 340   return (status);
 341 }
 342
 343 /**
 344   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
 345   * @param USART_InitStruct: pointer to a @ref LL_USART_InitTypeDef structure
 346   *                          whose fields will be set to default values.
 347   * @retval None
 348   */
 349
 350 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
 351 {
 352   /* Set USART_InitStruct fields to default values */
 353   USART_InitStruct->BaudRate            = 9600U;
 354   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
 355   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
 356   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
 357   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
 358   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
 359   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
 360 }
 361
 362 /**
 363   * @brief  Initialize USART Clock related settings according to the
 364   *         specified parameters in the USART_ClockInitStruct.
 365   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 366   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 367   * @param  USARTx USART Instance
 368   * @param  USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 369   *         that contains the Clock configuration information for the specified USART peripheral.
 370   * @retval An ErrorStatus enumeration value:
 371   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
 372   *          - ERROR: Problem occurred during USART Registers initialization
 373   */
 374 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 375 {
 376   ErrorStatus status = SUCCESS;
 377
 378   /* Check USART Instance and Clock signal output parameters */
 379   assert_param(IS_UART_INSTANCE(USARTx));
 380   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
 381
 382   /* USART needs to be in disabled state, in order to be able to configure some bits in
 383      CRx registers */
 384   if (LL_USART_IsEnabled(USARTx) == 0U)
 385   {
 386     /*---------------------------- USART CR2 Configuration -----------------------*/
 387     /* If Clock signal has to be output */
 388     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
 389     {
 390       /* Deactivate Clock signal delivery :
 391        * - Disable Clock Output:        USART_CR2_CLKEN cleared
 392        */
 393       LL_USART_DisableSCLKOutput(USARTx);
 394     }
 395     else
 396     {
 397       /* Ensure USART instance is USART capable */
 398       assert_param(IS_USART_INSTANCE(USARTx));
 399
 400       /* Check clock related parameters */
 401       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
 402       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
 403       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
 404
 405       /*---------------------------- USART CR2 Configuration -----------------------
 406        * Configure USARTx CR2 (Clock signal related bits) with parameters:
 407        * - Enable Clock Output:         USART_CR2_CLKEN set
 408        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
 409        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
 410        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
 411        */
 412       MODIFY_REG(USARTx->CR2,
 413                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
 414                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
 415                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
 416     }
 417   }
 418   /* Else (USART not in Disabled state => return ERROR */
 419   else
 420   {
 421     status = ERROR;
 422   }
 423
 424   return (status);
 425 }
 426
 427 /**
 428   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
 429   * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 430   *                               whose fields will be set to default values.
 431   * @retval None
 432   */
 433 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 434 {
 435   /* Set LL_USART_ClockInitStruct fields with default values */
 436   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
 437   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 438   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 439   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 440 }
 441
 442 /**
 443   * @}
 444   */
 445
 446 /**
 447   * @}
 448   */
 449
 450 /**
 451   * @}
 452   */
 453
 454 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
 455
 456 /**
 457   * @}
 458   */
 459
 460 #endif /* USE_FULL_LL_DRIVER */
 461
 462 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 463