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1 /**
2 ******************************************************************************
3 * @file usb_hcd_int.h
4 * @author MCD Application Team
5 * @version V2.2.0
6 * @date 09-November-2015
7 * @brief Peripheral Device Interface Layer
8 ******************************************************************************
9 * @attention
11 * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
13 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 * You may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at:
17 * http://www.st.com/software_license_agreement_liberty_v2
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
25 ******************************************************************************
28 /* Define to prevent recursive inclusion -------------------------------------*/
29 #ifndef __HCD_INT_H__
30 #define __HCD_INT_H__
32 /* Includes ------------------------------------------------------------------*/
33 #include "usb_hcd.h"
36 /** @addtogroup USB_OTG_DRIVER
37 * @{
40 /** @defgroup USB_HCD_INT
41 * @brief This file is the
42 * @{
43 */
46 /** @defgroup USB_HCD_INT_Exported_Defines
47 * @{
48 */
49 /**
50 * @}
51 */
54 /** @defgroup USB_HCD_INT_Exported_Types
55 * @{
56 */
58 typedef struct _USBH_HCD_INT
60 uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
61 uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
62 uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
63 uint8_t (* DevPortEnabled) (USB_OTG_CORE_HANDLE *pdev);
64 uint8_t (* DevPortDisabled) (USB_OTG_CORE_HANDLE *pdev);
66 }USBH_HCD_INT_cb_TypeDef;
68 extern USBH_HCD_INT_cb_TypeDef *USBH_HCD_INT_fops;
69 /**
70 * @}
71 */
74 /** @defgroup USB_HCD_INT_Exported_Macros
75 * @{
76 */
78 #define CLEAR_HC_INT(HC_REGS, intr) \
80 USB_OTG_HCINTn_TypeDef hcint_clear; \
81 hcint_clear.d32 = 0; \
82 hcint_clear.b.intr = 1; \
83 USB_OTG_WRITE_REG32(&((HC_REGS)->HCINT), hcint_clear.d32);\
86 #define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
87 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
88 INTMSK.b.chhltd = 0; \
89 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
91 #define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
92 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
93 INTMSK.b.chhltd = 1; \
94 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
96 #define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
97 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
98 INTMSK.b.ack = 0; \
99 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, GINTMSK.d32);}
101 #define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef INTMSK; \
102 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
103 INTMSK.b.ack = 1; \
104 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
107 * @}
110 /** @defgroup USB_HCD_INT_Exported_Variables
111 * @{
114 * @}
117 /** @defgroup USB_HCD_INT_Exported_FunctionsPrototype
118 * @{
120 /* Callbacks handler */
121 void ConnectCallback_Handler(USB_OTG_CORE_HANDLE *pdev);
122 void Disconnect_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
123 void Overcurrent_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
124 uint32_t USBH_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
127 * @}
132 #endif //__HCD_INT_H__
136 * @}
140 * @}
142 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/