Set blackbox file handler to NULL after closing file
[inav.git] / lib / main / STM32F4 / Drivers / STM32F4xx_StdPeriph_Driver / inc / stm32f4xx_fmpi2c.h
blob6dd9662f4f241f58ff21353e3f31c77968a07551
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_fmpi2c.h
4 * @author MCD Application Team
5 * @version V1.7.1
6 * @date 20-May-2016
7 * @brief This file contains all the functions prototypes for the I2C Fast Mode
8 * Plus firmware library.
9 ******************************************************************************
10 * @attention
12 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 * You may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at:
18 * http://www.st.com/software_license_agreement_liberty_v2
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
26 ******************************************************************************
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F4xx_FMPI2C_H
31 #define __STM32F4xx_FMPI2C_H
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f4xx.h"
40 /** @addtogroup STM32F4xx_StdPeriph_Driver
41 * @{
44 /** @addtogroup FMPI2C
45 * @{
47 #if defined(STM32F410xx) || defined(STM32F412xG) || defined(STM32F446xx)
48 /* Exported types ------------------------------------------------------------*/
50 /**
51 * @brief FMPI2C Init structure definition
54 typedef struct
56 uint32_t FMPI2C_Timing; /*!< Specifies the FMPI2C_TIMINGR_register value.
57 This parameter calculated by referring to FMPI2C initialization
58 section in Reference manual*/
60 uint32_t FMPI2C_AnalogFilter; /*!< Enables or disables analog noise filter.
61 This parameter can be a value of @ref FMPI2C_Analog_Filter */
63 uint32_t FMPI2C_DigitalFilter; /*!< Configures the digital noise filter.
64 This parameter can be a number between 0x00 and 0x0F */
66 uint32_t FMPI2C_Mode; /*!< Specifies the FMPI2C mode.
67 This parameter can be a value of @ref FMPI2C_mode */
69 uint32_t FMPI2C_OwnAddress1; /*!< Specifies the device own address 1.
70 This parameter can be a 7-bit or 10-bit address */
72 uint32_t FMPI2C_Ack; /*!< Enables or disables the acknowledgement.
73 This parameter can be a value of @ref FMPI2C_acknowledgement */
75 uint32_t FMPI2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
76 This parameter can be a value of @ref FMPI2C_acknowledged_address */
77 }FMPI2C_InitTypeDef;
79 /* Exported constants --------------------------------------------------------*/
82 /** @defgroup FMPI2C_Exported_Constants
83 * @{
86 #define IS_FMPI2C_ALL_PERIPH(PERIPH) ((PERIPH) == FMPI2C1)
88 /** @defgroup FMPI2C_Analog_Filter
89 * @{
92 #define FMPI2C_AnalogFilter_Enable ((uint32_t)0x00000000)
93 #define FMPI2C_AnalogFilter_Disable FMPI2C_CR1_ANFOFF
95 #define IS_FMPI2C_ANALOG_FILTER(FILTER) (((FILTER) == FMPI2C_AnalogFilter_Enable) || \
96 ((FILTER) == FMPI2C_AnalogFilter_Disable))
97 /**
98 * @}
101 /** @defgroup FMPI2C_Digital_Filter
102 * @{
105 #define IS_FMPI2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
107 * @}
110 /** @defgroup FMPI2C_mode
111 * @{
114 #define FMPI2C_Mode_FMPI2C ((uint32_t)0x00000000)
115 #define FMPI2C_Mode_SMBusDevice FMPI2C_CR1_SMBDEN
116 #define FMPI2C_Mode_SMBusHost FMPI2C_CR1_SMBHEN
118 #define IS_FMPI2C_MODE(MODE) (((MODE) == FMPI2C_Mode_FMPI2C) || \
119 ((MODE) == FMPI2C_Mode_SMBusDevice) || \
120 ((MODE) == FMPI2C_Mode_SMBusHost))
122 * @}
125 /** @defgroup FMPI2C_acknowledgement
126 * @{
129 #define FMPI2C_Ack_Enable ((uint32_t)0x00000000)
130 #define FMPI2C_Ack_Disable FMPI2C_CR2_NACK
132 #define IS_FMPI2C_ACK(ACK) (((ACK) == FMPI2C_Ack_Enable) || \
133 ((ACK) == FMPI2C_Ack_Disable))
135 * @}
138 /** @defgroup FMPI2C_acknowledged_address
139 * @{
142 #define FMPI2C_AcknowledgedAddress_7bit ((uint32_t)0x00000000)
143 #define FMPI2C_AcknowledgedAddress_10bit FMPI2C_OAR1_OA1MODE
145 #define IS_FMPI2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_AcknowledgedAddress_7bit) || \
146 ((ADDRESS) == FMPI2C_AcknowledgedAddress_10bit))
148 * @}
151 /** @defgroup FMPI2C_own_address1
152 * @{
155 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
157 * @}
160 /** @defgroup FMPI2C_transfer_direction
161 * @{
164 #define FMPI2C_Direction_Transmitter ((uint16_t)0x0000)
165 #define FMPI2C_Direction_Receiver ((uint16_t)0x0400)
167 #define IS_FMPI2C_DIRECTION(DIRECTION) (((DIRECTION) == FMPI2C_Direction_Transmitter) || \
168 ((DIRECTION) == FMPI2C_Direction_Receiver))
170 * @}
173 /** @defgroup FMPI2C_DMA_transfer_requests
174 * @{
177 #define FMPI2C_DMAReq_Tx FMPI2C_CR1_TXDMAEN
178 #define FMPI2C_DMAReq_Rx FMPI2C_CR1_RXDMAEN
180 #define IS_FMPI2C_DMA_REQ(REQ) ((((REQ) & (uint32_t)0xFFFF3FFF) == 0x00) && ((REQ) != 0x00))
182 * @}
185 /** @defgroup FMPI2C_slave_address
186 * @{
189 #define IS_FMPI2C_SLAVE_ADDRESS(ADDRESS) ((ADDRESS) <= (uint16_t)0x03FF)
191 * @}
195 /** @defgroup FMPI2C_own_address2
196 * @{
199 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
202 * @}
205 /** @defgroup FMPI2C_own_address2_mask
206 * @{
209 #define FMPI2C_OA2_NoMask ((uint8_t)0x00)
210 #define FMPI2C_OA2_Mask01 ((uint8_t)0x01)
211 #define FMPI2C_OA2_Mask02 ((uint8_t)0x02)
212 #define FMPI2C_OA2_Mask03 ((uint8_t)0x03)
213 #define FMPI2C_OA2_Mask04 ((uint8_t)0x04)
214 #define FMPI2C_OA2_Mask05 ((uint8_t)0x05)
215 #define FMPI2C_OA2_Mask06 ((uint8_t)0x06)
216 #define FMPI2C_OA2_Mask07 ((uint8_t)0x07)
218 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NoMask) || \
219 ((MASK) == FMPI2C_OA2_Mask01) || \
220 ((MASK) == FMPI2C_OA2_Mask02) || \
221 ((MASK) == FMPI2C_OA2_Mask03) || \
222 ((MASK) == FMPI2C_OA2_Mask04) || \
223 ((MASK) == FMPI2C_OA2_Mask05) || \
224 ((MASK) == FMPI2C_OA2_Mask06) || \
225 ((MASK) == FMPI2C_OA2_Mask07))
228 * @}
231 /** @defgroup FMPI2C_timeout
232 * @{
235 #define IS_FMPI2C_TIMEOUT(TIMEOUT) ((TIMEOUT) <= (uint16_t)0x0FFF)
238 * @}
241 /** @defgroup FMPI2C_registers
242 * @{
245 #define FMPI2C_Register_CR1 ((uint8_t)0x00)
246 #define FMPI2C_Register_CR2 ((uint8_t)0x04)
247 #define FMPI2C_Register_OAR1 ((uint8_t)0x08)
248 #define FMPI2C_Register_OAR2 ((uint8_t)0x0C)
249 #define FMPI2C_Register_TIMINGR ((uint8_t)0x10)
250 #define FMPI2C_Register_TIMEOUTR ((uint8_t)0x14)
251 #define FMPI2C_Register_ISR ((uint8_t)0x18)
252 #define FMPI2C_Register_ICR ((uint8_t)0x1C)
253 #define FMPI2C_Register_PECR ((uint8_t)0x20)
254 #define FMPI2C_Register_RXDR ((uint8_t)0x24)
255 #define FMPI2C_Register_TXDR ((uint8_t)0x28)
257 #define IS_FMPI2C_REGISTER(REGISTER) (((REGISTER) == FMPI2C_Register_CR1) || \
258 ((REGISTER) == FMPI2C_Register_CR2) || \
259 ((REGISTER) == FMPI2C_Register_OAR1) || \
260 ((REGISTER) == FMPI2C_Register_OAR2) || \
261 ((REGISTER) == FMPI2C_Register_TIMINGR) || \
262 ((REGISTER) == FMPI2C_Register_TIMEOUTR) || \
263 ((REGISTER) == FMPI2C_Register_ISR) || \
264 ((REGISTER) == FMPI2C_Register_ICR) || \
265 ((REGISTER) == FMPI2C_Register_PECR) || \
266 ((REGISTER) == FMPI2C_Register_RXDR) || \
267 ((REGISTER) == FMPI2C_Register_TXDR))
269 * @}
272 /** @defgroup FMPI2C_interrupts_definition
273 * @{
276 #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE
277 #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE
278 #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE
279 #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE
280 #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE
281 #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE
282 #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE
284 #define IS_FMPI2C_CONFIG_IT(IT) ((((IT) & (uint32_t)0xFFFFFF01) == 0x00) && ((IT) != 0x00))
287 * @}
290 /** @defgroup FMPI2C_flags_definition
291 * @{
294 #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE
295 #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS
296 #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE
297 #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR
298 #define FMPI2C_FLAG_NACKF FMPI2C_ISR_NACKF
299 #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF
300 #define FMPI2C_FLAG_TC FMPI2C_ISR_TC
301 #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR
302 #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR
303 #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO
304 #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR
305 #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR
306 #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
307 #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT
308 #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY
310 #define IS_FMPI2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFF4000) == 0x00) && ((FLAG) != 0x00))
312 #define IS_FMPI2C_GET_FLAG(FLAG) (((FLAG) == FMPI2C_FLAG_TXE) || ((FLAG) == FMPI2C_FLAG_TXIS) || \
313 ((FLAG) == FMPI2C_FLAG_RXNE) || ((FLAG) == FMPI2C_FLAG_ADDR) || \
314 ((FLAG) == FMPI2C_FLAG_NACKF) || ((FLAG) == FMPI2C_FLAG_STOPF) || \
315 ((FLAG) == FMPI2C_FLAG_TC) || ((FLAG) == FMPI2C_FLAG_TCR) || \
316 ((FLAG) == FMPI2C_FLAG_BERR) || ((FLAG) == FMPI2C_FLAG_ARLO) || \
317 ((FLAG) == FMPI2C_FLAG_OVR) || ((FLAG) == FMPI2C_FLAG_PECERR) || \
318 ((FLAG) == FMPI2C_FLAG_TIMEOUT) || ((FLAG) == FMPI2C_FLAG_ALERT) || \
319 ((FLAG) == FMPI2C_FLAG_BUSY))
322 * @}
326 /** @defgroup FMPI2C_interrupts_definition
327 * @{
330 #define FMPI2C_IT_TXIS FMPI2C_ISR_TXIS
331 #define FMPI2C_IT_RXNE FMPI2C_ISR_RXNE
332 #define FMPI2C_IT_ADDR FMPI2C_ISR_ADDR
333 #define FMPI2C_IT_NACKF FMPI2C_ISR_NACKF
334 #define FMPI2C_IT_STOPF FMPI2C_ISR_STOPF
335 #define FMPI2C_IT_TC FMPI2C_ISR_TC
336 #define FMPI2C_IT_TCR FMPI2C_ISR_TCR
337 #define FMPI2C_IT_BERR FMPI2C_ISR_BERR
338 #define FMPI2C_IT_ARLO FMPI2C_ISR_ARLO
339 #define FMPI2C_IT_OVR FMPI2C_ISR_OVR
340 #define FMPI2C_IT_PECERR FMPI2C_ISR_PECERR
341 #define FMPI2C_IT_TIMEOUT FMPI2C_ISR_TIMEOUT
342 #define FMPI2C_IT_ALERT FMPI2C_ISR_ALERT
344 #define IS_FMPI2C_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFC001) == 0x00) && ((IT) != 0x00))
346 #define IS_FMPI2C_GET_IT(IT) (((IT) == FMPI2C_IT_TXIS) || ((IT) == FMPI2C_IT_RXNE) || \
347 ((IT) == FMPI2C_IT_ADDR) || ((IT) == FMPI2C_IT_NACKF) || \
348 ((IT) == FMPI2C_IT_STOPF) || ((IT) == FMPI2C_IT_TC) || \
349 ((IT) == FMPI2C_IT_TCR) || ((IT) == FMPI2C_IT_BERR) || \
350 ((IT) == FMPI2C_IT_ARLO) || ((IT) == FMPI2C_IT_OVR) || \
351 ((IT) == FMPI2C_IT_PECERR) || ((IT) == FMPI2C_IT_TIMEOUT) || \
352 ((IT) == FMPI2C_IT_ALERT))
355 * @}
358 /** @defgroup FMPI2C_ReloadEndMode_definition
359 * @{
362 #define FMPI2C_Reload_Mode FMPI2C_CR2_RELOAD
363 #define FMPI2C_AutoEnd_Mode FMPI2C_CR2_AUTOEND
364 #define FMPI2C_SoftEnd_Mode ((uint32_t)0x00000000)
367 #define IS_RELOAD_END_MODE(MODE) (((MODE) == FMPI2C_Reload_Mode) || \
368 ((MODE) == FMPI2C_AutoEnd_Mode) || \
369 ((MODE) == FMPI2C_SoftEnd_Mode))
373 * @}
376 /** @defgroup FMPI2C_StartStopMode_definition
377 * @{
380 #define FMPI2C_No_StartStop ((uint32_t)0x00000000)
381 #define FMPI2C_Generate_Stop FMPI2C_CR2_STOP
382 #define FMPI2C_Generate_Start_Read (uint32_t)(FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
383 #define FMPI2C_Generate_Start_Write FMPI2C_CR2_START
386 #define IS_START_STOP_MODE(MODE) (((MODE) == FMPI2C_Generate_Stop) || \
387 ((MODE) == FMPI2C_Generate_Start_Read) || \
388 ((MODE) == FMPI2C_Generate_Start_Write) || \
389 ((MODE) == FMPI2C_No_StartStop))
393 * @}
397 * @}
400 /* Exported macro ------------------------------------------------------------*/
401 /* Exported functions ------------------------------------------------------- */
404 /* Initialization and Configuration functions *********************************/
405 void FMPI2C_DeInit(FMPI2C_TypeDef* FMPI2Cx);
406 void FMPI2C_Init(FMPI2C_TypeDef* FMPI2Cx, FMPI2C_InitTypeDef* FMPI2C_InitStruct);
407 void FMPI2C_StructInit(FMPI2C_InitTypeDef* FMPI2C_InitStruct);
408 void FMPI2C_Cmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
409 void FMPI2C_SoftwareResetCmd(FMPI2C_TypeDef* FMPI2Cx);
410 void FMPI2C_ITConfig(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT, FunctionalState NewState);
411 void FMPI2C_StretchClockCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
412 void FMPI2C_DualAddressCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
413 void FMPI2C_OwnAddress2Config(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address, uint8_t Mask);
414 void FMPI2C_GeneralCallCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
415 void FMPI2C_SlaveByteControlCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
416 void FMPI2C_SlaveAddressConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address);
417 void FMPI2C_10BitAddressingModeCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
419 /* Communications handling functions ******************************************/
420 void FMPI2C_AutoEndCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
421 void FMPI2C_ReloadCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
422 void FMPI2C_NumberOfBytesConfig(FMPI2C_TypeDef* FMPI2Cx, uint8_t Number_Bytes);
423 void FMPI2C_MasterRequestConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t FMPI2C_Direction);
424 void FMPI2C_GenerateSTART(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
425 void FMPI2C_GenerateSTOP(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
426 void FMPI2C_10BitAddressHeaderCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
427 void FMPI2C_AcknowledgeConfig(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
428 uint8_t FMPI2C_GetAddressMatched(FMPI2C_TypeDef* FMPI2Cx);
429 uint16_t FMPI2C_GetTransferDirection(FMPI2C_TypeDef* FMPI2Cx);
430 void FMPI2C_TransferHandling(FMPI2C_TypeDef* FMPI2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode);
432 /* SMBUS management functions ************************************************/
433 void FMPI2C_SMBusAlertCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
434 void FMPI2C_ClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
435 void FMPI2C_ExtendedClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
436 void FMPI2C_IdleClockTimeoutCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
437 void FMPI2C_TimeoutAConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Timeout);
438 void FMPI2C_TimeoutBConfig(FMPI2C_TypeDef* FMPI2Cx, uint16_t Timeout);
439 void FMPI2C_CalculatePEC(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
440 void FMPI2C_PECRequestCmd(FMPI2C_TypeDef* FMPI2Cx, FunctionalState NewState);
441 uint8_t FMPI2C_GetPEC(FMPI2C_TypeDef* FMPI2Cx);
443 /* FMPI2C registers management functions *****************************************/
444 uint32_t FMPI2C_ReadRegister(FMPI2C_TypeDef* FMPI2Cx, uint8_t FMPI2C_Register);
446 /* Data transfers management functions ****************************************/
447 void FMPI2C_SendData(FMPI2C_TypeDef* FMPI2Cx, uint8_t Data);
448 uint8_t FMPI2C_ReceiveData(FMPI2C_TypeDef* FMPI2Cx);
450 /* DMA transfers management functions *****************************************/
451 void FMPI2C_DMACmd(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_DMAReq, FunctionalState NewState);
453 /* Interrupts and flags management functions **********************************/
454 FlagStatus FMPI2C_GetFlagStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG);
455 void FMPI2C_ClearFlag(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_FLAG);
456 ITStatus FMPI2C_GetITStatus(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT);
457 void FMPI2C_ClearITPendingBit(FMPI2C_TypeDef* FMPI2Cx, uint32_t FMPI2C_IT);
459 #endif /* STM32F410xx || STM32F412xG || STM32F446xx */
461 * @}
465 * @}
468 #ifdef __cplusplus
470 #endif
472 #endif /*__STM32F4xx_FMPI2C_H */
474 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/