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[inav.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_pssi.h
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1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_pssi.h
4 * @author MCD Application Team
5 * @brief Header file of PSSI HAL module.
6 ******************************************************************************
7 * @attention
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
17 ******************************************************************************
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_PSSI_H
22 #define STM32H7xx_HAL_PSSI_H
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
31 /** @addtogroup STM32H7xx_HAL_Driver
32 * @{
34 #if defined(PSSI)
35 /** @addtogroup PSSI PSSI
36 * @brief PSSI HAL module driver
37 * @{
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup PSSI_Exported_Types PSSI Exported Types
42 * @{
46 /**
47 * @brief PSSI Init structure definition
49 typedef struct
51 uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
52 uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
53 uint32_t ControlSignal; /* !< Configures Data enable and Data ready */
54 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */
55 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */
56 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */
58 } PSSI_InitTypeDef;
61 /**
62 * @brief HAL PSSI State structures definition
64 typedef enum
66 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */
67 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */
68 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */
69 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */
70 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */
71 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */
72 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */
73 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */
75 } HAL_PSSI_StateTypeDef;
77 /**
78 * @brief PSSI handle Structure definition
80 typedef struct __PSSI_HandleTypeDef
82 PSSI_TypeDef *Instance; /*!< PSSI register base address. */
83 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure. */
84 uint32_t *pBuffPtr; /*!< PSSI Data buffer. */
85 uint32_t XferCount; /*!< PSSI transfer count */
86 uint32_t XferSize; /*!< PSSI transfer size */
87 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */
88 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */
90 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */
91 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */
92 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */
93 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback. */
95 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback. */
96 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback. */
98 HAL_LockTypeDef Lock; /*!< PSSI lock. */
99 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state. */
100 __IO uint32_t ErrorCode; /*!< PSSI error code. */
102 } PSSI_HandleTypeDef;
106 * @brief HAL PSSI Callback pointer definition
108 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */
111 * @}
114 * @brief HAL PSSI Callback ID enumeration definition
116 typedef enum
118 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */
119 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */
120 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */
121 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */
123 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */
124 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */
126 } HAL_PSSI_CallbackIDTypeDef;
128 /* Exported constants --------------------------------------------------------*/
129 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants
130 * @{
133 /** @defgroup PSSI_Error_Code PSSI Error Code
134 * @{
136 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */
137 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */
138 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */
139 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */
140 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */
141 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */
142 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */
146 * @}
149 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width
150 * @{
153 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */
154 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */
155 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */
157 * @}
160 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width
161 * @{
164 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */
165 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */
167 * @}
169 /** @defgroup PSSI_MODE PSSI mode
170 * @{
172 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */
173 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */
175 * @}
178 /** @defgroup PSSI_ControlSignal Configuration
179 * @{
181 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */
182 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */
183 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */
184 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */
185 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */
186 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */
187 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */
188 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */
191 * @}
195 /** @defgroup PSSI_Data_Enable_Polarity Data Enable Polarity
196 * @{
198 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */
199 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */
201 * @}
203 /** @defgroup PSSI_Reday_Polarity Reday Polarity
204 * @{
206 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */
207 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */
209 * @}
212 /** @defgroup PSSI_Clock_Polarity Clock Polarity
213 * @{
215 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Fallling Edge */
216 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */
220 * @}
224 /** @defgroup PSSI_DEFINITION PSSI definitions
225 * @{
228 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */
229 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */
231 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */
232 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */
234 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */
235 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disble */
237 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */
238 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */
240 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag*/
241 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/
243 * @}
246 /** @defgroup PSSI_Interrupts PSSI Interrupts
247 * @{
250 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */
251 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */
252 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */
254 * @}
257 * @}
259 /* Exported macros ------------------------------------------------------------*/
260 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros
261 * @{
264 /** @brief Reset PSSI handle state
265 * @param __HANDLE__ specifies the PSSI handle.
266 * @retval None
269 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \
270 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\
271 (__HANDLE__)->MspInitCallback = NULL; \
272 (__HANDLE__)->MspDeInitCallback = NULL; \
273 }while(0)
277 * @brief Enable the PSSI.
278 * @param __HANDLE__ PSSI handle
279 * @retval None.
281 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE)
283 * @brief Disable the PSSI.
284 * @param __HANDLE__ PSSI handle
285 * @retval None.
287 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE))
289 /* PSSI pripheral STATUS */
291 * @brief Get the PSSI pending flags.
292 * @param __HANDLE__ PSSI handle
293 * @param __FLAG__ flag to check.
294 * This parameter can be any combination of the following values:
295 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte
296 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes
297 * @retval The state of FLAG.
300 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__))
304 /* Interrupt & Flag management */
306 * @brief Get the PSSI pending flags.
307 * @param __HANDLE__ PSSI handle
308 * @param __FLAG__ flag to check.
309 * This parameter can be any combination of the following values:
310 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag
311 * @retval The state of FLAG.
313 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__))
316 * @brief Clear the PSSI pending flags.
317 * @param __HANDLE__ PSSI handle
318 * @param __FLAG__ specifies the flag to clear.
319 * This parameter can be any combination of the following values:
320 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag
321 * @retval None
323 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
326 * @brief Enable the specified PSSI interrupts.
327 * @param __HANDLE__ PSSI handle
328 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled.
329 * This parameter can be any combination of the following values:
330 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask
331 * @retval None
333 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
336 * @brief Disable the specified PSSI interrupts.
337 * @param __HANDLE__ PSSI handle
338 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled.
339 * This parameter can be any combination of the following values:
340 * @arg PSSI_IT_OVR_IE: Configuration error mask
341 * @retval None
343 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
346 * @brief Check whether the specified PSSI interrupt source is enabled or not.
347 * @param __HANDLE__ PSSI handle
348 * @param __INTERRUPT__ specifies the PSSI interrupt source to check.
349 * This parameter can be one of the following values:
350 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask
351 * @retval The state of INTERRUPT source.
353 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
356 * @brief Check whether the PSSI Control signal is valid.
357 * @param __CONTROL__ Control signals configuration
358 * @retval Valid or not.
361 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \
362 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \
363 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \
364 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \
365 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \
366 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \
367 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \
368 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE ))
370 * @brief Check whether the PSSI Bus Width is valid.
371 * @param __BUSWIDTH__ PSSI Bush width
372 * @retval Valid or not.
375 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \
376 ((__BUSWIDTH__) == HAL_PSSI_16LINES ))
379 * @brief Check whether the PSSI Clock Polarity is valid.
380 * @param __CLOCKPOL__ PSSI Clock Polarity
381 * @retval Valid or not.
384 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \
385 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE ))
387 * @brief Check whether the PSSI Data Enable Polarity is valid.
388 * @param __DEPOL__ PSSI DE Polarity
389 * @retval Valid or not.
392 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \
393 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH ))
395 * @brief Check whether the PSSI Ready Polarity is valid.
396 * @param __RDYPOL__ PSSI RDY Polarity
397 * @retval Valid or not.
400 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \
401 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH ))
403 * @}
406 /* Exported functions --------------------------------------------------------*/
407 /** @addtogroup PSSI_Exported_Functions
408 * @{
411 /** @addtogroup PSSI_Exported_Functions_Group1
412 * @{
414 /* Initialization and de-initialization functions *******************************/
415 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi);
416 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi);
417 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi);
418 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi);
419 /* Callbacks Register/UnRegister functions ***********************************/
421 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, pPSSI_CallbackTypeDef pCallback);
422 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID);
424 * @}
427 /** @addtogroup PSSI_Exported_Functions_Group2
428 * @{
430 /* IO operation functions *******************************************************/
431 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
432 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
433 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
434 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
435 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi);
436 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi);
438 * @}
441 /** @addtogroup PSSI_Exported_Functions_Group3
442 * @{
444 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi);
445 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi);
446 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi);
447 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi);
449 * @}
452 /** @addtogroup PSSI_Exported_Functions_Group4
453 * @{
455 /* Peripheral State functions ***************************************************/
456 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi);
457 uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi);
459 * @}
463 * @}
466 /* Private constants ---------------------------------------------------------*/
469 /* Private macros ------------------------------------------------------------*/
473 * @}
475 #endif /* PSSI */
478 * @}
482 #ifdef __cplusplus
484 #endif
486 #endif /* STM32H7xx_HAL_PSSI_H */
489 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/