Set blackbox file handler to NULL after closing file
[inav.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Inc / stm32h7xx_hal_sai.h
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1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_sai.h
4 * @author MCD Application Team
5 * @brief Header file of SAI HAL module.
6 ******************************************************************************
7 * @attention
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
17 ******************************************************************************
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32H7xx_HAL_SAI_H
22 #define STM32H7xx_HAL_SAI_H
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32h7xx_hal_def.h"
31 /** @addtogroup STM32H7xx_HAL_Driver
32 * @{
35 /** @addtogroup SAI
36 * @{
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup SAI_Exported_Types SAI Exported Types
41 * @{
44 /**
45 * @brief HAL State structures definition
47 typedef enum
49 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */
50 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */
51 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */
52 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */
53 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */
54 } HAL_SAI_StateTypeDef;
56 /**
57 * @brief SAI Callback prototype
59 typedef void (*SAIcallback)(void);
61 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition
62 * @brief SAI PDM Init structure definition
63 * @{
65 typedef struct
67 FunctionalState Activation; /*!< Enable/disable PDM interface */
68 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used.
69 This parameter must be a number between Min_Data = 1 and Max_Data = 3. */
70 uint32_t ClockEnable; /*!< Specifies which clock must be enabled.
71 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */
72 } SAI_PdmInitTypeDef;
73 /**
74 * @}
77 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition
78 * @brief SAI Init Structure definition
79 * @{
81 typedef struct
83 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode.
84 This parameter can be a value of @ref SAI_Block_Mode */
86 uint32_t Synchro; /*!< Specifies SAI Block synchronization
87 This parameter can be a value of @ref SAI_Block_Synchronization */
89 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common
90 for BlockA and BlockB
91 This parameter can be a value of @ref SAI_Block_SyncExt
92 @note If both audio blocks of same SAI are used, this parameter has
93 to be set to the same value for each audio block */
95 uint32_t MckOutput; /*!< Specifies whether master clock output will be generated or not.
96 This parameter can be a value of @ref SAI_Block_MckOutput
97 @note This feature is only available on STM32H7xx Rev.B and above */
99 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven.
100 This parameter can be a value of @ref SAI_Block_Output_Drive
101 @note This value has to be set before enabling the audio block
102 but after the audio block configuration. */
104 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not.
105 This parameter can be a value of @ref SAI_Block_NoDivider
106 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length
107 should be aligned to a number equal to a power of 2, from 8 to 256.
108 If bit NODIV in the SAI_xCR1 register is set, the frame length can
109 take any of the values from 8 to 256.
110 @note The NODIV bit is the same as NOMCK bit in STM32H7xx rev.Y */
112 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold.
113 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */
115 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling.
116 This parameter can be a value of @ref SAI_Audio_Frequency */
118 uint32_t Mckdiv; /*!< Specifies the master clock divider, the parameter will be used if for
119 AudioFrequency the user choice
120 This parameter must be a number between Min_Data = 0 and Max_Data = 63. */
122 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling.
123 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */
125 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected.
126 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */
128 uint32_t CompandingMode; /*!< Specifies the companding mode type.
129 This parameter can be a value of @ref SAI_Block_Companding_Mode */
131 uint32_t TriState; /*!< Specifies the companding mode type.
132 This parameter can be a value of @ref SAI_TRIState_Management */
134 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */
136 /* This part of the structure is automatically filled if your are using the high level initialisation
137 function HAL_SAI_InitProtocol */
139 uint32_t Protocol; /*!< Specifies the SAI Block protocol.
140 This parameter can be a value of @ref SAI_Block_Protocol */
142 uint32_t DataSize; /*!< Specifies the SAI Block data size.
143 This parameter can be a value of @ref SAI_Block_Data_Size */
145 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
146 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */
148 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity.
149 This parameter can be a value of @ref SAI_Block_Clock_Strobing */
150 } SAI_InitTypeDef;
152 * @}
155 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition
156 * @brief SAI Frame Init structure definition
157 * @{
159 typedef struct
162 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame.
163 This parameter must be a number between Min_Data = 8 and Max_Data = 256.
164 @note If master clock MCLK_x pin is declared as an output, the frame length
165 should be aligned to a number equal to power of 2 in order to keep
166 in an audio frame, an integer number of MCLK pulses by bit Clock. */
168 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length.
169 This Parameter specifies the length in number of bit clock (SCK + 1)
170 of the active level of FS signal in audio frame.
171 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */
173 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition.
174 This parameter can be a value of @ref SAI_Block_FS_Definition */
176 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity.
177 This parameter can be a value of @ref SAI_Block_FS_Polarity */
179 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset.
180 This parameter can be a value of @ref SAI_Block_FS_Offset */
182 } SAI_FrameInitTypeDef;
184 * @}
187 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition
188 * @brief SAI Block Slot Init Structure definition
189 * @{
191 typedef struct
193 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot.
194 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */
196 uint32_t SlotSize; /*!< Specifies the Slot Size.
197 This parameter can be a value of @ref SAI_Block_Slot_Size */
199 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame.
200 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
202 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated.
203 This parameter can be a value of @ref SAI_Block_Slot_Active */
204 } SAI_SlotInitTypeDef;
206 * @}
209 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition
210 * @brief SAI handle Structure definition
211 * @{
213 typedef struct __SAI_HandleTypeDef
215 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */
217 SAI_InitTypeDef Init; /*!< SAI communication parameters */
219 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */
221 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */
223 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */
225 uint16_t XferSize; /*!< SAI transfer size */
227 uint16_t XferCount; /*!< SAI transfer counter */
229 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */
231 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */
233 SAIcallback mutecallback; /*!< SAI mute callback */
235 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */
237 HAL_LockTypeDef Lock; /*!< SAI locking object */
239 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */
241 __IO uint32_t ErrorCode; /*!< SAI Error code */
243 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
244 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */
245 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */
246 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */
247 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */
248 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */
249 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */
250 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */
251 #endif
252 } SAI_HandleTypeDef;
254 * @}
257 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
259 * @brief SAI callback ID enumeration definition
261 typedef enum
263 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */
264 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */
265 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */
266 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */
267 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */
268 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */
269 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */
270 } HAL_SAI_CallbackIDTypeDef;
273 * @brief SAI callback pointer definition
275 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai);
276 #endif
279 * @}
282 /* Exported constants --------------------------------------------------------*/
283 /** @defgroup SAI_Exported_Constants SAI Exported Constants
284 * @{
287 /** @defgroup SAI_Error_Code SAI Error Code
288 * @{
290 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */
291 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */
292 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */
293 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */
294 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */
295 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */
296 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */
297 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */
298 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */
299 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
300 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */
301 #endif
303 * @}
306 /** @defgroup SAI_Block_SyncExt SAI External synchronisation
307 * @{
309 #define SAI_SYNCEXT_DISABLE 0U
310 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U
311 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U
313 * @}
316 /** @defgroup SAI_Block_MckOutput SAI Block Master Clock Output
317 * @{
319 #define SAI_MCK_OUTPUT_DISABLE 0x00000000U
320 #define SAI_MCK_OUTPUT_ENABLE SAI_xCR1_MCKEN
322 * @}
325 /** @defgroup SAI_Protocol SAI Supported protocol
326 * @{
328 #define SAI_I2S_STANDARD 0U
329 #define SAI_I2S_MSBJUSTIFIED 1U
330 #define SAI_I2S_LSBJUSTIFIED 2U
331 #define SAI_PCM_LONG 3U
332 #define SAI_PCM_SHORT 4U
334 * @}
337 /** @defgroup SAI_Protocol_DataSize SAI protocol data size
338 * @{
340 #define SAI_PROTOCOL_DATASIZE_16BIT 0U
341 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U
342 #define SAI_PROTOCOL_DATASIZE_24BIT 2U
343 #define SAI_PROTOCOL_DATASIZE_32BIT 3U
345 * @}
348 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency
349 * @{
351 #define SAI_AUDIO_FREQUENCY_192K 192000U
352 #define SAI_AUDIO_FREQUENCY_96K 96000U
353 #define SAI_AUDIO_FREQUENCY_48K 48000U
354 #define SAI_AUDIO_FREQUENCY_44K 44100U
355 #define SAI_AUDIO_FREQUENCY_32K 32000U
356 #define SAI_AUDIO_FREQUENCY_22K 22050U
357 #define SAI_AUDIO_FREQUENCY_16K 16000U
358 #define SAI_AUDIO_FREQUENCY_11K 11025U
359 #define SAI_AUDIO_FREQUENCY_8K 8000U
360 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U
362 * @}
365 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling
366 * @{
368 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U
369 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR
371 * @}
374 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable
375 * @{
377 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1
378 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2
380 * @}
383 /** @defgroup SAI_Block_Mode SAI Block Mode
384 * @{
386 #define SAI_MODEMASTER_TX 0x00000000U
387 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0
388 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1
389 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0)
392 * @}
395 /** @defgroup SAI_Block_Protocol SAI Block Protocol
396 * @{
398 #define SAI_FREE_PROTOCOL 0x00000000U
399 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0
400 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1
402 * @}
405 /** @defgroup SAI_Block_Data_Size SAI Block Data Size
406 * @{
408 #define SAI_DATASIZE_8 SAI_xCR1_DS_1
409 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0)
410 #define SAI_DATASIZE_16 SAI_xCR1_DS_2
411 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0)
412 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1)
413 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0)
415 * @}
418 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission
419 * @{
421 #define SAI_FIRSTBIT_MSB 0x00000000U
422 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST
424 * @}
427 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing
428 * @{
430 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U
431 #define SAI_CLOCKSTROBING_RISINGEDGE 1U
433 * @}
436 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization
437 * @{
439 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */
440 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */
441 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */
442 #if defined(SAI2)
443 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */
444 #endif /* SAI2 */
445 #if defined(SAI3)
446 #define SAI_SYNCHRONOUS_EXT_SAI3 4U /*!< Synchronous with other SAI, SAI3 */
447 #endif /* SAI3 */
448 #if defined(SAI4)
449 #define SAI_SYNCHRONOUS_EXT_SAI4 5U /*!< Synchronous with other SAI, SAI4 */
450 #endif /* SAI4 */
452 * @}
455 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive
456 * @{
458 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U
459 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV
461 * @}
464 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider
465 * @{
467 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U
468 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV
470 * @}
473 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition
474 * @{
476 #define SAI_FS_STARTFRAME 0x00000000U
477 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF
479 * @}
482 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity
483 * @{
485 #define SAI_FS_ACTIVE_LOW 0x00000000U
486 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL
488 * @}
491 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset
492 * @{
494 #define SAI_FS_FIRSTBIT 0x00000000U
495 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF
497 * @}
500 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size
501 * @{
503 #define SAI_SLOTSIZE_DATASIZE 0x00000000U
504 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0
505 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1
507 * @}
510 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active
511 * @{
513 #define SAI_SLOT_NOTACTIVE 0x00000000U
514 #define SAI_SLOTACTIVE_0 0x00000001U
515 #define SAI_SLOTACTIVE_1 0x00000002U
516 #define SAI_SLOTACTIVE_2 0x00000004U
517 #define SAI_SLOTACTIVE_3 0x00000008U
518 #define SAI_SLOTACTIVE_4 0x00000010U
519 #define SAI_SLOTACTIVE_5 0x00000020U
520 #define SAI_SLOTACTIVE_6 0x00000040U
521 #define SAI_SLOTACTIVE_7 0x00000080U
522 #define SAI_SLOTACTIVE_8 0x00000100U
523 #define SAI_SLOTACTIVE_9 0x00000200U
524 #define SAI_SLOTACTIVE_10 0x00000400U
525 #define SAI_SLOTACTIVE_11 0x00000800U
526 #define SAI_SLOTACTIVE_12 0x00001000U
527 #define SAI_SLOTACTIVE_13 0x00002000U
528 #define SAI_SLOTACTIVE_14 0x00004000U
529 #define SAI_SLOTACTIVE_15 0x00008000U
530 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU
532 * @}
535 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode
536 * @{
538 #define SAI_STEREOMODE 0x00000000U
539 #define SAI_MONOMODE SAI_xCR1_MONO
541 * @}
544 /** @defgroup SAI_TRIState_Management SAI TRIState Management
545 * @{
547 #define SAI_OUTPUT_NOTRELEASED 0x00000000U
548 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS
550 * @}
553 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold
554 * @{
556 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U
557 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0
558 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1
559 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0)
560 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2
562 * @}
565 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode
566 * @{
568 #define SAI_NOCOMPANDING 0x00000000U
569 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1
570 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0)
571 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL)
572 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL)
574 * @}
577 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value
578 * @{
580 #define SAI_ZERO_VALUE 0x00000000U
581 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL
583 * @}
586 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition
587 * @{
589 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE
590 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE
591 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE
592 #define SAI_IT_FREQ SAI_xIMR_FREQIE
593 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE
594 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE
595 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE
597 * @}
600 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition
601 * @{
603 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR
604 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET
605 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG
606 #define SAI_FLAG_FREQ SAI_xSR_FREQ
607 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY
608 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET
609 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET
611 * @}
614 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level
615 * @{
617 #define SAI_FIFOSTATUS_EMPTY 0x00000000U
618 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U
619 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U
620 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U
621 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U
622 #define SAI_FIFOSTATUS_FULL 0x00050000U
624 * @}
628 * @}
631 /* Exported macro ------------------------------------------------------------*/
632 /** @defgroup SAI_Exported_Macros SAI Exported Macros
633 * @brief macros to handle interrupts and specific configurations
634 * @{
637 /** @brief Reset SAI handle state.
638 * @param __HANDLE__ specifies the SAI Handle.
639 * @retval None
641 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
642 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \
643 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \
644 (__HANDLE__)->MspInitCallback = NULL; \
645 (__HANDLE__)->MspDeInitCallback = NULL; \
646 } while(0U)
647 #else
648 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET)
649 #endif
651 /** @brief Enable the specified SAI interrupts.
652 * @param __HANDLE__ specifies the SAI Handle.
653 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
654 * This parameter can be one of the following values:
655 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
656 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable
657 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
658 * @arg SAI_IT_FREQ: FIFO request interrupt enable
659 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable
660 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
661 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable
662 * @retval None
664 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
666 /** @brief Disable the specified SAI interrupts.
667 * @param __HANDLE__ specifies the SAI Handle.
668 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
669 * This parameter can be one of the following values:
670 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
671 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable
672 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
673 * @arg SAI_IT_FREQ: FIFO request interrupt enable
674 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable
675 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
676 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable
677 * @retval None
679 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__)))
681 /** @brief Check whether the specified SAI interrupt source is enabled or not.
682 * @param __HANDLE__ specifies the SAI Handle.
683 * @param __INTERRUPT__ specifies the SAI interrupt source to check.
684 * This parameter can be one of the following values:
685 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
686 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable
687 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
688 * @arg SAI_IT_FREQ: FIFO request interrupt enable
689 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable
690 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
691 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable
692 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
694 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
696 /** @brief Check whether the specified SAI flag is set or not.
697 * @param __HANDLE__ specifies the SAI Handle.
698 * @param __FLAG__ specifies the flag to check.
699 * This parameter can be one of the following values:
700 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag.
701 * @arg SAI_FLAG_MUTEDET: Mute detection flag.
702 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag.
703 * @arg SAI_FLAG_FREQ: FIFO request flag.
704 * @arg SAI_FLAG_CNRDY: Codec not ready flag.
705 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag.
706 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag.
707 * @retval The new state of __FLAG__ (TRUE or FALSE).
709 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
711 /** @brief Clear the specified SAI pending flag.
712 * @param __HANDLE__ specifies the SAI Handle.
713 * @param __FLAG__ specifies the flag to check.
714 * This parameter can be any combination of the following values:
715 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun
716 * @arg SAI_FLAG_MUTEDET: Clear Mute detection
717 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration
718 * @arg SAI_FLAG_FREQ: Clear FIFO request
719 * @arg SAI_FLAG_CNRDY: Clear Codec not ready
720 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection
721 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection
723 * @retval None
725 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__))
727 /** @brief Enable SAI.
728 * @param __HANDLE__ specifies the SAI Handle.
729 * @retval None
731 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN)
733 /** @brief Disable SAI.
734 * @param __HANDLE__ specifies the SAI Handle.
735 * @retval None
737 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN)
740 * @}
743 /* Include SAI HAL Extension module */
744 #include "stm32h7xx_hal_sai_ex.h"
746 /* Exported functions --------------------------------------------------------*/
747 /** @addtogroup SAI_Exported_Functions
748 * @{
751 /* Initialization/de-initialization functions ********************************/
752 /** @addtogroup SAI_Exported_Functions_Group1
753 * @{
755 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot);
756 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai);
757 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai);
758 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai);
759 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai);
761 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
762 /* SAI callbacks register/unregister functions ********************************/
763 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai,
764 HAL_SAI_CallbackIDTypeDef CallbackID,
765 pSAI_CallbackTypeDef pCallback);
766 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai,
767 HAL_SAI_CallbackIDTypeDef CallbackID);
768 #endif
770 * @}
773 /* I/O operation functions ***************************************************/
774 /** @addtogroup SAI_Exported_Functions_Group2
775 * @{
777 /* Blocking mode: Polling */
778 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout);
779 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout);
781 /* Non-Blocking mode: Interrupt */
782 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
783 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
785 /* Non-Blocking mode: DMA */
786 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
787 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
788 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai);
789 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai);
790 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai);
792 /* Abort function */
793 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai);
795 /* Mute management */
796 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val);
797 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai);
798 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter);
799 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai);
801 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
802 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai);
803 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai);
804 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai);
805 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai);
806 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai);
807 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai);
809 * @}
812 /** @addtogroup SAI_Exported_Functions_Group3
813 * @{
815 /* Peripheral State functions ************************************************/
816 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai);
817 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai);
819 * @}
823 * @}
826 /* Private macros ------------------------------------------------------------*/
827 /** @addtogroup SAI_Private_Macros
828 * @{
830 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\
831 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\
832 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE))
834 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\
835 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\
836 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\
837 ((PROTOCOL) == SAI_PCM_LONG) ||\
838 ((PROTOCOL) == SAI_PCM_SHORT))
840 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\
841 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\
842 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\
843 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT))
845 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \
846 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \
847 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \
848 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \
849 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV))
851 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \
852 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE))
854 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U))
856 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \
857 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U))
859 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \
860 ((MODE) == SAI_MODEMASTER_RX) || \
861 ((MODE) == SAI_MODESLAVE_TX) || \
862 ((MODE) == SAI_MODESLAVE_RX))
864 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \
865 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \
866 ((PROTOCOL) == SAI_SPDIF_PROTOCOL))
868 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \
869 ((DATASIZE) == SAI_DATASIZE_10) || \
870 ((DATASIZE) == SAI_DATASIZE_16) || \
871 ((DATASIZE) == SAI_DATASIZE_20) || \
872 ((DATASIZE) == SAI_DATASIZE_24) || \
873 ((DATASIZE) == SAI_DATASIZE_32))
875 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \
876 ((BIT) == SAI_FIRSTBIT_LSB))
878 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \
879 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE))
880 #if defined(SAI2) && defined(SAI3) && defined(SAI4)
881 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \
882 ((SYNCHRO) == SAI_SYNCHRONOUS) || \
883 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \
884 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2) || \
885 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI3) || \
886 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI4))
887 #elif defined(SAI2)
888 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \
889 ((SYNCHRO) == SAI_SYNCHRONOUS) || \
890 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \
891 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2))
892 #else
893 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \
894 ((SYNCHRO) == SAI_SYNCHRONOUS) || \
895 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \
896 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI4))
897 #endif
899 #define IS_SAI_BLOCK_MCK_OUTPUT(VALUE) (((VALUE) == SAI_MCK_OUTPUT_ENABLE) || \
900 ((VALUE) == SAI_MCK_OUTPUT_DISABLE))
902 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \
903 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE))
905 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \
906 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE))
908 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U)
910 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \
911 ((VALUE) == SAI_LAST_SENT_VALUE))
913 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \
914 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \
915 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \
916 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \
917 ((MODE) == SAI_ALAW_2CPL_COMPANDING))
919 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \
920 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \
921 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \
922 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \
923 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL))
925 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\
926 ((STATE) == SAI_OUTPUT_RELEASED))
928 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\
929 ((MODE) == SAI_STEREOMODE))
931 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL)
933 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U))
935 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \
936 ((SIZE) == SAI_SLOTSIZE_16B) || \
937 ((SIZE) == SAI_SLOTSIZE_32B))
939 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U)
941 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \
942 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT))
944 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \
945 ((POLARITY) == SAI_FS_ACTIVE_HIGH))
947 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \
948 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION))
950 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 63U)
952 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U))
954 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U))
957 * @}
960 /* Private functions ---------------------------------------------------------*/
961 /** @defgroup SAI_Private_Functions SAI Private Functions
962 * @{
966 * @}
970 * @}
974 * @}
977 #ifdef __cplusplus
979 #endif
981 #endif /* STM32H7xx_HAL_SAI_H */
983 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/