4 * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
6 * This source code is free software; you can redistribute it
7 * and/or modify it in source code form under the terms of the GNU
8 * General Public License as published by the Free Software
9 * Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
22 #ident "$Id: fpga_priv.h,v 1.8 2003/07/02 00:48:03 steve Exp $"
28 /* This is the opened xnf file descriptor. It is the output that this
29 code generator writes to, whether the format is XNF or EDIF. */
32 extern int show_scope_gates(ivl_scope_t net
, void*x
);
35 extern device_t device
;
37 extern const char*part
;
38 extern const char*arch
;
41 * Attribute lookup, should this be provided in ivl_target.h?
43 int scope_has_attribute(ivl_scope_t s
, const char *name
);
46 * These are mangle functions.
48 extern void xnf_mangle_logic_name(ivl_net_logic_t net
, char*buf
, size_t nbuf
);
49 extern void xnf_mangle_lpm_name(ivl_lpm_t net
, char*buf
, size_t nbuf
);
51 extern const char*xnf_mangle_nexus_name(ivl_nexus_t net
);
55 * $Log: fpga_priv.h,v $
56 * Revision 1.8 2003/07/02 00:48:03 steve
57 * No longer export generic-edif functions.
59 * Revision 1.7 2003/06/24 03:55:00 steve
60 * Add ivl_synthesis_cell support for virtex2.
62 * Revision 1.6 2002/08/12 01:35:03 steve
63 * conditional ident string using autoconfig.
65 * Revision 1.5 2002/08/11 23:47:04 steve
66 * Add missing Log and Ident strings.
68 * Revision 1.4 2001/09/06 04:28:40 steve
69 * Separate the virtex and generic-edif code generators.
71 * Revision 1.3 2001/09/02 21:33:07 steve
72 * Rearrange the XNF code generator to be generic-xnf
73 * so that non-XNF code generation is also possible.
75 * Start into the virtex EDIF output driver.
77 * Revision 1.2 2001/08/30 04:31:04 steve
80 * Revision 1.1 2001/08/28 04:14:20 steve
81 * Add the fpga target.