2 * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
4 * $Id: vthread.txt,v 1.6 2005/09/19 21:45:37 steve Exp $
11 Thread objects in vvp are created by ``.thread'' statements in the
14 A thread object includes a program counter and private bit
15 registers. The program counter is used to step the processor through
16 the code space as it executes instructions. The bit registers each
17 hold Verilog-style 4-value bits and are for use by the arithmetic
18 operators as they operate.
20 The program counter normally increments by one instruction after the
21 instruction is fetched. If the instruction is a branching instruction,
22 then the execution of the instruction sets a new value for the pc.
24 Instructions that use the bit registers have as an operand a <bit>
25 value. There is usually space in the instruction for 2 <bit>
26 operands. Instructions that work on vectors pull the vector values
27 from the bit registers starting with the LSB and up.
29 The bit addresses 0, 1, 2 and 3 are special constant bits 0, 1, x and
30 z, and are used as read-only immediate values. If the instruction
31 takes a single bit operand, the the appropriate value is simply read
32 out. If the instruction expects a vector, then a vector of the
33 expected width is created by replicating the constant value.
35 Bits 4, 5, 6 and 7 are read/write bits but are reserved by many
36 instructions for special purposes. Comparison operators, for example,
37 use these as comparison flag bits.
39 The remaining 64K-8 possible <bit> values are read-write bit registers
40 that can be accessed singly or as vectors. This obviously implies that
41 a bit address is 16 bits.
43 Threads also contain 16 numeric registers. These registers can hold a
44 real value or a 64bit integer, and can be used in certain cases where
45 numeric values are needed. The thread instruction set includes
46 %ix/* instructions to manipulate these registers. The instructions
47 that use these registers document which register is used, and what the
48 numeric value is used for. Registers 0-3 are often given fixed
49 meanings to instructions that need an integer value.
52 * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
54 * This source code is free software; you can redistribute it
55 * and/or modify it in source code form under the terms of the GNU
56 * General Public License as published by the Free Software
57 * Foundation; either version 2 of the License, or (at your option)
60 * This program is distributed in the hope that it will be useful,
61 * but WITHOUT ANY WARRANTY; without even the implied warranty of
62 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
63 * GNU General Public License for more details.
65 * You should have received a copy of the GNU General Public License
66 * along with this program; if not, write to the Free Software
67 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA