Fix the debugger to finish correctly.
[iverilog.git] / util.h
blob2654484e040c12f45ff523f0d5f256fe63752b57
1 #ifndef __util_H
2 #define __util_H
3 /*
4 * Copyright (c) 2000-2004 Stephen Williams (steve@icarus.com)
6 * This source code is free software; you can redistribute it
7 * and/or modify it in source code form under the terms of the GNU
8 * General Public License as published by the Free Software
9 * Foundation; either version 2 of the License, or (at your option)
10 * any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
21 #ifdef HAVE_CVS_IDENT
22 #ident "$Id: util.h,v 1.9 2007/06/04 19:14:06 steve Exp $"
23 #endif
25 # include <map>
26 # include "StringHeap.h"
27 # include "verinum.h"
29 class PExpr;
30 class Design;
31 class NetScope;
34 * This file attempts to locate a module in a file. It operates by
35 * looking for a plausible Verilog file to hold the module, and
36 * invoking the parser to bring in that file's contents.
38 extern bool load_module(const char*type);
42 struct attrib_list_t {
43 perm_string key;
44 verinum val;
47 extern attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
48 unsigned&natt,
49 Design*des, NetScope*scope);
52 * $Log: util.h,v $
53 * Revision 1.9 2007/06/04 19:14:06 steve
54 * Build errors in picky GCC compilers.
56 * Revision 1.8 2005/11/27 17:01:57 steve
57 * Fix for stubborn compiler.
59 * Revision 1.7 2004/02/20 18:53:36 steve
60 * Addtrbute keys are perm_strings.
62 * Revision 1.6 2002/08/12 01:35:01 steve
63 * conditional ident string using autoconfig.
65 * Revision 1.5 2002/05/23 03:08:52 steve
66 * Add language support for Verilog-2001 attribute
67 * syntax. Hook this support into existing $attribute
68 * handling, and add number and void value types.
70 * Add to the ivl_target API new functions for access
71 * of complex attributes attached to gates.
73 * Revision 1.4 2001/12/03 04:47:15 steve
74 * Parser and pform use hierarchical names as hname_t
75 * objects instead of encoded strings.
77 * Revision 1.3 2001/10/20 23:02:40 steve
78 * Add automatic module libraries.
80 #endif