vvp/arith.h

   1 #ifndef __arith_H
   2 #define __arith_H
   3 /*
   4  * Copyright (c) 2001-2005 Stephen Williams (steve@icarus.com)
   5  *
   6  *    This source code is free software; you can redistribute it
   7  *    and/or modify it in source code form under the terms of the GNU
   8  *    General Public License as published by the Free Software
   9  *    Foundation; either version 2 of the License, or (at your option)
  10  *    any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  *
  17  *    You should have received a copy of the GNU General Public License
  18  *    along with this program; if not, write to the Free Software
  19  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  20  */
  21 #ifdef HAVE_CVS_IDENT
  22 #ident "$Id: arith.h,v 1.34 2006/07/30 02:51:36 steve Exp $"
  23 #endif
  24
  25 # include  "vvp_net.h"
  26
  27 /*
  28  * Base class for arithmetic functors.
  29  * The wid constructor is used to size the output. This includes
  30  * precalculating an X value. Most arithmetic nodes can handle
  31  * whatever width comes in, given the knowledge of the output width.
  32  *
  33  * The width is also used to make initial values for the op_a_ and
  34  * op_b_ operands. Most arithmetic operators expect the widths of the
  35  * inputs to match, and since only one input at a time changes, the
  36  * other will need to be initialized to X.
  37  */
  38 class vvp_arith_  : public vvp_net_fun_t {
  39
  40     public:
  41       explicit vvp_arith_(unsigned wid);
  42
  43     protected:
  44       void dispatch_operand_(vvp_net_ptr_t ptr, vvp_vector4_t bit);
  45
  46     protected:
  47       unsigned wid_;
  48
  49       vvp_vector4_t op_a_;
  50       vvp_vector4_t op_b_;
  51         // Precalculated X result for propagation.
  52       vvp_vector4_t x_val_;
  53 };
  54
  55 class vvp_arith_div : public vvp_arith_ {
  56
  57     public:
  58       explicit vvp_arith_div(unsigned wid, bool signed_flag);
  59       ~vvp_arith_div();
  60       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
  61     private:
  62       void wide4_(vvp_net_ptr_t ptr);
  63       bool signed_flag_;
  64 };
  65
  66 class vvp_arith_mod : public vvp_arith_ {
  67
  68     public:
  69       explicit vvp_arith_mod(unsigned wid, bool signed_flag);
  70       ~vvp_arith_mod();
  71       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
  72     private:
  73       void wide_(vvp_net_ptr_t ptr);
  74       bool signed_flag_;
  75 };
  76
  77 /* vvp_cmp_* objects...
  78  * the vvp_cmp_* objects all are special vvp_arith_ objects in that
  79  * their widths are only for their inputs. The output widths are all
  80  * exactly 1 bit.
  81  */
  82
  83 class vvp_cmp_eeq  : public vvp_arith_ {
  84
  85     public:
  86       explicit vvp_cmp_eeq(unsigned wid);
  87       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
  88
  89 };
  90
  91 class vvp_cmp_nee  : public vvp_arith_ {
  92
  93     public:
  94       explicit vvp_cmp_nee(unsigned wid);
  95       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
  96
  97 };
  98
  99 class vvp_cmp_eq  : public vvp_arith_ {
 100
 101     public:
 102       explicit vvp_cmp_eq(unsigned wid);
 103       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
 104
 105 };
 106
 107 class vvp_cmp_ne  : public vvp_arith_ {
 108
 109     public:
 110       explicit vvp_cmp_ne(unsigned wid);
 111       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
 112
 113 };
 114
 115
 116 /*
 117  * This base class implements both GT and GE comparisons. The derived
 118  * GT and GE call the recv_vec4_base_ method with a different
 119  * out_if_equal argument that reflects the different expectations.
 120  */
 121 class vvp_cmp_gtge_base_ : public vvp_arith_ {
 122
 123     public:
 124       explicit vvp_cmp_gtge_base_(unsigned wid, bool signed_flag);
 125
 126     protected:
 127       void recv_vec4_base_(vvp_net_ptr_t ptr, vvp_vector4_t bit,
 128                            vvp_bit4_t out_if_equal);
 129     private:
 130       bool signed_flag_;
 131 };
 132
 133 class vvp_cmp_ge  : public vvp_cmp_gtge_base_ {
 134
 135     public:
 136       explicit vvp_cmp_ge(unsigned wid, bool signed_flag);
 137
 138       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
 139
 140 };
 141
 142 class vvp_cmp_gt  : public vvp_cmp_gtge_base_ {
 143
 144     public:
 145       explicit vvp_cmp_gt(unsigned wid, bool signed_flag);
 146
 147       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
 148 };
 149
 150 /*
 151  * NOTE: The inputs to the vvp_arith_mult are not necessarily the same
 152  * width as the output. This is different from the typical vvp_arith_
 153  * object. Perhaps that means this isn't quite a vvp_arith_ object?
 154  */
 155 class vvp_arith_mult  : public vvp_arith_ {
 156
 157     public:
 158       explicit vvp_arith_mult(unsigned wid);
 159       ~vvp_arith_mult();
 160       void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
 161     private:
 162       void wide_(vvp_net_ptr_t ptr);
 163 };
 164
 165 class vvp_arith_sub  : public vvp_arith_ {
 166
 167     public:
 168       explicit vvp_arith_sub(unsigned wid);
 169       ~vvp_arith_sub();
 170       virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit);
 171
 172 };
 173
 174 class vvp_arith_sum  : public vvp_arith_ {
 175
 176     public:
 177       explicit vvp_arith_sum(unsigned wid);
 178       ~vvp_arith_sum();
 179       virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit);
 180
 181 };
 182
 183 class vvp_shiftl  : public vvp_arith_ {
 184
 185     public:
 186       explicit vvp_shiftl(unsigned wid);
 187       ~vvp_shiftl();
 188       virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit);
 189 };
 190
 191 class vvp_shiftr  : public vvp_arith_ {
 192
 193     public:
 194       explicit vvp_shiftr(unsigned wid, bool signed_flag);
 195       ~vvp_shiftr();
 196       virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit);
 197
 198     private:
 199       bool signed_flag_;
 200 };
 201
 202 /*
 203  * Base class for real valued expressions. These are similar to the
 204  * vector expression classes, but the inputs are collected from the
 205  * recv_real method.
 206  */
 207 class vvp_arith_real_  : public vvp_net_fun_t {
 208
 209     public:
 210       explicit vvp_arith_real_();
 211
 212     protected:
 213       void dispatch_operand_(vvp_net_ptr_t ptr, double bit);
 214
 215     protected:
 216       double op_a_;
 217       double op_b_;
 218 };
 219
 220
 221 class vvp_arith_div_real : public vvp_arith_real_ {
 222
 223     public:
 224       explicit vvp_arith_div_real();
 225       ~vvp_arith_div_real();
 226       void recv_real(vvp_net_ptr_t ptr, double bit);
 227 };
 228
 229 class vvp_arith_sub_real : public vvp_arith_real_ {
 230
 231     public:
 232       explicit vvp_arith_sub_real();
 233       ~vvp_arith_sub_real();
 234       void recv_real(vvp_net_ptr_t ptr, double bit);
 235 };
 236
 237 /*
 238  * $Log: arith.h,v $
 239  * Revision 1.34  2006/07/30 02:51:36  steve
 240  *  Fix/implement signed right shift.
 241  *
 242  * Revision 1.33  2006/01/03 06:19:31  steve
 243  *  Support wide divide nodes.
 244  *
 245  * Revision 1.32  2005/07/06 04:29:25  steve
 246  *  Implement real valued signals and arith nodes.
 247  *
 248  * Revision 1.31  2005/06/22 00:04:48  steve
 249  *  Reduce vvp_vector4 copies by using const references.
 250  *
 251  * Revision 1.30  2005/06/11 18:11:18  steve
 252  *  Remove unneeded references to functor.h
 253  *
 254  * Revision 1.29  2005/03/19 06:23:49  steve
 255  *  Handle LPM shifts.
 256  *
 257  * Revision 1.28  2005/03/12 06:42:28  steve
 258  *  Implement .arith/mod.
 259  *
 260  * Revision 1.27  2005/03/09 05:52:04  steve
 261  *  Handle case inequality in netlists.
 262  *
 263  * Revision 1.26  2005/02/19 01:32:52  steve
 264  *  Implement .arith/div.
 265  *
 266  * Revision 1.25  2005/02/04 05:13:02  steve
 267  *  Add wide .arith/mult, and vvp_vector2_t vectors.
 268  *
 269  * Revision 1.24  2005/01/28 05:34:25  steve
 270  *  Add vector4 implementation of .arith/mult.
 271  *
 272  * Revision 1.23  2005/01/22 16:21:11  steve
 273  *  Implement vectored CMP_EQ and NE
 274  *
 275  * Revision 1.22  2005/01/22 01:06:20  steve
 276  *  Implement the .cmp/eeq LPM node.
 277  *
 278  * Revision 1.21  2005/01/16 04:19:08  steve
 279  *  Reimplement comparators as vvp_vector4_t nodes.
 280  *
 281  * Revision 1.20  2004/12/11 02:31:29  steve
 282  *  Rework of internals to carry vectors through nexus instead
 283  *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
 284  *  down this path.
 285  *
 286  */
 287 #endif