2 | for Y = [16, 32, 64, DEF] do
3 | for X = [BSF, BSR] do
4 $(X86(Y)) $(X){_$(RSZ(Y))$(RSZ(Y))} $(RNAME("ECX",Y)), $(RNAME("EDX",Y)) {|RCX/w,RDX/r,FLAGS/w}
5 $(X86(Y)) $(X){_$(RSZ(Y))M} $(RNAME("ECX",Y)), [RAX] {|RCX/w,RAX/r,FLAGS/w}
7 | for X = [BT, BTS, BTR, BTC] do
8 | let RRW = $((X=="BT") and "r" or "rw")
9 $(X86(Y)) $(X){_$(RSZ(Y))$(RSZ(Y))} $(RNAME("ECX",Y)), $(RNAME("EDX",Y)) {|RCX/$(RRW),RDX/r,FLAGS/w}
10 $(X86(Y)) $(X){_M$(RSZ(Y))} [RAX], $(RNAME("ECX",Y)) {|RAX/r,RCX/r,FLAGS/w}
11 $(X86(Y)) $(X){_$(RSZ(Y))I} $(RNAME("ECX",Y)), 2 {|RCX/$(RRW),FLAGS/w}
12 $(X86(Y)) $(X){_M$(MSZ(Y))I} <$(NASMSZ(Y))> [RAX], 2 {|RAX/r,FLAGS/w}
14 $(X86(Y)) XCHG{_$(RNAMEDEF("EAX",Y))_$(RSZ(Y))} <$(RNAME("EAX",Y)),> $(RNAME("EBX",Y)) {|RAX/rw,RBX/rw}
17 | for Y = [8, 16, 32, 64, DEF] do
18 $(X86(Y)) CRC32{_W$(RSZ(Y))} $(RNAME("ECX",MAX(Y,32))), $(RNAME("EDX",Y)) {|RCX/rw,RDX/r}
19 $(X86(Y)) CRC32{_WM$(MSZ(Y))} $(RNAME("ECX",MAX(Y,32))), <$(NASMSZ(Y))> [RAX] {|RCX/rw,RAX/r}
20 $(X86(Y)) XADD{_$(RSZ(Y))$(RSZ(Y))} $(RNAME("ECX",Y)), $(RNAME("EDX",Y)) {|RCX/rw,RDX/rw}
21 $(X86(Y)) XADD{_M$(RSZ(Y))} [RAX], $(RNAME("EDX",Y)) {|RAX/r,RDX/rw}
22 $(X86(Y)) XCHG{_$(RSZ(Y))$(RSZ(Y))} $(RNAME("ECX",Y)), $(RNAME("EDX",Y)) {|RCX/rw,RDX/rw}
23 $(X86(Y)) XCHG{_M$(RSZ(Y))} [RAX], $(RNAME("EDX",Y)) {|RAX/r,RDX/rw}
24 $(X86(Y)) CMPXCHG{_$(RSZ(Y))$(RSZ(Y))_$(RNAMEDEF("EAX",Y))} $(RNAME("ECX",Y)), $(RNAME("EDX",Y)) {|RAX/r,RCX/r,RDX/r}
25 $(X86(Y)) CMPXCHG{_M$(RSZ(Y))_$(RNAMEDEF("EAX",Y))} [RCX], $(RNAME("EDX",Y)) {|RAX/r,RCX/r,RDX/r}
28 CMPXCHG8B{_M64_EDX_EAX_ECX_EBX} [RAX] {|RAX/r,RCX/r,RDX/r,RBX/r}
29 64: CMPXCHG16B{_M128_RDX_RAX_RCX_RBX} [RAX] {|RAX/r,RCX/r,RDX/r,RBX/r}
31 | for Y = [32, 64, DEF] do
32 | for X = [LZCNT, TZCNT, POPCNT] do
33 $(X86(Y)) $(X){_$(RSZ(Y))$(RSZ(Y))} $(RNAME("ECX",Y)), $(RNAME("EDX",Y)) {|RCX/w,RDX/r,FLAGS/w}
34 $(X86(Y)) $(X){_$(RSZ(Y))M} $(RNAME("ECX",Y)), [RAX] {|RCX/w,RAX/r,FLAGS/w}
36 $(X86(Y)) BSWAP{_$(RSZ(Y))} $(RNAME("ECX",Y)) {|RCX/rw}
37 $(X86(Y)) RDRAND{_$(RSZ(Y))} $(RNAME("ECX",Y)) {|RCX/w,FLAGS/w}
40 LDMXCSR{_M32} [RAX] {|RAX/r}
41 STMXCSR{_M32} [RAX] {|RAX/r}
43 CPUID {|RAX/rw, RBX/w, RCX/rw, RDX/w}
45 RDTSCP {|RAX/w, RDX/w}
50 LAHF {|FLAGS/r,RAX/rw}
61 CLFLUSH{_M8} [RAX] {|RAX/r}
62 XGETBV{_EDX_EAX_ECX} {|RAX/r, RCX/r, RDX/r}
64 64: RDFSBASE{_W} ECX {|RCX/w}
65 64: RDFSBASE{_D} RCX {|RCX/w}
66 64: RDGSBASE{_W} ECX {|RCX/w}
67 64: RDGSBASE{_D} RCX {|RCX/w}
68 64: WRFSBASE{_W} ECX {|RCX/r}
69 64: WRFSBASE{_D} RCX {|RCX/r}
70 64: WRGSBASE{_W} ECX {|RCX/r}
71 64: WRGSBASE{_D} RCX {|RCX/r}