src/jitcs_int_virtualregister.h

   1 //===-- jitcs_vreg.h - a representation of a virtual register ---*- C++ -*-===//
   2 //
   3 // A VirtualRegister contains all information necessary to handle a single
   4 // hardware or software register inside the library.
   5 //
   6 // TODO: The source looks rather ugly right now.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 #ifndef _JITCS_INT_VIRTUALREGISTER_H_
  11 #define _JITCS_INT_VIRTUALREGISTER_H_
  12
  13 #include "jitcs_adt_ref.h"
  14 #include "jitcs_adt_slice.h"
  15 #include "jitcs_base.h"
  16 #include "jitcs_ids.h"
  17 #include "jitcs_spillslotinfo.h"
  18
  19 namespace jitcs {
  20 class MachineDumper;
  21 class IMachineInfo;
  22
  23 struct VirtualRegister {
  24   enum StaticType { VR_Static };
  25   // static data: set at creation time
  26   RegId id;
  27   ResId res;
  28   RegClassId regclass;
  29   ResClassId resclass;
  30   u8 logSz;
  31   //the following two fields might be useful in emulation:
  32   //by passing in the address of the context structure, the address of each
  33   //emulated register is used directly as spill slot, avoiding many load/store instructions
  34   //and enabling reg->mem folding which is only supported for spill slots (because
  35   //general reg->mem folding requires alias analysis, which is not necessary for spill slots)
  36   //disabled for the moment:
  37   //SpillSlotInfo spillplacement;
  38   //Slice<VirtualRegister*> aliases;
  39   bool isHWReg() const { return id < R_HardwareLimit; }
  40
  41   void setupDynamic(IMachineInfo&, size_t vregno, RegClassId rc, u8 logSz = 0);
  42
  43   VirtualRegister() = default;
  44   VirtualRegister(const VirtualRegister&) = default;
  45   VirtualRegister& operator =(const VirtualRegister&) = default;
  46
  47   VirtualRegister(StaticType,
  48                   RegId hwr,  ResId r,
  49                   RegClassId rc, ResClassId rescl,
  50                   u8 logSz_)
  51     : id(hwr), res(r), regclass(rc), resclass(rescl), logSz(logSz_)
  52   {}
  53 };
  54 } // end of jitcs namespace
  55
  56 #endif
  57 // _JITCS_INT_VIRTUALREGISTER_H_