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Added !vmlinux.lds.h to .gitignore because it would otherwise be ignored.
[jz_linux_2.6.24.3.git] / drivers / net / ixgb / ixgb_main.c
blob4f63839051b05ca2d282e8e62dd0419713d0e124
1 /*******************************************************************************
2
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "ixgb.h"
30
31 char ixgb_driver_name[] = "ixgb";
32 static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
33
34 #ifndef CONFIG_IXGB_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "1.0.126-k2"DRIVERNAPI
40 const char ixgb_driver_version[] = DRV_VERSION;
41 static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51 static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63 };
64
65 MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67 /* Local Function Prototypes */
68
69 int ixgb_up(struct ixgb_adapter *adapter);
70 void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71 void ixgb_reset(struct ixgb_adapter *adapter);
72 int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73 int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74 void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75 void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76 void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78 static int ixgb_init_module(void);
79 static void ixgb_exit_module(void);
80 static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81 static void __devexit ixgb_remove(struct pci_dev *pdev);
82 static int ixgb_sw_init(struct ixgb_adapter *adapter);
83 static int ixgb_open(struct net_device *netdev);
84 static int ixgb_close(struct net_device *netdev);
85 static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86 static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87 static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88 static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89 static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90 static void ixgb_set_multi(struct net_device *netdev);
91 static void ixgb_watchdog(unsigned long data);
92 static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93 static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94 static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95 static int ixgb_set_mac(struct net_device *netdev, void *p);
96 static irqreturn_t ixgb_intr(int irq, void *data);
97 static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
98
99 #ifdef CONFIG_IXGB_NAPI
100 static int ixgb_clean(struct napi_struct *napi, int budget);
101 static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103 #else
104 static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105 #endif
106 static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
107 static void ixgb_tx_timeout(struct net_device *dev);
108 static void ixgb_tx_timeout_task(struct work_struct *work);
109 static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp);
111 static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
112 static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
113 static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114
115 #ifdef CONFIG_NET_POLL_CONTROLLER
116 /* for netdump / net console */
117 static void ixgb_netpoll(struct net_device *dev);
118 #endif
119
120 static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
121 enum pci_channel_state state);
122 static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
123 static void ixgb_io_resume (struct pci_dev *pdev);
124
125 static struct pci_error_handlers ixgb_err_handler = {
126 .error_detected = ixgb_io_error_detected,
127 .slot_reset = ixgb_io_slot_reset,
128 .resume = ixgb_io_resume,
129 };
130
131 static struct pci_driver ixgb_driver = {
132 .name = ixgb_driver_name,
133 .id_table = ixgb_pci_tbl,
134 .probe = ixgb_probe,
135 .remove = __devexit_p(ixgb_remove),
136 .err_handler = &ixgb_err_handler
137 };
138
139 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
140 MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
141 MODULE_LICENSE("GPL");
142 MODULE_VERSION(DRV_VERSION);
143
144 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
145 static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
148
149 /* some defines for controlling descriptor fetches in h/w */
150 #define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
151 #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
152 * this */
153 #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
154 * is pushed this many descriptors
155 * from head */
156
157 /**
158 * ixgb_init_module - Driver Registration Routine
159 *
160 * ixgb_init_module is the first routine called when the driver is
161 * loaded. All it does is register with the PCI subsystem.
162 **/
163
164 static int __init
165 ixgb_init_module(void)
166 {
167 printk(KERN_INFO "%s - version %s\n",
168 ixgb_driver_string, ixgb_driver_version);
169
170 printk(KERN_INFO "%s\n", ixgb_copyright);
171
172 return pci_register_driver(&ixgb_driver);
173 }
174
175 module_init(ixgb_init_module);
176
177 /**
178 * ixgb_exit_module - Driver Exit Cleanup Routine
179 *
180 * ixgb_exit_module is called just before the driver is removed
181 * from memory.
182 **/
183
184 static void __exit
185 ixgb_exit_module(void)
186 {
187 pci_unregister_driver(&ixgb_driver);
188 }
189
190 module_exit(ixgb_exit_module);
191
192 /**
193 * ixgb_irq_disable - Mask off interrupt generation on the NIC
194 * @adapter: board private structure
195 **/
196
197 static void
198 ixgb_irq_disable(struct ixgb_adapter *adapter)
199 {
200 atomic_inc(&adapter->irq_sem);
201 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
202 IXGB_WRITE_FLUSH(&adapter->hw);
203 synchronize_irq(adapter->pdev->irq);
204 }
205
206 /**
207 * ixgb_irq_enable - Enable default interrupt generation settings
208 * @adapter: board private structure
209 **/
210
211 static void
212 ixgb_irq_enable(struct ixgb_adapter *adapter)
213 {
214 if(atomic_dec_and_test(&adapter->irq_sem)) {
215 IXGB_WRITE_REG(&adapter->hw, IMS,
216 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
217 IXGB_INT_LSC);
218 IXGB_WRITE_FLUSH(&adapter->hw);
219 }
220 }
221
222 int
223 ixgb_up(struct ixgb_adapter *adapter)
224 {
225 struct net_device *netdev = adapter->netdev;
226 int err, irq_flags = IRQF_SHARED;
227 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
228 struct ixgb_hw *hw = &adapter->hw;
229
230 /* hardware has been reset, we need to reload some things */
231
232 ixgb_rar_set(hw, netdev->dev_addr, 0);
233 ixgb_set_multi(netdev);
234
235 ixgb_restore_vlan(adapter);
236
237 ixgb_configure_tx(adapter);
238 ixgb_setup_rctl(adapter);
239 ixgb_configure_rx(adapter);
240 ixgb_alloc_rx_buffers(adapter);
241
242 /* disable interrupts and get the hardware into a known state */
243 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
244
245 /* only enable MSI if bus is in PCI-X mode */
246 if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
247 err = pci_enable_msi(adapter->pdev);
248 if (!err) {
249 adapter->have_msi = 1;
250 irq_flags = 0;
251 }
252 /* proceed to try to request regular interrupt */
253 }
254
255 err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
256 netdev->name, netdev);
257 if (err) {
258 if (adapter->have_msi)
259 pci_disable_msi(adapter->pdev);
260 DPRINTK(PROBE, ERR,
261 "Unable to allocate interrupt Error: %d\n", err);
262 return err;
263 }
264
265 if((hw->max_frame_size != max_frame) ||
266 (hw->max_frame_size !=
267 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
268
269 hw->max_frame_size = max_frame;
270
271 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
272
273 if(hw->max_frame_size >
274 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
275 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
276
277 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
278 ctrl0 |= IXGB_CTRL0_JFE;
279 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
280 }
281 }
282 }
283
284 mod_timer(&adapter->watchdog_timer, jiffies);
285
286 #ifdef CONFIG_IXGB_NAPI
287 napi_enable(&adapter->napi);
288 #endif
289 ixgb_irq_enable(adapter);
290
291 return 0;
292 }
293
294 void
295 ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
296 {
297 struct net_device *netdev = adapter->netdev;
298
299 #ifdef CONFIG_IXGB_NAPI
300 napi_disable(&adapter->napi);
301 atomic_set(&adapter->irq_sem, 0);
302 #endif
303
304 ixgb_irq_disable(adapter);
305 free_irq(adapter->pdev->irq, netdev);
306
307 if (adapter->have_msi)
308 pci_disable_msi(adapter->pdev);
309
310 if(kill_watchdog)
311 del_timer_sync(&adapter->watchdog_timer);
312
313 adapter->link_speed = 0;
314 adapter->link_duplex = 0;
315 netif_carrier_off(netdev);
316 netif_stop_queue(netdev);
317
318 ixgb_reset(adapter);
319 ixgb_clean_tx_ring(adapter);
320 ixgb_clean_rx_ring(adapter);
321 }
322
323 void
324 ixgb_reset(struct ixgb_adapter *adapter)
325 {
326 struct ixgb_hw *hw = &adapter->hw;
327
328 ixgb_adapter_stop(hw);
329 if (!ixgb_init_hw(hw))
330 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
331
332 /* restore frame size information */
333 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
334 if (hw->max_frame_size >
335 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
336 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
337 if (!(ctrl0 & IXGB_CTRL0_JFE)) {
338 ctrl0 |= IXGB_CTRL0_JFE;
339 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
340 }
341 }
342 }
343
344 /**
345 * ixgb_probe - Device Initialization Routine
346 * @pdev: PCI device information struct
347 * @ent: entry in ixgb_pci_tbl
348 *
349 * Returns 0 on success, negative on failure
350 *
351 * ixgb_probe initializes an adapter identified by a pci_dev structure.
352 * The OS initialization, configuring of the adapter private structure,
353 * and a hardware reset occur.
354 **/
355
356 static int __devinit
357 ixgb_probe(struct pci_dev *pdev,
358 const struct pci_device_id *ent)
359 {
360 struct net_device *netdev = NULL;
361 struct ixgb_adapter *adapter;
362 static int cards_found = 0;
363 unsigned long mmio_start;
364 int mmio_len;
365 int pci_using_dac;
366 int i;
367 int err;
368
369 if((err = pci_enable_device(pdev)))
370 return err;
371
372 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
373 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
374 pci_using_dac = 1;
375 } else {
376 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
377 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
378 printk(KERN_ERR
379 "ixgb: No usable DMA configuration, aborting\n");
380 goto err_dma_mask;
381 }
382 pci_using_dac = 0;
383 }
384
385 if((err = pci_request_regions(pdev, ixgb_driver_name)))
386 goto err_request_regions;
387
388 pci_set_master(pdev);
389
390 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
391 if(!netdev) {
392 err = -ENOMEM;
393 goto err_alloc_etherdev;
394 }
395
396 SET_NETDEV_DEV(netdev, &pdev->dev);
397
398 pci_set_drvdata(pdev, netdev);
399 adapter = netdev_priv(netdev);
400 adapter->netdev = netdev;
401 adapter->pdev = pdev;
402 adapter->hw.back = adapter;
403 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
404
405 mmio_start = pci_resource_start(pdev, BAR_0);
406 mmio_len = pci_resource_len(pdev, BAR_0);
407
408 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
409 if(!adapter->hw.hw_addr) {
410 err = -EIO;
411 goto err_ioremap;
412 }
413
414 for(i = BAR_1; i <= BAR_5; i++) {
415 if(pci_resource_len(pdev, i) == 0)
416 continue;
417 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
418 adapter->hw.io_base = pci_resource_start(pdev, i);
419 break;
420 }
421 }
422
423 netdev->open = &ixgb_open;
424 netdev->stop = &ixgb_close;
425 netdev->hard_start_xmit = &ixgb_xmit_frame;
426 netdev->get_stats = &ixgb_get_stats;
427 netdev->set_multicast_list = &ixgb_set_multi;
428 netdev->set_mac_address = &ixgb_set_mac;
429 netdev->change_mtu = &ixgb_change_mtu;
430 ixgb_set_ethtool_ops(netdev);
431 netdev->tx_timeout = &ixgb_tx_timeout;
432 netdev->watchdog_timeo = 5 * HZ;
433 #ifdef CONFIG_IXGB_NAPI
434 netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
435 #endif
436 netdev->vlan_rx_register = ixgb_vlan_rx_register;
437 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
438 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
439 #ifdef CONFIG_NET_POLL_CONTROLLER
440 netdev->poll_controller = ixgb_netpoll;
441 #endif
442
443 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
444 netdev->mem_start = mmio_start;
445 netdev->mem_end = mmio_start + mmio_len;
446 netdev->base_addr = adapter->hw.io_base;
447
448 adapter->bd_number = cards_found;
449 adapter->link_speed = 0;
450 adapter->link_duplex = 0;
451
452 /* setup the private structure */
453
454 if((err = ixgb_sw_init(adapter)))
455 goto err_sw_init;
456
457 netdev->features = NETIF_F_SG |
458 NETIF_F_HW_CSUM |
459 NETIF_F_HW_VLAN_TX |
460 NETIF_F_HW_VLAN_RX |
461 NETIF_F_HW_VLAN_FILTER;
462 netdev->features |= NETIF_F_TSO;
463 #ifdef NETIF_F_LLTX
464 netdev->features |= NETIF_F_LLTX;
465 #endif
466
467 if(pci_using_dac)
468 netdev->features |= NETIF_F_HIGHDMA;
469
470 /* make sure the EEPROM is good */
471
472 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
473 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
474 err = -EIO;
475 goto err_eeprom;
476 }
477
478 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
479 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
480
481 if(!is_valid_ether_addr(netdev->perm_addr)) {
482 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
483 err = -EIO;
484 goto err_eeprom;
485 }
486
487 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
488
489 init_timer(&adapter->watchdog_timer);
490 adapter->watchdog_timer.function = &ixgb_watchdog;
491 adapter->watchdog_timer.data = (unsigned long)adapter;
492
493 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
494
495 strcpy(netdev->name, "eth%d");
496 if((err = register_netdev(netdev)))
497 goto err_register;
498
499 /* we're going to reset, so assume we have no link for now */
500
501 netif_carrier_off(netdev);
502 netif_stop_queue(netdev);
503
504 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
505 ixgb_check_options(adapter);
506 /* reset the hardware with the new settings */
507
508 ixgb_reset(adapter);
509
510 cards_found++;
511 return 0;
512
513 err_register:
514 err_sw_init:
515 err_eeprom:
516 iounmap(adapter->hw.hw_addr);
517 err_ioremap:
518 free_netdev(netdev);
519 err_alloc_etherdev:
520 pci_release_regions(pdev);
521 err_request_regions:
522 err_dma_mask:
523 pci_disable_device(pdev);
524 return err;
525 }
526
527 /**
528 * ixgb_remove - Device Removal Routine
529 * @pdev: PCI device information struct
530 *
531 * ixgb_remove is called by the PCI subsystem to alert the driver
532 * that it should release a PCI device. The could be caused by a
533 * Hot-Plug event, or because the driver is going to be removed from
534 * memory.
535 **/
536
537 static void __devexit
538 ixgb_remove(struct pci_dev *pdev)
539 {
540 struct net_device *netdev = pci_get_drvdata(pdev);
541 struct ixgb_adapter *adapter = netdev_priv(netdev);
542
543 unregister_netdev(netdev);
544
545 iounmap(adapter->hw.hw_addr);
546 pci_release_regions(pdev);
547
548 free_netdev(netdev);
549 }
550
551 /**
552 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
553 * @adapter: board private structure to initialize
554 *
555 * ixgb_sw_init initializes the Adapter private data structure.
556 * Fields are initialized based on PCI device information and
557 * OS network device settings (MTU size).
558 **/
559
560 static int __devinit
561 ixgb_sw_init(struct ixgb_adapter *adapter)
562 {
563 struct ixgb_hw *hw = &adapter->hw;
564 struct net_device *netdev = adapter->netdev;
565 struct pci_dev *pdev = adapter->pdev;
566
567 /* PCI config space info */
568
569 hw->vendor_id = pdev->vendor;
570 hw->device_id = pdev->device;
571 hw->subsystem_vendor_id = pdev->subsystem_vendor;
572 hw->subsystem_id = pdev->subsystem_device;
573
574 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
575 adapter->rx_buffer_len = hw->max_frame_size;
576
577 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
578 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
579 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
580 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
581 hw->mac_type = ixgb_82597;
582 else {
583 /* should never have loaded on this device */
584 DPRINTK(PROBE, ERR, "unsupported device id\n");
585 }
586
587 /* enable flow control to be programmed */
588 hw->fc.send_xon = 1;
589
590 atomic_set(&adapter->irq_sem, 1);
591 spin_lock_init(&adapter->tx_lock);
592
593 return 0;
594 }
595
596 /**
597 * ixgb_open - Called when a network interface is made active
598 * @netdev: network interface device structure
599 *
600 * Returns 0 on success, negative value on failure
601 *
602 * The open entry point is called when a network interface is made
603 * active by the system (IFF_UP). At this point all resources needed
604 * for transmit and receive operations are allocated, the interrupt
605 * handler is registered with the OS, the watchdog timer is started,
606 * and the stack is notified that the interface is ready.
607 **/
608
609 static int
610 ixgb_open(struct net_device *netdev)
611 {
612 struct ixgb_adapter *adapter = netdev_priv(netdev);
613 int err;
614
615 /* allocate transmit descriptors */
616
617 if((err = ixgb_setup_tx_resources(adapter)))
618 goto err_setup_tx;
619
620 /* allocate receive descriptors */
621
622 if((err = ixgb_setup_rx_resources(adapter)))
623 goto err_setup_rx;
624
625 if((err = ixgb_up(adapter)))
626 goto err_up;
627
628 return 0;
629
630 err_up:
631 ixgb_free_rx_resources(adapter);
632 err_setup_rx:
633 ixgb_free_tx_resources(adapter);
634 err_setup_tx:
635 ixgb_reset(adapter);
636
637 return err;
638 }
639
640 /**
641 * ixgb_close - Disables a network interface
642 * @netdev: network interface device structure
643 *
644 * Returns 0, this is not allowed to fail
645 *
646 * The close entry point is called when an interface is de-activated
647 * by the OS. The hardware is still under the drivers control, but
648 * needs to be disabled. A global MAC reset is issued to stop the
649 * hardware, and all transmit and receive resources are freed.
650 **/
651
652 static int
653 ixgb_close(struct net_device *netdev)
654 {
655 struct ixgb_adapter *adapter = netdev_priv(netdev);
656
657 ixgb_down(adapter, TRUE);
658
659 ixgb_free_tx_resources(adapter);
660 ixgb_free_rx_resources(adapter);
661
662 return 0;
663 }
664
665 /**
666 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
667 * @adapter: board private structure
668 *
669 * Return 0 on success, negative on failure
670 **/
671
672 int
673 ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
674 {
675 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
676 struct pci_dev *pdev = adapter->pdev;
677 int size;
678
679 size = sizeof(struct ixgb_buffer) * txdr->count;
680 txdr->buffer_info = vmalloc(size);
681 if(!txdr->buffer_info) {
682 DPRINTK(PROBE, ERR,
683 "Unable to allocate transmit descriptor ring memory\n");
684 return -ENOMEM;
685 }
686 memset(txdr->buffer_info, 0, size);
687
688 /* round up to nearest 4K */
689
690 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
691 txdr->size = ALIGN(txdr->size, 4096);
692
693 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
694 if(!txdr->desc) {
695 vfree(txdr->buffer_info);
696 DPRINTK(PROBE, ERR,
697 "Unable to allocate transmit descriptor memory\n");
698 return -ENOMEM;
699 }
700 memset(txdr->desc, 0, txdr->size);
701
702 txdr->next_to_use = 0;
703 txdr->next_to_clean = 0;
704
705 return 0;
706 }
707
708 /**
709 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
710 * @adapter: board private structure
711 *
712 * Configure the Tx unit of the MAC after a reset.
713 **/
714
715 static void
716 ixgb_configure_tx(struct ixgb_adapter *adapter)
717 {
718 uint64_t tdba = adapter->tx_ring.dma;
719 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
720 uint32_t tctl;
721 struct ixgb_hw *hw = &adapter->hw;
722
723 /* Setup the Base and Length of the Tx Descriptor Ring
724 * tx_ring.dma can be either a 32 or 64 bit value
725 */
726
727 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
728 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
729
730 IXGB_WRITE_REG(hw, TDLEN, tdlen);
731
732 /* Setup the HW Tx Head and Tail descriptor pointers */
733
734 IXGB_WRITE_REG(hw, TDH, 0);
735 IXGB_WRITE_REG(hw, TDT, 0);
736
737 /* don't set up txdctl, it induces performance problems if configured
738 * incorrectly */
739 /* Set the Tx Interrupt Delay register */
740
741 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
742
743 /* Program the Transmit Control Register */
744
745 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
746 IXGB_WRITE_REG(hw, TCTL, tctl);
747
748 /* Setup Transmit Descriptor Settings for this adapter */
749 adapter->tx_cmd_type =
750 IXGB_TX_DESC_TYPE
751 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
752 }
753
754 /**
755 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
756 * @adapter: board private structure
757 *
758 * Returns 0 on success, negative on failure
759 **/
760
761 int
762 ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
763 {
764 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
765 struct pci_dev *pdev = adapter->pdev;
766 int size;
767
768 size = sizeof(struct ixgb_buffer) * rxdr->count;
769 rxdr->buffer_info = vmalloc(size);
770 if(!rxdr->buffer_info) {
771 DPRINTK(PROBE, ERR,
772 "Unable to allocate receive descriptor ring\n");
773 return -ENOMEM;
774 }
775 memset(rxdr->buffer_info, 0, size);
776
777 /* Round up to nearest 4K */
778
779 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
780 rxdr->size = ALIGN(rxdr->size, 4096);
781
782 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
783
784 if(!rxdr->desc) {
785 vfree(rxdr->buffer_info);
786 DPRINTK(PROBE, ERR,
787 "Unable to allocate receive descriptors\n");
788 return -ENOMEM;
789 }
790 memset(rxdr->desc, 0, rxdr->size);
791
792 rxdr->next_to_clean = 0;
793 rxdr->next_to_use = 0;
794
795 return 0;
796 }
797
798 /**
799 * ixgb_setup_rctl - configure the receive control register
800 * @adapter: Board private structure
801 **/
802
803 static void
804 ixgb_setup_rctl(struct ixgb_adapter *adapter)
805 {
806 uint32_t rctl;
807
808 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
809
810 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
811
812 rctl |=
813 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
814 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
815 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
816
817 rctl |= IXGB_RCTL_SECRC;
818
819 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
820 rctl |= IXGB_RCTL_BSIZE_2048;
821 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
822 rctl |= IXGB_RCTL_BSIZE_4096;
823 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
824 rctl |= IXGB_RCTL_BSIZE_8192;
825 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
826 rctl |= IXGB_RCTL_BSIZE_16384;
827
828 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
829 }
830
831 /**
832 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
833 * @adapter: board private structure
834 *
835 * Configure the Rx unit of the MAC after a reset.
836 **/
837
838 static void
839 ixgb_configure_rx(struct ixgb_adapter *adapter)
840 {
841 uint64_t rdba = adapter->rx_ring.dma;
842 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
843 struct ixgb_hw *hw = &adapter->hw;
844 uint32_t rctl;
845 uint32_t rxcsum;
846 uint32_t rxdctl;
847
848 /* make sure receives are disabled while setting up the descriptors */
849
850 rctl = IXGB_READ_REG(hw, RCTL);
851 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
852
853 /* set the Receive Delay Timer Register */
854
855 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
856
857 /* Setup the Base and Length of the Rx Descriptor Ring */
858
859 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
860 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
861
862 IXGB_WRITE_REG(hw, RDLEN, rdlen);
863
864 /* Setup the HW Rx Head and Tail Descriptor Pointers */
865 IXGB_WRITE_REG(hw, RDH, 0);
866 IXGB_WRITE_REG(hw, RDT, 0);
867
868 /* set up pre-fetching of receive buffers so we get some before we
869 * run out (default hardware behavior is to run out before fetching
870 * more). This sets up to fetch if HTHRESH rx descriptors are avail
871 * and the descriptors in hw cache are below PTHRESH. This avoids
872 * the hardware behavior of fetching <=512 descriptors in a single
873 * burst that pre-empts all other activity, usually causing fifo
874 * overflows. */
875 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
876 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
877 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
878 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
879 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
880
881 /* Enable Receive Checksum Offload for TCP and UDP */
882 if(adapter->rx_csum == TRUE) {
883 rxcsum = IXGB_READ_REG(hw, RXCSUM);
884 rxcsum |= IXGB_RXCSUM_TUOFL;
885 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
886 }
887
888 /* Enable Receives */
889
890 IXGB_WRITE_REG(hw, RCTL, rctl);
891 }
892
893 /**
894 * ixgb_free_tx_resources - Free Tx Resources
895 * @adapter: board private structure
896 *
897 * Free all transmit software resources
898 **/
899
900 void
901 ixgb_free_tx_resources(struct ixgb_adapter *adapter)
902 {
903 struct pci_dev *pdev = adapter->pdev;
904
905 ixgb_clean_tx_ring(adapter);
906
907 vfree(adapter->tx_ring.buffer_info);
908 adapter->tx_ring.buffer_info = NULL;
909
910 pci_free_consistent(pdev, adapter->tx_ring.size,
911 adapter->tx_ring.desc, adapter->tx_ring.dma);
912
913 adapter->tx_ring.desc = NULL;
914 }
915
916 static void
917 ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
918 struct ixgb_buffer *buffer_info)
919 {
920 struct pci_dev *pdev = adapter->pdev;
921
922 if (buffer_info->dma)
923 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
924 PCI_DMA_TODEVICE);
925
926 if (buffer_info->skb)
927 dev_kfree_skb_any(buffer_info->skb);
928
929 buffer_info->skb = NULL;
930 buffer_info->dma = 0;
931 buffer_info->time_stamp = 0;
932 /* these fields must always be initialized in tx
933 * buffer_info->length = 0;
934 * buffer_info->next_to_watch = 0; */
935 }
936
937 /**
938 * ixgb_clean_tx_ring - Free Tx Buffers
939 * @adapter: board private structure
940 **/
941
942 static void
943 ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
944 {
945 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
946 struct ixgb_buffer *buffer_info;
947 unsigned long size;
948 unsigned int i;
949
950 /* Free all the Tx ring sk_buffs */
951
952 for(i = 0; i < tx_ring->count; i++) {
953 buffer_info = &tx_ring->buffer_info[i];
954 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
955 }
956
957 size = sizeof(struct ixgb_buffer) * tx_ring->count;
958 memset(tx_ring->buffer_info, 0, size);
959
960 /* Zero out the descriptor ring */
961
962 memset(tx_ring->desc, 0, tx_ring->size);
963
964 tx_ring->next_to_use = 0;
965 tx_ring->next_to_clean = 0;
966
967 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
968 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
969 }
970
971 /**
972 * ixgb_free_rx_resources - Free Rx Resources
973 * @adapter: board private structure
974 *
975 * Free all receive software resources
976 **/
977
978 void
979 ixgb_free_rx_resources(struct ixgb_adapter *adapter)
980 {
981 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
982 struct pci_dev *pdev = adapter->pdev;
983
984 ixgb_clean_rx_ring(adapter);
985
986 vfree(rx_ring->buffer_info);
987 rx_ring->buffer_info = NULL;
988
989 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
990
991 rx_ring->desc = NULL;
992 }
993
994 /**
995 * ixgb_clean_rx_ring - Free Rx Buffers
996 * @adapter: board private structure
997 **/
998
999 static void
1000 ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1001 {
1002 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1003 struct ixgb_buffer *buffer_info;
1004 struct pci_dev *pdev = adapter->pdev;
1005 unsigned long size;
1006 unsigned int i;
1007
1008 /* Free all the Rx ring sk_buffs */
1009
1010 for(i = 0; i < rx_ring->count; i++) {
1011 buffer_info = &rx_ring->buffer_info[i];
1012 if(buffer_info->skb) {
1013
1014 pci_unmap_single(pdev,
1015 buffer_info->dma,
1016 buffer_info->length,
1017 PCI_DMA_FROMDEVICE);
1018
1019 dev_kfree_skb(buffer_info->skb);
1020
1021 buffer_info->skb = NULL;
1022 }
1023 }
1024
1025 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1026 memset(rx_ring->buffer_info, 0, size);
1027
1028 /* Zero out the descriptor ring */
1029
1030 memset(rx_ring->desc, 0, rx_ring->size);
1031
1032 rx_ring->next_to_clean = 0;
1033 rx_ring->next_to_use = 0;
1034
1035 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1036 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1037 }
1038
1039 /**
1040 * ixgb_set_mac - Change the Ethernet Address of the NIC
1041 * @netdev: network interface device structure
1042 * @p: pointer to an address structure
1043 *
1044 * Returns 0 on success, negative on failure
1045 **/
1046
1047 static int
1048 ixgb_set_mac(struct net_device *netdev, void *p)
1049 {
1050 struct ixgb_adapter *adapter = netdev_priv(netdev);
1051 struct sockaddr *addr = p;
1052
1053 if(!is_valid_ether_addr(addr->sa_data))
1054 return -EADDRNOTAVAIL;
1055
1056 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1057
1058 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1059
1060 return 0;
1061 }
1062
1063 /**
1064 * ixgb_set_multi - Multicast and Promiscuous mode set
1065 * @netdev: network interface device structure
1066 *
1067 * The set_multi entry point is called whenever the multicast address
1068 * list or the network interface flags are updated. This routine is
1069 * responsible for configuring the hardware for proper multicast,
1070 * promiscuous mode, and all-multi behavior.
1071 **/
1072
1073 static void
1074 ixgb_set_multi(struct net_device *netdev)
1075 {
1076 struct ixgb_adapter *adapter = netdev_priv(netdev);
1077 struct ixgb_hw *hw = &adapter->hw;
1078 struct dev_mc_list *mc_ptr;
1079 uint32_t rctl;
1080 int i;
1081
1082 /* Check for Promiscuous and All Multicast modes */
1083
1084 rctl = IXGB_READ_REG(hw, RCTL);
1085
1086 if(netdev->flags & IFF_PROMISC) {
1087 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1088 } else if(netdev->flags & IFF_ALLMULTI) {
1089 rctl |= IXGB_RCTL_MPE;
1090 rctl &= ~IXGB_RCTL_UPE;
1091 } else {
1092 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1093 }
1094
1095 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1096 rctl |= IXGB_RCTL_MPE;
1097 IXGB_WRITE_REG(hw, RCTL, rctl);
1098 } else {
1099 uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
1100 IXGB_ETH_LENGTH_OF_ADDRESS];
1101
1102 IXGB_WRITE_REG(hw, RCTL, rctl);
1103
1104 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1105 i++, mc_ptr = mc_ptr->next)
1106 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1107 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1108
1109 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1110 }
1111 }
1112
1113 /**
1114 * ixgb_watchdog - Timer Call-back
1115 * @data: pointer to netdev cast into an unsigned long
1116 **/
1117
1118 static void
1119 ixgb_watchdog(unsigned long data)
1120 {
1121 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1122 struct net_device *netdev = adapter->netdev;
1123 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1124
1125 ixgb_check_for_link(&adapter->hw);
1126
1127 if (ixgb_check_for_bad_link(&adapter->hw)) {
1128 /* force the reset path */
1129 netif_stop_queue(netdev);
1130 }
1131
1132 if(adapter->hw.link_up) {
1133 if(!netif_carrier_ok(netdev)) {
1134 DPRINTK(LINK, INFO,
1135 "NIC Link is Up 10000 Mbps Full Duplex\n");
1136 adapter->link_speed = 10000;
1137 adapter->link_duplex = FULL_DUPLEX;
1138 netif_carrier_on(netdev);
1139 netif_wake_queue(netdev);
1140 }
1141 } else {
1142 if(netif_carrier_ok(netdev)) {
1143 adapter->link_speed = 0;
1144 adapter->link_duplex = 0;
1145 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1146 netif_carrier_off(netdev);
1147 netif_stop_queue(netdev);
1148
1149 }
1150 }
1151
1152 ixgb_update_stats(adapter);
1153
1154 if(!netif_carrier_ok(netdev)) {
1155 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1156 /* We've lost link, so the controller stops DMA,
1157 * but we've got queued Tx work that's never going
1158 * to get done, so reset controller to flush Tx.
1159 * (Do the reset outside of interrupt context). */
1160 schedule_work(&adapter->tx_timeout_task);
1161 }
1162 }
1163
1164 /* Force detection of hung controller every watchdog period */
1165 adapter->detect_tx_hung = TRUE;
1166
1167 /* generate an interrupt to force clean up of any stragglers */
1168 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1169
1170 /* Reset the timer */
1171 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1172 }
1173
1174 #define IXGB_TX_FLAGS_CSUM 0x00000001
1175 #define IXGB_TX_FLAGS_VLAN 0x00000002
1176 #define IXGB_TX_FLAGS_TSO 0x00000004
1177
1178 static int
1179 ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1180 {
1181 struct ixgb_context_desc *context_desc;
1182 unsigned int i;
1183 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1184 uint16_t ipcse, tucse, mss;
1185 int err;
1186
1187 if (likely(skb_is_gso(skb))) {
1188 struct ixgb_buffer *buffer_info;
1189 struct iphdr *iph;
1190
1191 if (skb_header_cloned(skb)) {
1192 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1193 if (err)
1194 return err;
1195 }
1196
1197 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1198 mss = skb_shinfo(skb)->gso_size;
1199 iph = ip_hdr(skb);
1200 iph->tot_len = 0;
1201 iph->check = 0;
1202 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1203 iph->daddr, 0,
1204 IPPROTO_TCP, 0);
1205 ipcss = skb_network_offset(skb);
1206 ipcso = (void *)&(iph->check) - (void *)skb->data;
1207 ipcse = skb_transport_offset(skb) - 1;
1208 tucss = skb_transport_offset(skb);
1209 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1210 tucse = 0;
1211
1212 i = adapter->tx_ring.next_to_use;
1213 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1214 buffer_info = &adapter->tx_ring.buffer_info[i];
1215 WARN_ON(buffer_info->dma != 0);
1216
1217 context_desc->ipcss = ipcss;
1218 context_desc->ipcso = ipcso;
1219 context_desc->ipcse = cpu_to_le16(ipcse);
1220 context_desc->tucss = tucss;
1221 context_desc->tucso = tucso;
1222 context_desc->tucse = cpu_to_le16(tucse);
1223 context_desc->mss = cpu_to_le16(mss);
1224 context_desc->hdr_len = hdr_len;
1225 context_desc->status = 0;
1226 context_desc->cmd_type_len = cpu_to_le32(
1227 IXGB_CONTEXT_DESC_TYPE
1228 | IXGB_CONTEXT_DESC_CMD_TSE
1229 | IXGB_CONTEXT_DESC_CMD_IP
1230 | IXGB_CONTEXT_DESC_CMD_TCP
1231 | IXGB_CONTEXT_DESC_CMD_IDE
1232 | (skb->len - (hdr_len)));
1233
1234
1235 if(++i == adapter->tx_ring.count) i = 0;
1236 adapter->tx_ring.next_to_use = i;
1237
1238 return 1;
1239 }
1240
1241 return 0;
1242 }
1243
1244 static boolean_t
1245 ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1246 {
1247 struct ixgb_context_desc *context_desc;
1248 unsigned int i;
1249 uint8_t css, cso;
1250
1251 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1252 struct ixgb_buffer *buffer_info;
1253 css = skb_transport_offset(skb);
1254 cso = css + skb->csum_offset;
1255
1256 i = adapter->tx_ring.next_to_use;
1257 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1258 buffer_info = &adapter->tx_ring.buffer_info[i];
1259 WARN_ON(buffer_info->dma != 0);
1260
1261 context_desc->tucss = css;
1262 context_desc->tucso = cso;
1263 context_desc->tucse = 0;
1264 /* zero out any previously existing data in one instruction */
1265 *(uint32_t *)&(context_desc->ipcss) = 0;
1266 context_desc->status = 0;
1267 context_desc->hdr_len = 0;
1268 context_desc->mss = 0;
1269 context_desc->cmd_type_len =
1270 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
1271 | IXGB_TX_DESC_CMD_IDE);
1272
1273 if(++i == adapter->tx_ring.count) i = 0;
1274 adapter->tx_ring.next_to_use = i;
1275
1276 return TRUE;
1277 }
1278
1279 return FALSE;
1280 }
1281
1282 #define IXGB_MAX_TXD_PWR 14
1283 #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1284
1285 static int
1286 ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1287 unsigned int first)
1288 {
1289 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1290 struct ixgb_buffer *buffer_info;
1291 int len = skb->len;
1292 unsigned int offset = 0, size, count = 0, i;
1293 unsigned int mss = skb_shinfo(skb)->gso_size;
1294
1295 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1296 unsigned int f;
1297
1298 len -= skb->data_len;
1299
1300 i = tx_ring->next_to_use;
1301
1302 while(len) {
1303 buffer_info = &tx_ring->buffer_info[i];
1304 size = min(len, IXGB_MAX_DATA_PER_TXD);
1305 /* Workaround for premature desc write-backs
1306 * in TSO mode. Append 4-byte sentinel desc */
1307 if (unlikely(mss && !nr_frags && size == len && size > 8))
1308 size -= 4;
1309
1310 buffer_info->length = size;
1311 WARN_ON(buffer_info->dma != 0);
1312 buffer_info->dma =
1313 pci_map_single(adapter->pdev,
1314 skb->data + offset,
1315 size,
1316 PCI_DMA_TODEVICE);
1317 buffer_info->time_stamp = jiffies;
1318 buffer_info->next_to_watch = 0;
1319
1320 len -= size;
1321 offset += size;
1322 count++;
1323 if(++i == tx_ring->count) i = 0;
1324 }
1325
1326 for(f = 0; f < nr_frags; f++) {
1327 struct skb_frag_struct *frag;
1328
1329 frag = &skb_shinfo(skb)->frags[f];
1330 len = frag->size;
1331 offset = 0;
1332
1333 while(len) {
1334 buffer_info = &tx_ring->buffer_info[i];
1335 size = min(len, IXGB_MAX_DATA_PER_TXD);
1336
1337 /* Workaround for premature desc write-backs
1338 * in TSO mode. Append 4-byte sentinel desc */
1339 if (unlikely(mss && (f == (nr_frags - 1))
1340 && size == len && size > 8))
1341 size -= 4;
1342
1343 buffer_info->length = size;
1344 buffer_info->dma =
1345 pci_map_page(adapter->pdev,
1346 frag->page,
1347 frag->page_offset + offset,
1348 size,
1349 PCI_DMA_TODEVICE);
1350 buffer_info->time_stamp = jiffies;
1351 buffer_info->next_to_watch = 0;
1352
1353 len -= size;
1354 offset += size;
1355 count++;
1356 if(++i == tx_ring->count) i = 0;
1357 }
1358 }
1359 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1360 tx_ring->buffer_info[i].skb = skb;
1361 tx_ring->buffer_info[first].next_to_watch = i;
1362
1363 return count;
1364 }
1365
1366 static void
1367 ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1368 {
1369 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1370 struct ixgb_tx_desc *tx_desc = NULL;
1371 struct ixgb_buffer *buffer_info;
1372 uint32_t cmd_type_len = adapter->tx_cmd_type;
1373 uint8_t status = 0;
1374 uint8_t popts = 0;
1375 unsigned int i;
1376
1377 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1378 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1379 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1380 }
1381
1382 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1383 popts |= IXGB_TX_DESC_POPTS_TXSM;
1384
1385 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1386 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1387 }
1388
1389 i = tx_ring->next_to_use;
1390
1391 while(count--) {
1392 buffer_info = &tx_ring->buffer_info[i];
1393 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1394 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1395 tx_desc->cmd_type_len =
1396 cpu_to_le32(cmd_type_len | buffer_info->length);
1397 tx_desc->status = status;
1398 tx_desc->popts = popts;
1399 tx_desc->vlan = cpu_to_le16(vlan_id);
1400
1401 if(++i == tx_ring->count) i = 0;
1402 }
1403
1404 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1405 | IXGB_TX_DESC_CMD_RS );
1406
1407 /* Force memory writes to complete before letting h/w
1408 * know there are new descriptors to fetch. (Only
1409 * applicable for weak-ordered memory model archs,
1410 * such as IA-64). */
1411 wmb();
1412
1413 tx_ring->next_to_use = i;
1414 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1415 }
1416
1417 static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1418 {
1419 struct ixgb_adapter *adapter = netdev_priv(netdev);
1420 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1421
1422 netif_stop_queue(netdev);
1423 /* Herbert's original patch had:
1424 * smp_mb__after_netif_stop_queue();
1425 * but since that doesn't exist yet, just open code it. */
1426 smp_mb();
1427
1428 /* We need to check again in a case another CPU has just
1429 * made room available. */
1430 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1431 return -EBUSY;
1432
1433 /* A reprieve! */
1434 netif_start_queue(netdev);
1435 ++adapter->restart_queue;
1436 return 0;
1437 }
1438
1439 static int ixgb_maybe_stop_tx(struct net_device *netdev,
1440 struct ixgb_desc_ring *tx_ring, int size)
1441 {
1442 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1443 return 0;
1444 return __ixgb_maybe_stop_tx(netdev, size);
1445 }
1446
1447
1448 /* Tx Descriptors needed, worst case */
1449 #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1450 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1451 #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1452 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1453 + 1 /* one more needed for sentinel TSO workaround */
1454
1455 static int
1456 ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1457 {
1458 struct ixgb_adapter *adapter = netdev_priv(netdev);
1459 unsigned int first;
1460 unsigned int tx_flags = 0;
1461 unsigned long flags;
1462 int vlan_id = 0;
1463 int tso;
1464
1465 if(skb->len <= 0) {
1466 dev_kfree_skb_any(skb);
1467 return 0;
1468 }
1469
1470 #ifdef NETIF_F_LLTX
1471 local_irq_save(flags);
1472 if (!spin_trylock(&adapter->tx_lock)) {
1473 /* Collision - tell upper layer to requeue */
1474 local_irq_restore(flags);
1475 return NETDEV_TX_LOCKED;
1476 }
1477 #else
1478 spin_lock_irqsave(&adapter->tx_lock, flags);
1479 #endif
1480
1481 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1482 DESC_NEEDED))) {
1483 netif_stop_queue(netdev);
1484 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1485 return NETDEV_TX_BUSY;
1486 }
1487
1488 #ifndef NETIF_F_LLTX
1489 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1490 #endif
1491
1492 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1493 tx_flags |= IXGB_TX_FLAGS_VLAN;
1494 vlan_id = vlan_tx_tag_get(skb);
1495 }
1496
1497 first = adapter->tx_ring.next_to_use;
1498
1499 tso = ixgb_tso(adapter, skb);
1500 if (tso < 0) {
1501 dev_kfree_skb_any(skb);
1502 #ifdef NETIF_F_LLTX
1503 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1504 #endif
1505 return NETDEV_TX_OK;
1506 }
1507
1508 if (likely(tso))
1509 tx_flags |= IXGB_TX_FLAGS_TSO;
1510 else if(ixgb_tx_csum(adapter, skb))
1511 tx_flags |= IXGB_TX_FLAGS_CSUM;
1512
1513 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1514 tx_flags);
1515
1516 netdev->trans_start = jiffies;
1517
1518 #ifdef NETIF_F_LLTX
1519 /* Make sure there is space in the ring for the next send. */
1520 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
1521
1522 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1523
1524 #endif
1525 return NETDEV_TX_OK;
1526 }
1527
1528 /**
1529 * ixgb_tx_timeout - Respond to a Tx Hang
1530 * @netdev: network interface device structure
1531 **/
1532
1533 static void
1534 ixgb_tx_timeout(struct net_device *netdev)
1535 {
1536 struct ixgb_adapter *adapter = netdev_priv(netdev);
1537
1538 /* Do the reset outside of interrupt context */
1539 schedule_work(&adapter->tx_timeout_task);
1540 }
1541
1542 static void
1543 ixgb_tx_timeout_task(struct work_struct *work)
1544 {
1545 struct ixgb_adapter *adapter =
1546 container_of(work, struct ixgb_adapter, tx_timeout_task);
1547
1548 adapter->tx_timeout_count++;
1549 ixgb_down(adapter, TRUE);
1550 ixgb_up(adapter);
1551 }
1552
1553 /**
1554 * ixgb_get_stats - Get System Network Statistics
1555 * @netdev: network interface device structure
1556 *
1557 * Returns the address of the device statistics structure.
1558 * The statistics are actually updated from the timer callback.
1559 **/
1560
1561 static struct net_device_stats *
1562 ixgb_get_stats(struct net_device *netdev)
1563 {
1564 struct ixgb_adapter *adapter = netdev_priv(netdev);
1565
1566 return &adapter->net_stats;
1567 }
1568
1569 /**
1570 * ixgb_change_mtu - Change the Maximum Transfer Unit
1571 * @netdev: network interface device structure
1572 * @new_mtu: new value for maximum frame size
1573 *
1574 * Returns 0 on success, negative on failure
1575 **/
1576
1577 static int
1578 ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1579 {
1580 struct ixgb_adapter *adapter = netdev_priv(netdev);
1581 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1582 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1583
1584
1585 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1586 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1587 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1588 return -EINVAL;
1589 }
1590
1591 adapter->rx_buffer_len = max_frame;
1592
1593 netdev->mtu = new_mtu;
1594
1595 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1596 ixgb_down(adapter, TRUE);
1597 ixgb_up(adapter);
1598 }
1599
1600 return 0;
1601 }
1602
1603 /**
1604 * ixgb_update_stats - Update the board statistics counters.
1605 * @adapter: board private structure
1606 **/
1607
1608 void
1609 ixgb_update_stats(struct ixgb_adapter *adapter)
1610 {
1611 struct net_device *netdev = adapter->netdev;
1612 struct pci_dev *pdev = adapter->pdev;
1613
1614 /* Prevent stats update while adapter is being reset */
1615 if (pci_channel_offline(pdev))
1616 return;
1617
1618 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1619 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1620 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1621 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1622 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1623 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1624
1625 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1626 /* fix up multicast stats by removing broadcasts */
1627 if(multi >= bcast)
1628 multi -= bcast;
1629
1630 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1631 adapter->stats.mprch += (multi >> 32);
1632 adapter->stats.bprcl += bcast_l;
1633 adapter->stats.bprch += bcast_h;
1634 } else {
1635 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1636 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1637 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1638 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1639 }
1640 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1641 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1642 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1643 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1644 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1645 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1646 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1647 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1648 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1649 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1650 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1651 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1652 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1653 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1654 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1655 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1656 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1657 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1658 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1659 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1660 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1661 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1662 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1663 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1664 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1665 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1666 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1667 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1668 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1669 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1670 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1671 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1672 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1673 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1674 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1675 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1676 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1677 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1678 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1679 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1680 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1681 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1682 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1683 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1684 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1685 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1686 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1687 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1688 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1689 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1690 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1691 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1692 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1693 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1694 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1695 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1696
1697 /* Fill out the OS statistics structure */
1698
1699 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1700 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1701 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1702 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1703 adapter->net_stats.multicast = adapter->stats.mprcl;
1704 adapter->net_stats.collisions = 0;
1705
1706 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1707 * with a length in the type/len field */
1708 adapter->net_stats.rx_errors =
1709 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1710 adapter->stats.ruc +
1711 adapter->stats.roc /*+ adapter->stats.rlec */ +
1712 adapter->stats.icbc +
1713 adapter->stats.ecbc + adapter->stats.mpc;
1714
1715 /* see above
1716 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1717 */
1718
1719 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1720 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1721 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1722 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1723
1724 adapter->net_stats.tx_errors = 0;
1725 adapter->net_stats.rx_frame_errors = 0;
1726 adapter->net_stats.tx_aborted_errors = 0;
1727 adapter->net_stats.tx_carrier_errors = 0;
1728 adapter->net_stats.tx_fifo_errors = 0;
1729 adapter->net_stats.tx_heartbeat_errors = 0;
1730 adapter->net_stats.tx_window_errors = 0;
1731 }
1732
1733 #define IXGB_MAX_INTR 10
1734 /**
1735 * ixgb_intr - Interrupt Handler
1736 * @irq: interrupt number
1737 * @data: pointer to a network interface device structure
1738 **/
1739
1740 static irqreturn_t
1741 ixgb_intr(int irq, void *data)
1742 {
1743 struct net_device *netdev = data;
1744 struct ixgb_adapter *adapter = netdev_priv(netdev);
1745 struct ixgb_hw *hw = &adapter->hw;
1746 uint32_t icr = IXGB_READ_REG(hw, ICR);
1747 #ifndef CONFIG_IXGB_NAPI
1748 unsigned int i;
1749 #endif
1750
1751 if(unlikely(!icr))
1752 return IRQ_NONE; /* Not our interrupt */
1753
1754 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1755 mod_timer(&adapter->watchdog_timer, jiffies);
1756 }
1757
1758 #ifdef CONFIG_IXGB_NAPI
1759 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1760
1761 /* Disable interrupts and register for poll. The flush
1762 of the posted write is intentionally left out.
1763 */
1764
1765 atomic_inc(&adapter->irq_sem);
1766 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1767 __netif_rx_schedule(netdev, &adapter->napi);
1768 }
1769 #else
1770 /* yes, that is actually a & and it is meant to make sure that
1771 * every pass through this for loop checks both receive and
1772 * transmit queues for completed descriptors, intended to
1773 * avoid starvation issues and assist tx/rx fairness. */
1774 for(i = 0; i < IXGB_MAX_INTR; i++)
1775 if(!ixgb_clean_rx_irq(adapter) &
1776 !ixgb_clean_tx_irq(adapter))
1777 break;
1778 #endif
1779 return IRQ_HANDLED;
1780 }
1781
1782 #ifdef CONFIG_IXGB_NAPI
1783 /**
1784 * ixgb_clean - NAPI Rx polling callback
1785 * @adapter: board private structure
1786 **/
1787
1788 static int
1789 ixgb_clean(struct napi_struct *napi, int budget)
1790 {
1791 struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1792 struct net_device *netdev = adapter->netdev;
1793 int work_done = 0;
1794
1795 ixgb_clean_tx_irq(adapter);
1796 ixgb_clean_rx_irq(adapter, &work_done, budget);
1797
1798 /* If budget not fully consumed, exit the polling mode */
1799 if (work_done < budget) {
1800 netif_rx_complete(netdev, napi);
1801 ixgb_irq_enable(adapter);
1802 }
1803
1804 return work_done;
1805 }
1806 #endif
1807
1808 /**
1809 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1810 * @adapter: board private structure
1811 **/
1812
1813 static boolean_t
1814 ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1815 {
1816 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1817 struct net_device *netdev = adapter->netdev;
1818 struct ixgb_tx_desc *tx_desc, *eop_desc;
1819 struct ixgb_buffer *buffer_info;
1820 unsigned int i, eop;
1821 boolean_t cleaned = FALSE;
1822
1823 i = tx_ring->next_to_clean;
1824 eop = tx_ring->buffer_info[i].next_to_watch;
1825 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1826
1827 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1828
1829 for(cleaned = FALSE; !cleaned; ) {
1830 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1831 buffer_info = &tx_ring->buffer_info[i];
1832
1833 if (tx_desc->popts
1834 & (IXGB_TX_DESC_POPTS_TXSM |
1835 IXGB_TX_DESC_POPTS_IXSM))
1836 adapter->hw_csum_tx_good++;
1837
1838 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1839
1840 *(uint32_t *)&(tx_desc->status) = 0;
1841
1842 cleaned = (i == eop);
1843 if(++i == tx_ring->count) i = 0;
1844 }
1845
1846 eop = tx_ring->buffer_info[i].next_to_watch;
1847 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1848 }
1849
1850 tx_ring->next_to_clean = i;
1851
1852 if (unlikely(netif_queue_stopped(netdev))) {
1853 spin_lock(&adapter->tx_lock);
1854 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1855 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
1856 netif_wake_queue(netdev);
1857 spin_unlock(&adapter->tx_lock);
1858 }
1859
1860 if(adapter->detect_tx_hung) {
1861 /* detect a transmit hang in hardware, this serializes the
1862 * check with the clearing of time_stamp and movement of i */
1863 adapter->detect_tx_hung = FALSE;
1864 if (tx_ring->buffer_info[eop].dma &&
1865 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1866 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1867 IXGB_STATUS_TXOFF)) {
1868 /* detected Tx unit hang */
1869 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1870 " TDH <%x>\n"
1871 " TDT <%x>\n"
1872 " next_to_use <%x>\n"
1873 " next_to_clean <%x>\n"
1874 "buffer_info[next_to_clean]\n"
1875 " time_stamp <%lx>\n"
1876 " next_to_watch <%x>\n"
1877 " jiffies <%lx>\n"
1878 " next_to_watch.status <%x>\n",
1879 IXGB_READ_REG(&adapter->hw, TDH),
1880 IXGB_READ_REG(&adapter->hw, TDT),
1881 tx_ring->next_to_use,
1882 tx_ring->next_to_clean,
1883 tx_ring->buffer_info[eop].time_stamp,
1884 eop,
1885 jiffies,
1886 eop_desc->status);
1887 netif_stop_queue(netdev);
1888 }
1889 }
1890
1891 return cleaned;
1892 }
1893
1894 /**
1895 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1896 * @adapter: board private structure
1897 * @rx_desc: receive descriptor
1898 * @sk_buff: socket buffer with received data
1899 **/
1900
1901 static void
1902 ixgb_rx_checksum(struct ixgb_adapter *adapter,
1903 struct ixgb_rx_desc *rx_desc,
1904 struct sk_buff *skb)
1905 {
1906 /* Ignore Checksum bit is set OR
1907 * TCP Checksum has not been calculated
1908 */
1909 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1910 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1911 skb->ip_summed = CHECKSUM_NONE;
1912 return;
1913 }
1914
1915 /* At this point we know the hardware did the TCP checksum */
1916 /* now look at the TCP checksum error bit */
1917 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1918 /* let the stack verify checksum errors */
1919 skb->ip_summed = CHECKSUM_NONE;
1920 adapter->hw_csum_rx_error++;
1921 } else {
1922 /* TCP checksum is good */
1923 skb->ip_summed = CHECKSUM_UNNECESSARY;
1924 adapter->hw_csum_rx_good++;
1925 }
1926 }
1927
1928 /**
1929 * ixgb_clean_rx_irq - Send received data up the network stack,
1930 * @adapter: board private structure
1931 **/
1932
1933 static boolean_t
1934 #ifdef CONFIG_IXGB_NAPI
1935 ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1936 #else
1937 ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1938 #endif
1939 {
1940 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1941 struct net_device *netdev = adapter->netdev;
1942 struct pci_dev *pdev = adapter->pdev;
1943 struct ixgb_rx_desc *rx_desc, *next_rxd;
1944 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1945 uint32_t length;
1946 unsigned int i, j;
1947 boolean_t cleaned = FALSE;
1948
1949 i = rx_ring->next_to_clean;
1950 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1951 buffer_info = &rx_ring->buffer_info[i];
1952
1953 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
1954 struct sk_buff *skb, *next_skb;
1955 u8 status;
1956
1957 #ifdef CONFIG_IXGB_NAPI
1958 if(*work_done >= work_to_do)
1959 break;
1960
1961 (*work_done)++;
1962 #endif
1963 status = rx_desc->status;
1964 skb = buffer_info->skb;
1965 buffer_info->skb = NULL;
1966
1967 prefetch(skb->data);
1968
1969 if(++i == rx_ring->count) i = 0;
1970 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1971 prefetch(next_rxd);
1972
1973 if((j = i + 1) == rx_ring->count) j = 0;
1974 next2_buffer = &rx_ring->buffer_info[j];
1975 prefetch(next2_buffer);
1976
1977 next_buffer = &rx_ring->buffer_info[i];
1978 next_skb = next_buffer->skb;
1979 prefetch(next_skb);
1980
1981 cleaned = TRUE;
1982
1983 pci_unmap_single(pdev,
1984 buffer_info->dma,
1985 buffer_info->length,
1986 PCI_DMA_FROMDEVICE);
1987
1988 length = le16_to_cpu(rx_desc->length);
1989
1990 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1991
1992 /* All receives must fit into a single buffer */
1993
1994 IXGB_DBG("Receive packet consumed multiple buffers "
1995 "length<%x>\n", length);
1996
1997 dev_kfree_skb_irq(skb);
1998 goto rxdesc_done;
1999 }
2000
2001 if (unlikely(rx_desc->errors
2002 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
2003 | IXGB_RX_DESC_ERRORS_P |
2004 IXGB_RX_DESC_ERRORS_RXE))) {
2005
2006 dev_kfree_skb_irq(skb);
2007 goto rxdesc_done;
2008 }
2009
2010 /* code added for copybreak, this should improve
2011 * performance for small packets with large amounts
2012 * of reassembly being done in the stack */
2013 #define IXGB_CB_LENGTH 256
2014 if (length < IXGB_CB_LENGTH) {
2015 struct sk_buff *new_skb =
2016 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
2017 if (new_skb) {
2018 skb_reserve(new_skb, NET_IP_ALIGN);
2019 skb_copy_to_linear_data_offset(new_skb,
2020 -NET_IP_ALIGN,
2021 (skb->data -
2022 NET_IP_ALIGN),
2023 (length +
2024 NET_IP_ALIGN));
2025 /* save the skb in buffer_info as good */
2026 buffer_info->skb = skb;
2027 skb = new_skb;
2028 }
2029 }
2030 /* end copybreak code */
2031
2032 /* Good Receive */
2033 skb_put(skb, length);
2034
2035 /* Receive Checksum Offload */
2036 ixgb_rx_checksum(adapter, rx_desc, skb);
2037
2038 skb->protocol = eth_type_trans(skb, netdev);
2039 #ifdef CONFIG_IXGB_NAPI
2040 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
2041 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2042 le16_to_cpu(rx_desc->special) &
2043 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2044 } else {
2045 netif_receive_skb(skb);
2046 }
2047 #else /* CONFIG_IXGB_NAPI */
2048 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
2049 vlan_hwaccel_rx(skb, adapter->vlgrp,
2050 le16_to_cpu(rx_desc->special) &
2051 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2052 } else {
2053 netif_rx(skb);
2054 }
2055 #endif /* CONFIG_IXGB_NAPI */
2056 netdev->last_rx = jiffies;
2057
2058 rxdesc_done:
2059 /* clean up descriptor, might be written over by hw */
2060 rx_desc->status = 0;
2061
2062 /* use prefetched values */
2063 rx_desc = next_rxd;
2064 buffer_info = next_buffer;
2065 }
2066
2067 rx_ring->next_to_clean = i;
2068
2069 ixgb_alloc_rx_buffers(adapter);
2070
2071 return cleaned;
2072 }
2073
2074 /**
2075 * ixgb_alloc_rx_buffers - Replace used receive buffers
2076 * @adapter: address of board private structure
2077 **/
2078
2079 static void
2080 ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2081 {
2082 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2083 struct net_device *netdev = adapter->netdev;
2084 struct pci_dev *pdev = adapter->pdev;
2085 struct ixgb_rx_desc *rx_desc;
2086 struct ixgb_buffer *buffer_info;
2087 struct sk_buff *skb;
2088 unsigned int i;
2089 int num_group_tail_writes;
2090 long cleancount;
2091
2092 i = rx_ring->next_to_use;
2093 buffer_info = &rx_ring->buffer_info[i];
2094 cleancount = IXGB_DESC_UNUSED(rx_ring);
2095
2096 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2097
2098 /* leave three descriptors unused */
2099 while(--cleancount > 2) {
2100 /* recycle! its good for you */
2101 skb = buffer_info->skb;
2102 if (skb) {
2103 skb_trim(skb, 0);
2104 goto map_skb;
2105 }
2106
2107 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2108 + NET_IP_ALIGN);
2109 if (unlikely(!skb)) {
2110 /* Better luck next round */
2111 adapter->alloc_rx_buff_failed++;
2112 break;
2113 }
2114
2115 /* Make buffer alignment 2 beyond a 16 byte boundary
2116 * this will result in a 16 byte aligned IP header after
2117 * the 14 byte MAC header is removed
2118 */
2119 skb_reserve(skb, NET_IP_ALIGN);
2120
2121 buffer_info->skb = skb;
2122 buffer_info->length = adapter->rx_buffer_len;
2123 map_skb:
2124 buffer_info->dma = pci_map_single(pdev,
2125 skb->data,
2126 adapter->rx_buffer_len,
2127 PCI_DMA_FROMDEVICE);
2128
2129 rx_desc = IXGB_RX_DESC(*rx_ring, i);
2130 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
2131 /* guarantee DD bit not set now before h/w gets descriptor
2132 * this is the rest of the workaround for h/w double
2133 * writeback. */
2134 rx_desc->status = 0;
2135
2136
2137 if(++i == rx_ring->count) i = 0;
2138 buffer_info = &rx_ring->buffer_info[i];
2139 }
2140
2141 if (likely(rx_ring->next_to_use != i)) {
2142 rx_ring->next_to_use = i;
2143 if (unlikely(i-- == 0))
2144 i = (rx_ring->count - 1);
2145
2146 /* Force memory writes to complete before letting h/w
2147 * know there are new descriptors to fetch. (Only
2148 * applicable for weak-ordered memory model archs, such
2149 * as IA-64). */
2150 wmb();
2151 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2152 }
2153 }
2154
2155 /**
2156 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2157 *
2158 * @param netdev network interface device structure
2159 * @param grp indicates to enable or disable tagging/stripping
2160 **/
2161 static void
2162 ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2163 {
2164 struct ixgb_adapter *adapter = netdev_priv(netdev);
2165 uint32_t ctrl, rctl;
2166
2167 ixgb_irq_disable(adapter);
2168 adapter->vlgrp = grp;
2169
2170 if(grp) {
2171 /* enable VLAN tag insert/strip */
2172 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2173 ctrl |= IXGB_CTRL0_VME;
2174 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2175
2176 /* enable VLAN receive filtering */
2177
2178 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2179 rctl |= IXGB_RCTL_VFE;
2180 rctl &= ~IXGB_RCTL_CFIEN;
2181 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2182 } else {
2183 /* disable VLAN tag insert/strip */
2184
2185 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2186 ctrl &= ~IXGB_CTRL0_VME;
2187 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2188
2189 /* disable VLAN filtering */
2190
2191 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2192 rctl &= ~IXGB_RCTL_VFE;
2193 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2194 }
2195
2196 ixgb_irq_enable(adapter);
2197 }
2198
2199 static void
2200 ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2201 {
2202 struct ixgb_adapter *adapter = netdev_priv(netdev);
2203 uint32_t vfta, index;
2204
2205 /* add VID to filter table */
2206
2207 index = (vid >> 5) & 0x7F;
2208 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2209 vfta |= (1 << (vid & 0x1F));
2210 ixgb_write_vfta(&adapter->hw, index, vfta);
2211 }
2212
2213 static void
2214 ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2215 {
2216 struct ixgb_adapter *adapter = netdev_priv(netdev);
2217 uint32_t vfta, index;
2218
2219 ixgb_irq_disable(adapter);
2220
2221 vlan_group_set_device(adapter->vlgrp, vid, NULL);
2222
2223 ixgb_irq_enable(adapter);
2224
2225 /* remove VID from filter table*/
2226
2227 index = (vid >> 5) & 0x7F;
2228 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2229 vfta &= ~(1 << (vid & 0x1F));
2230 ixgb_write_vfta(&adapter->hw, index, vfta);
2231 }
2232
2233 static void
2234 ixgb_restore_vlan(struct ixgb_adapter *adapter)
2235 {
2236 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2237
2238 if(adapter->vlgrp) {
2239 uint16_t vid;
2240 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2241 if(!vlan_group_get_device(adapter->vlgrp, vid))
2242 continue;
2243 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2244 }
2245 }
2246 }
2247
2248 #ifdef CONFIG_NET_POLL_CONTROLLER
2249 /*
2250 * Polling 'interrupt' - used by things like netconsole to send skbs
2251 * without having to re-enable interrupts. It's not called while
2252 * the interrupt routine is executing.
2253 */
2254
2255 static void ixgb_netpoll(struct net_device *dev)
2256 {
2257 struct ixgb_adapter *adapter = netdev_priv(dev);
2258
2259 disable_irq(adapter->pdev->irq);
2260 ixgb_intr(adapter->pdev->irq, dev);
2261 enable_irq(adapter->pdev->irq);
2262 }
2263 #endif
2264
2265 /**
2266 * ixgb_io_error_detected() - called when PCI error is detected
2267 * @pdev pointer to pci device with error
2268 * @state pci channel state after error
2269 *
2270 * This callback is called by the PCI subsystem whenever
2271 * a PCI bus error is detected.
2272 */
2273 static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2274 enum pci_channel_state state)
2275 {
2276 struct net_device *netdev = pci_get_drvdata(pdev);
2277 struct ixgb_adapter *adapter = netdev_priv(netdev);
2278
2279 if(netif_running(netdev))
2280 ixgb_down(adapter, TRUE);
2281
2282 pci_disable_device(pdev);
2283
2284 /* Request a slot reset. */
2285 return PCI_ERS_RESULT_NEED_RESET;
2286 }
2287
2288 /**
2289 * ixgb_io_slot_reset - called after the pci bus has been reset.
2290 * @pdev pointer to pci device with error
2291 *
2292 * This callback is called after the PCI buss has been reset.
2293 * Basically, this tries to restart the card from scratch.
2294 * This is a shortened version of the device probe/discovery code,
2295 * it resembles the first-half of the ixgb_probe() routine.
2296 */
2297 static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2298 {
2299 struct net_device *netdev = pci_get_drvdata(pdev);
2300 struct ixgb_adapter *adapter = netdev_priv(netdev);
2301
2302 if(pci_enable_device(pdev)) {
2303 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2304 return PCI_ERS_RESULT_DISCONNECT;
2305 }
2306
2307 /* Perform card reset only on one instance of the card */
2308 if (0 != PCI_FUNC (pdev->devfn))
2309 return PCI_ERS_RESULT_RECOVERED;
2310
2311 pci_set_master(pdev);
2312
2313 netif_carrier_off(netdev);
2314 netif_stop_queue(netdev);
2315 ixgb_reset(adapter);
2316
2317 /* Make sure the EEPROM is good */
2318 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2319 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2320 return PCI_ERS_RESULT_DISCONNECT;
2321 }
2322 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2323 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2324
2325 if(!is_valid_ether_addr(netdev->perm_addr)) {
2326 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2327 return PCI_ERS_RESULT_DISCONNECT;
2328 }
2329
2330 return PCI_ERS_RESULT_RECOVERED;
2331 }
2332
2333 /**
2334 * ixgb_io_resume - called when its OK to resume normal operations
2335 * @pdev pointer to pci device with error
2336 *
2337 * The error recovery driver tells us that its OK to resume
2338 * normal operation. Implementation resembles the second-half
2339 * of the ixgb_probe() routine.
2340 */
2341 static void ixgb_io_resume (struct pci_dev *pdev)
2342 {
2343 struct net_device *netdev = pci_get_drvdata(pdev);
2344 struct ixgb_adapter *adapter = netdev_priv(netdev);
2345
2346 pci_set_master(pdev);
2347
2348 if(netif_running(netdev)) {
2349 if(ixgb_up(adapter)) {
2350 printk ("ixgb: can't bring device back up after reset\n");
2351 return;
2352 }
2353 }
2354
2355 netif_device_attach(netdev);
2356 mod_timer(&adapter->watchdog_timer, jiffies);
2357 }
2358
2359 /* ixgb_main.c */
linux 2.6.24.3 for JZ soc