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Added !vmlinux.lds.h to .gitignore because it would otherwise be ignored.
[jz_linux_2.6.24.3.git] / drivers / net / ixgbe / ixgbe_main.c
bloba4265bc1cebb7162fbbdcbc59ffd2590f292fc9e
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
35 #include <linux/in.h>
36 #include <linux/ip.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
43
44 #include "ixgbe.h"
45 #include "ixgbe_common.h"
46
47 char ixgbe_driver_name[] = "ixgbe";
48 static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
50
51 #define DRV_VERSION "1.1.18"
52 const char ixgbe_driver_version[] = DRV_VERSION;
53 static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
55
56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598AF] = &ixgbe_82598AF_info,
58 [board_82598EB] = &ixgbe_82598EB_info,
59 [board_82598AT] = &ixgbe_82598AT_info,
60 };
61
62 /* ixgbe_pci_tbl - PCI Device ID Table
63 *
64 * Wildcard entries (PCI_ANY_ID) should come last
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70 static struct pci_device_id ixgbe_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
72 board_82598AF },
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
74 board_82598AF },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
76 board_82598AT },
77 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
78 board_82598EB },
79
80 /* required last entry */
81 {0, }
82 };
83 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
84
85 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
86 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
89
90 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
91
92
93 #ifdef DEBUG
94 /**
95 * ixgbe_get_hw_dev_name - return device name string
96 * used by hardware layer to print debugging information
97 **/
98 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
99 {
100 struct ixgbe_adapter *adapter = hw->back;
101 struct net_device *netdev = adapter->netdev;
102 return netdev->name;
103 }
104 #endif
105
106 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
107 u8 msix_vector)
108 {
109 u32 ivar, index;
110
111 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
112 index = (int_alloc_entry >> 2) & 0x1F;
113 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
114 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
115 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
116 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
117 }
118
119 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
120 struct ixgbe_tx_buffer
121 *tx_buffer_info)
122 {
123 if (tx_buffer_info->dma) {
124 pci_unmap_page(adapter->pdev,
125 tx_buffer_info->dma,
126 tx_buffer_info->length, PCI_DMA_TODEVICE);
127 tx_buffer_info->dma = 0;
128 }
129 if (tx_buffer_info->skb) {
130 dev_kfree_skb_any(tx_buffer_info->skb);
131 tx_buffer_info->skb = NULL;
132 }
133 /* tx_buffer_info must be completely set up in the transmit path */
134 }
135
136 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
137 struct ixgbe_ring *tx_ring,
138 unsigned int eop,
139 union ixgbe_adv_tx_desc *eop_desc)
140 {
141 /* Detect a transmit hang in hardware, this serializes the
142 * check with the clearing of time_stamp and movement of i */
143 adapter->detect_tx_hung = false;
144 if (tx_ring->tx_buffer_info[eop].dma &&
145 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
146 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
147 /* detected Tx unit hang */
148 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
149 " TDH <%x>\n"
150 " TDT <%x>\n"
151 " next_to_use <%x>\n"
152 " next_to_clean <%x>\n"
153 "tx_buffer_info[next_to_clean]\n"
154 " time_stamp <%lx>\n"
155 " next_to_watch <%x>\n"
156 " jiffies <%lx>\n"
157 " next_to_watch.status <%x>\n",
158 readl(adapter->hw.hw_addr + tx_ring->head),
159 readl(adapter->hw.hw_addr + tx_ring->tail),
160 tx_ring->next_to_use,
161 tx_ring->next_to_clean,
162 tx_ring->tx_buffer_info[eop].time_stamp,
163 eop, jiffies, eop_desc->wb.status);
164 return true;
165 }
166
167 return false;
168 }
169
170 /**
171 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
172 * @adapter: board private structure
173 **/
174 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
175 struct ixgbe_ring *tx_ring)
176 {
177 struct net_device *netdev = adapter->netdev;
178 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
179 struct ixgbe_tx_buffer *tx_buffer_info;
180 unsigned int i, eop;
181 bool cleaned = false;
182 int count = 0;
183
184 i = tx_ring->next_to_clean;
185 eop = tx_ring->tx_buffer_info[i].next_to_watch;
186 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
187 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
188 for (cleaned = false; !cleaned;) {
189 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
190 tx_buffer_info = &tx_ring->tx_buffer_info[i];
191 cleaned = (i == eop);
192
193 tx_ring->stats.bytes += tx_buffer_info->length;
194 ixgbe_unmap_and_free_tx_resource(adapter,
195 tx_buffer_info);
196 tx_desc->wb.status = 0;
197
198 i++;
199 if (i == tx_ring->count)
200 i = 0;
201 }
202
203 tx_ring->stats.packets++;
204
205 eop = tx_ring->tx_buffer_info[i].next_to_watch;
206 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
207
208 /* weight of a sort for tx, avoid endless transmit cleanup */
209 if (count++ >= tx_ring->work_limit)
210 break;
211 }
212
213 tx_ring->next_to_clean = i;
214
215 #define TX_WAKE_THRESHOLD 32
216 spin_lock(&tx_ring->tx_lock);
217
218 if (cleaned && netif_carrier_ok(netdev) &&
219 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD) &&
220 !test_bit(__IXGBE_DOWN, &adapter->state))
221 netif_wake_queue(netdev);
222
223 spin_unlock(&tx_ring->tx_lock);
224
225 if (adapter->detect_tx_hung)
226 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
227 netif_stop_queue(netdev);
228
229 if (count >= tx_ring->work_limit)
230 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
231
232 return cleaned;
233 }
234
235 /**
236 * ixgbe_receive_skb - Send a completed packet up the stack
237 * @adapter: board private structure
238 * @skb: packet to send up
239 * @is_vlan: packet has a VLAN tag
240 * @tag: VLAN tag from descriptor
241 **/
242 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
243 struct sk_buff *skb, bool is_vlan,
244 u16 tag)
245 {
246 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
247 if (adapter->vlgrp && is_vlan)
248 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
249 else
250 netif_receive_skb(skb);
251 } else {
252
253 if (adapter->vlgrp && is_vlan)
254 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
255 else
256 netif_rx(skb);
257 }
258 }
259
260 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
261 u32 status_err,
262 struct sk_buff *skb)
263 {
264 skb->ip_summed = CHECKSUM_NONE;
265
266 /* Ignore Checksum bit is set */
267 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
268 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
269 return;
270 /* TCP/UDP checksum error bit is set */
271 if (status_err & (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE)) {
272 /* let the stack verify checksum errors */
273 adapter->hw_csum_rx_error++;
274 return;
275 }
276 /* It must be a TCP or UDP packet with a valid checksum */
277 if (status_err & (IXGBE_RXD_STAT_L4CS | IXGBE_RXD_STAT_UDPCS))
278 skb->ip_summed = CHECKSUM_UNNECESSARY;
279 adapter->hw_csum_rx_good++;
280 }
281
282 /**
283 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
284 * @adapter: address of board private structure
285 **/
286 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
287 struct ixgbe_ring *rx_ring,
288 int cleaned_count)
289 {
290 struct net_device *netdev = adapter->netdev;
291 struct pci_dev *pdev = adapter->pdev;
292 union ixgbe_adv_rx_desc *rx_desc;
293 struct ixgbe_rx_buffer *rx_buffer_info;
294 struct sk_buff *skb;
295 unsigned int i;
296 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
297
298 i = rx_ring->next_to_use;
299 rx_buffer_info = &rx_ring->rx_buffer_info[i];
300
301 while (cleaned_count--) {
302 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
303
304 if (!rx_buffer_info->page &&
305 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
306 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
307 if (!rx_buffer_info->page) {
308 adapter->alloc_rx_page_failed++;
309 goto no_buffers;
310 }
311 rx_buffer_info->page_dma =
312 pci_map_page(pdev, rx_buffer_info->page,
313 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
314 }
315
316 if (!rx_buffer_info->skb) {
317 skb = netdev_alloc_skb(netdev, bufsz);
318
319 if (!skb) {
320 adapter->alloc_rx_buff_failed++;
321 goto no_buffers;
322 }
323
324 /*
325 * Make buffer alignment 2 beyond a 16 byte boundary
326 * this will result in a 16 byte aligned IP header after
327 * the 14 byte MAC header is removed
328 */
329 skb_reserve(skb, NET_IP_ALIGN);
330
331 rx_buffer_info->skb = skb;
332 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
333 bufsz,
334 PCI_DMA_FROMDEVICE);
335 }
336 /* Refresh the desc even if buffer_addrs didn't change because
337 * each write-back erases this info. */
338 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
339 rx_desc->read.pkt_addr =
340 cpu_to_le64(rx_buffer_info->page_dma);
341 rx_desc->read.hdr_addr =
342 cpu_to_le64(rx_buffer_info->dma);
343 } else {
344 rx_desc->read.pkt_addr =
345 cpu_to_le64(rx_buffer_info->dma);
346 }
347
348 i++;
349 if (i == rx_ring->count)
350 i = 0;
351 rx_buffer_info = &rx_ring->rx_buffer_info[i];
352 }
353 no_buffers:
354 if (rx_ring->next_to_use != i) {
355 rx_ring->next_to_use = i;
356 if (i-- == 0)
357 i = (rx_ring->count - 1);
358
359 /*
360 * Force memory writes to complete before letting h/w
361 * know there are new descriptors to fetch. (Only
362 * applicable for weak-ordered memory model archs,
363 * such as IA-64).
364 */
365 wmb();
366 writel(i, adapter->hw.hw_addr + rx_ring->tail);
367 }
368 }
369
370 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
371 struct ixgbe_ring *rx_ring,
372 int *work_done, int work_to_do)
373 {
374 struct net_device *netdev = adapter->netdev;
375 struct pci_dev *pdev = adapter->pdev;
376 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
377 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
378 struct sk_buff *skb;
379 unsigned int i;
380 u32 upper_len, len, staterr;
381 u16 hdr_info, vlan_tag;
382 bool is_vlan, cleaned = false;
383 int cleaned_count = 0;
384
385 i = rx_ring->next_to_clean;
386 upper_len = 0;
387 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
388 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
389 rx_buffer_info = &rx_ring->rx_buffer_info[i];
390 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
391 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
392
393 while (staterr & IXGBE_RXD_STAT_DD) {
394 if (*work_done >= work_to_do)
395 break;
396 (*work_done)++;
397
398 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
399 hdr_info =
400 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
401 len =
402 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
403 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
404 if (hdr_info & IXGBE_RXDADV_SPH)
405 adapter->rx_hdr_split++;
406 if (len > IXGBE_RX_HDR_SIZE)
407 len = IXGBE_RX_HDR_SIZE;
408 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
409 } else
410 len = le16_to_cpu(rx_desc->wb.upper.length);
411
412 cleaned = true;
413 skb = rx_buffer_info->skb;
414 prefetch(skb->data - NET_IP_ALIGN);
415 rx_buffer_info->skb = NULL;
416
417 if (len && !skb_shinfo(skb)->nr_frags) {
418 pci_unmap_single(pdev, rx_buffer_info->dma,
419 adapter->rx_buf_len + NET_IP_ALIGN,
420 PCI_DMA_FROMDEVICE);
421 skb_put(skb, len);
422 }
423
424 if (upper_len) {
425 pci_unmap_page(pdev, rx_buffer_info->page_dma,
426 PAGE_SIZE, PCI_DMA_FROMDEVICE);
427 rx_buffer_info->page_dma = 0;
428 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
429 rx_buffer_info->page, 0, upper_len);
430 rx_buffer_info->page = NULL;
431
432 skb->len += upper_len;
433 skb->data_len += upper_len;
434 skb->truesize += upper_len;
435 }
436
437 i++;
438 if (i == rx_ring->count)
439 i = 0;
440 next_buffer = &rx_ring->rx_buffer_info[i];
441
442 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
443 prefetch(next_rxd);
444
445 cleaned_count++;
446 if (staterr & IXGBE_RXD_STAT_EOP) {
447 rx_ring->stats.packets++;
448 rx_ring->stats.bytes += skb->len;
449 } else {
450 rx_buffer_info->skb = next_buffer->skb;
451 rx_buffer_info->dma = next_buffer->dma;
452 next_buffer->skb = skb;
453 adapter->non_eop_descs++;
454 goto next_desc;
455 }
456
457 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
458 dev_kfree_skb_irq(skb);
459 goto next_desc;
460 }
461
462 ixgbe_rx_checksum(adapter, staterr, skb);
463 skb->protocol = eth_type_trans(skb, netdev);
464 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
465 netdev->last_rx = jiffies;
466
467 next_desc:
468 rx_desc->wb.upper.status_error = 0;
469
470 /* return some buffers to hardware, one at a time is too slow */
471 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
472 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
473 cleaned_count = 0;
474 }
475
476 /* use prefetched values */
477 rx_desc = next_rxd;
478 rx_buffer_info = next_buffer;
479
480 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
481 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
482 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
483 }
484
485 rx_ring->next_to_clean = i;
486 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
487
488 if (cleaned_count)
489 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
490
491 return cleaned;
492 }
493
494 #define IXGBE_MAX_INTR 10
495 /**
496 * ixgbe_configure_msix - Configure MSI-X hardware
497 * @adapter: board private structure
498 *
499 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
500 * interrupts.
501 **/
502 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
503 {
504 int i, vector = 0;
505
506 for (i = 0; i < adapter->num_tx_queues; i++) {
507 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
508 IXGBE_MSIX_VECTOR(vector));
509 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
510 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
511 vector++;
512 }
513
514 for (i = 0; i < adapter->num_rx_queues; i++) {
515 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
516 IXGBE_MSIX_VECTOR(vector));
517 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
518 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
519 vector++;
520 }
521
522 vector = adapter->num_tx_queues + adapter->num_rx_queues;
523 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
524 IXGBE_MSIX_VECTOR(vector));
525 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
526 }
527
528 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
529 {
530 struct net_device *netdev = data;
531 struct ixgbe_adapter *adapter = netdev_priv(netdev);
532 struct ixgbe_hw *hw = &adapter->hw;
533 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
534
535 if (eicr & IXGBE_EICR_LSC) {
536 adapter->lsc_int++;
537 if (!test_bit(__IXGBE_DOWN, &adapter->state))
538 mod_timer(&adapter->watchdog_timer, jiffies);
539 }
540 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
541
542 return IRQ_HANDLED;
543 }
544
545 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
546 {
547 struct ixgbe_ring *txr = data;
548 struct ixgbe_adapter *adapter = txr->adapter;
549
550 ixgbe_clean_tx_irq(adapter, txr);
551
552 return IRQ_HANDLED;
553 }
554
555 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
556 {
557 struct ixgbe_ring *rxr = data;
558 struct ixgbe_adapter *adapter = rxr->adapter;
559
560 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
561 netif_rx_schedule(adapter->netdev, &adapter->napi);
562 return IRQ_HANDLED;
563 }
564
565 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
566 {
567 struct ixgbe_adapter *adapter = container_of(napi,
568 struct ixgbe_adapter, napi);
569 struct net_device *netdev = adapter->netdev;
570 int work_done = 0;
571 struct ixgbe_ring *rxr = adapter->rx_ring;
572
573 /* Keep link state information with original netdev */
574 if (!netif_carrier_ok(netdev))
575 goto quit_polling;
576
577 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
578
579 /* If no Tx and not enough Rx work done, exit the polling mode */
580 if ((work_done < budget) || !netif_running(netdev)) {
581 quit_polling:
582 netif_rx_complete(netdev, napi);
583 if (!test_bit(__IXGBE_DOWN, &adapter->state))
584 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
585 rxr->eims_value);
586 }
587
588 return work_done;
589 }
590
591 /**
592 * ixgbe_setup_msix - Initialize MSI-X interrupts
593 *
594 * ixgbe_setup_msix allocates MSI-X vectors and requests
595 * interrutps from the kernel.
596 **/
597 static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
598 {
599 struct net_device *netdev = adapter->netdev;
600 int i, int_vector = 0, err = 0;
601 int max_msix_count;
602
603 /* +1 for the LSC interrupt */
604 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
605 adapter->msix_entries = kcalloc(max_msix_count,
606 sizeof(struct msix_entry), GFP_KERNEL);
607 if (!adapter->msix_entries)
608 return -ENOMEM;
609
610 for (i = 0; i < max_msix_count; i++)
611 adapter->msix_entries[i].entry = i;
612
613 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
614 max_msix_count);
615 if (err)
616 goto out;
617
618 for (i = 0; i < adapter->num_tx_queues; i++) {
619 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
620 err = request_irq(adapter->msix_entries[int_vector].vector,
621 &ixgbe_msix_clean_tx,
622 0,
623 adapter->tx_ring[i].name,
624 &(adapter->tx_ring[i]));
625 if (err) {
626 DPRINTK(PROBE, ERR,
627 "request_irq failed for MSIX interrupt "
628 "Error: %d\n", err);
629 goto release_irqs;
630 }
631 adapter->tx_ring[i].eims_value =
632 (1 << IXGBE_MSIX_VECTOR(int_vector));
633 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
634 int_vector++;
635 }
636
637 for (i = 0; i < adapter->num_rx_queues; i++) {
638 if (strlen(netdev->name) < (IFNAMSIZ - 5))
639 sprintf(adapter->rx_ring[i].name,
640 "%s-rx%d", netdev->name, i);
641 else
642 memcpy(adapter->rx_ring[i].name,
643 netdev->name, IFNAMSIZ);
644 err = request_irq(adapter->msix_entries[int_vector].vector,
645 &ixgbe_msix_clean_rx, 0,
646 adapter->rx_ring[i].name,
647 &(adapter->rx_ring[i]));
648 if (err) {
649 DPRINTK(PROBE, ERR,
650 "request_irq failed for MSIX interrupt "
651 "Error: %d\n", err);
652 goto release_irqs;
653 }
654
655 adapter->rx_ring[i].eims_value =
656 (1 << IXGBE_MSIX_VECTOR(int_vector));
657 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
658 int_vector++;
659 }
660
661 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
662 err = request_irq(adapter->msix_entries[int_vector].vector,
663 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
664 if (err) {
665 DPRINTK(PROBE, ERR,
666 "request_irq for msix_lsc failed: %d\n", err);
667 goto release_irqs;
668 }
669
670 /* FIXME: implement netif_napi_remove() instead */
671 adapter->napi.poll = ixgbe_clean_rxonly;
672 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
673 return 0;
674
675 release_irqs:
676 int_vector--;
677 for (; int_vector >= adapter->num_tx_queues; int_vector--)
678 free_irq(adapter->msix_entries[int_vector].vector,
679 &(adapter->rx_ring[int_vector -
680 adapter->num_tx_queues]));
681
682 for (; int_vector >= 0; int_vector--)
683 free_irq(adapter->msix_entries[int_vector].vector,
684 &(adapter->tx_ring[int_vector]));
685 out:
686 kfree(adapter->msix_entries);
687 adapter->msix_entries = NULL;
688 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
689 return err;
690 }
691
692 /**
693 * ixgbe_intr - Interrupt Handler
694 * @irq: interrupt number
695 * @data: pointer to a network interface device structure
696 * @pt_regs: CPU registers structure
697 **/
698 static irqreturn_t ixgbe_intr(int irq, void *data)
699 {
700 struct net_device *netdev = data;
701 struct ixgbe_adapter *adapter = netdev_priv(netdev);
702 struct ixgbe_hw *hw = &adapter->hw;
703 u32 eicr;
704
705 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
706
707 if (!eicr)
708 return IRQ_NONE; /* Not our interrupt */
709
710 if (eicr & IXGBE_EICR_LSC) {
711 adapter->lsc_int++;
712 if (!test_bit(__IXGBE_DOWN, &adapter->state))
713 mod_timer(&adapter->watchdog_timer, jiffies);
714 }
715 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
716 /* Disable interrupts and register for poll. The flush of the
717 * posted write is intentionally left out. */
718 atomic_inc(&adapter->irq_sem);
719 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
720 __netif_rx_schedule(netdev, &adapter->napi);
721 }
722
723 return IRQ_HANDLED;
724 }
725
726 /**
727 * ixgbe_request_irq - initialize interrupts
728 * @adapter: board private structure
729 *
730 * Attempts to configure interrupts using the best available
731 * capabilities of the hardware and kernel.
732 **/
733 static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
734 {
735 struct net_device *netdev = adapter->netdev;
736 int flags, err;
737 irqreturn_t(*handler) (int, void *) = &ixgbe_intr;
738
739 flags = IRQF_SHARED;
740
741 err = ixgbe_setup_msix(adapter);
742 if (!err)
743 goto request_done;
744
745 /*
746 * if we can't do MSI-X, fall through and try MSI
747 * No need to reallocate memory since we're decreasing the number of
748 * queues. We just won't use the other ones, also it is freed correctly
749 * on ixgbe_remove.
750 */
751 *num_rx_queues = 1;
752
753 /* do MSI */
754 err = pci_enable_msi(adapter->pdev);
755 if (!err) {
756 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
757 flags &= ~IRQF_SHARED;
758 handler = &ixgbe_intr;
759 }
760
761 err = request_irq(adapter->pdev->irq, handler, flags,
762 netdev->name, netdev);
763 if (err)
764 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
765
766 request_done:
767 return err;
768 }
769
770 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
771 {
772 struct net_device *netdev = adapter->netdev;
773
774 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
775 int i;
776
777 for (i = 0; i < adapter->num_tx_queues; i++)
778 free_irq(adapter->msix_entries[i].vector,
779 &(adapter->tx_ring[i]));
780 for (i = 0; i < adapter->num_rx_queues; i++)
781 free_irq(adapter->msix_entries[i +
782 adapter->num_tx_queues].vector,
783 &(adapter->rx_ring[i]));
784 i = adapter->num_rx_queues + adapter->num_tx_queues;
785 free_irq(adapter->msix_entries[i].vector, netdev);
786 pci_disable_msix(adapter->pdev);
787 kfree(adapter->msix_entries);
788 adapter->msix_entries = NULL;
789 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
790 return;
791 }
792
793 free_irq(adapter->pdev->irq, netdev);
794 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
795 pci_disable_msi(adapter->pdev);
796 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
797 }
798 }
799
800 /**
801 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
802 * @adapter: board private structure
803 **/
804 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
805 {
806 atomic_inc(&adapter->irq_sem);
807 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
808 IXGBE_WRITE_FLUSH(&adapter->hw);
809 synchronize_irq(adapter->pdev->irq);
810 }
811
812 /**
813 * ixgbe_irq_enable - Enable default interrupt generation settings
814 * @adapter: board private structure
815 **/
816 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
817 {
818 if (atomic_dec_and_test(&adapter->irq_sem)) {
819 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
820 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
821 (IXGBE_EIMS_ENABLE_MASK &
822 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
823 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
824 IXGBE_EIMS_ENABLE_MASK);
825 IXGBE_WRITE_FLUSH(&adapter->hw);
826 }
827 }
828
829 /**
830 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
831 *
832 **/
833 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
834 {
835 int i;
836 struct ixgbe_hw *hw = &adapter->hw;
837
838 if (adapter->rx_eitr)
839 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
840 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
841
842 /* for re-triggering the interrupt in non-NAPI mode */
843 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
844 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
845
846 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
847 for (i = 0; i < adapter->num_tx_queues; i++)
848 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
849 }
850
851 /**
852 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
853 * @adapter: board private structure
854 *
855 * Configure the Tx unit of the MAC after a reset.
856 **/
857 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
858 {
859 u64 tdba;
860 struct ixgbe_hw *hw = &adapter->hw;
861 u32 i, tdlen;
862
863 /* Setup the HW Tx Head and Tail descriptor pointers */
864 for (i = 0; i < adapter->num_tx_queues; i++) {
865 tdba = adapter->tx_ring[i].dma;
866 tdlen = adapter->tx_ring[i].count *
867 sizeof(union ixgbe_adv_tx_desc);
868 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
869 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
870 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
871 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
872 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
873 adapter->tx_ring[i].head = IXGBE_TDH(i);
874 adapter->tx_ring[i].tail = IXGBE_TDT(i);
875 }
876
877 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
878 }
879
880 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
881 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
882
883 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
884 /**
885 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
886 * @adapter: board private structure
887 *
888 * Configure the Rx unit of the MAC after a reset.
889 **/
890 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
891 {
892 u64 rdba;
893 struct ixgbe_hw *hw = &adapter->hw;
894 struct net_device *netdev = adapter->netdev;
895 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
896 u32 rdlen, rxctrl, rxcsum;
897 u32 random[10];
898 u32 reta, mrqc;
899 int i;
900 u32 fctrl, hlreg0;
901 u32 srrctl;
902 u32 pages;
903
904 /* Decide whether to use packet split mode or not */
905 if (netdev->mtu > ETH_DATA_LEN)
906 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
907 else
908 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
909
910 /* Set the RX buffer length according to the mode */
911 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
912 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
913 } else {
914 if (netdev->mtu <= ETH_DATA_LEN)
915 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
916 else
917 adapter->rx_buf_len = ALIGN(max_frame, 1024);
918 }
919
920 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
921 fctrl |= IXGBE_FCTRL_BAM;
922 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
923
924 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
925 if (adapter->netdev->mtu <= ETH_DATA_LEN)
926 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
927 else
928 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
929 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
930
931 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
932
933 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
934 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
935 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
936
937 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
938 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
939 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
940 srrctl |= ((IXGBE_RX_HDR_SIZE <<
941 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
942 IXGBE_SRRCTL_BSIZEHDR_MASK);
943 } else {
944 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
945
946 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
947 srrctl |=
948 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
949 else
950 srrctl |=
951 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
952 }
953 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
954
955 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
956 /* disable receives while setting up the descriptors */
957 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
958 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
959
960 /* Setup the HW Rx Head and Tail Descriptor Pointers and
961 * the Base and Length of the Rx Descriptor Ring */
962 for (i = 0; i < adapter->num_rx_queues; i++) {
963 rdba = adapter->rx_ring[i].dma;
964 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
965 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
966 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
967 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
968 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
969 adapter->rx_ring[i].head = IXGBE_RDH(i);
970 adapter->rx_ring[i].tail = IXGBE_RDT(i);
971 }
972
973 if (adapter->num_rx_queues > 1) {
974 /* Random 40bytes used as random key in RSS hash function */
975 get_random_bytes(&random[0], 40);
976
977 switch (adapter->num_rx_queues) {
978 case 8:
979 case 4:
980 /* Bits [3:0] in each byte refers the Rx queue no */
981 reta = 0x00010203;
982 break;
983 case 2:
984 reta = 0x00010001;
985 break;
986 default:
987 reta = 0x00000000;
988 break;
989 }
990
991 /* Fill out redirection table */
992 for (i = 0; i < 32; i++) {
993 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
994 if (adapter->num_rx_queues > 4) {
995 i++;
996 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
997 0x04050607);
998 }
999 }
1000
1001 /* Fill out hash function seeds */
1002 for (i = 0; i < 10; i++)
1003 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1004
1005 mrqc = IXGBE_MRQC_RSSEN
1006 /* Perform hash on these packet types */
1007 | IXGBE_MRQC_RSS_FIELD_IPV4
1008 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1009 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1010 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1011 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1012 | IXGBE_MRQC_RSS_FIELD_IPV6
1013 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1014 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1015 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1016 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1017
1018 /* Multiqueue and packet checksumming are mutually exclusive. */
1019 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1020 rxcsum |= IXGBE_RXCSUM_PCSD;
1021 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1022 } else {
1023 /* Enable Receive Checksum Offload for TCP and UDP */
1024 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1025 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1026 /* Enable IPv4 payload checksum for UDP fragments
1027 * Must be used in conjunction with packet-split. */
1028 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1029 } else {
1030 /* don't need to clear IPPCSE as it defaults to 0 */
1031 }
1032 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1033 }
1034 /* Enable Receives */
1035 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1036 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1037 }
1038
1039 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1040 struct vlan_group *grp)
1041 {
1042 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1043 u32 ctrl;
1044
1045 ixgbe_irq_disable(adapter);
1046 adapter->vlgrp = grp;
1047
1048 if (grp) {
1049 /* enable VLAN tag insert/strip */
1050 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1051 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1052 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1053 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1054 }
1055
1056 ixgbe_irq_enable(adapter);
1057 }
1058
1059 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1060 {
1061 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1062
1063 /* add VID to filter table */
1064 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1065 }
1066
1067 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1068 {
1069 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1070
1071 ixgbe_irq_disable(adapter);
1072 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1073 ixgbe_irq_enable(adapter);
1074
1075 /* remove VID from filter table */
1076 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1077 }
1078
1079 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1080 {
1081 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1082
1083 if (adapter->vlgrp) {
1084 u16 vid;
1085 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1086 if (!vlan_group_get_device(adapter->vlgrp, vid))
1087 continue;
1088 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1089 }
1090 }
1091 }
1092
1093 /**
1094 * ixgbe_set_multi - Multicast and Promiscuous mode set
1095 * @netdev: network interface device structure
1096 *
1097 * The set_multi entry point is called whenever the multicast address
1098 * list or the network interface flags are updated. This routine is
1099 * responsible for configuring the hardware for proper multicast,
1100 * promiscuous mode, and all-multi behavior.
1101 **/
1102 static void ixgbe_set_multi(struct net_device *netdev)
1103 {
1104 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1105 struct ixgbe_hw *hw = &adapter->hw;
1106 struct dev_mc_list *mc_ptr;
1107 u8 *mta_list;
1108 u32 fctrl;
1109 int i;
1110
1111 /* Check for Promiscuous and All Multicast modes */
1112
1113 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1114
1115 if (netdev->flags & IFF_PROMISC) {
1116 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1117 } else if (netdev->flags & IFF_ALLMULTI) {
1118 fctrl |= IXGBE_FCTRL_MPE;
1119 fctrl &= ~IXGBE_FCTRL_UPE;
1120 } else {
1121 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1122 }
1123
1124 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1125
1126 if (netdev->mc_count) {
1127 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1128 if (!mta_list)
1129 return;
1130
1131 /* Shared function expects packed array of only addresses. */
1132 mc_ptr = netdev->mc_list;
1133
1134 for (i = 0; i < netdev->mc_count; i++) {
1135 if (!mc_ptr)
1136 break;
1137 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1138 ETH_ALEN);
1139 mc_ptr = mc_ptr->next;
1140 }
1141
1142 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1143 kfree(mta_list);
1144 } else {
1145 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1146 }
1147
1148 }
1149
1150 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1151 {
1152 struct net_device *netdev = adapter->netdev;
1153 int i;
1154
1155 ixgbe_set_multi(netdev);
1156
1157 ixgbe_restore_vlan(adapter);
1158
1159 ixgbe_configure_tx(adapter);
1160 ixgbe_configure_rx(adapter);
1161 for (i = 0; i < adapter->num_rx_queues; i++)
1162 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1163 (adapter->rx_ring[i].count - 1));
1164 }
1165
1166 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1167 {
1168 struct net_device *netdev = adapter->netdev;
1169 int i;
1170 u32 gpie = 0;
1171 struct ixgbe_hw *hw = &adapter->hw;
1172 u32 txdctl, rxdctl, mhadd;
1173 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1174
1175 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1176 IXGBE_FLAG_MSI_ENABLED)) {
1177 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1178 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1179 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1180 } else {
1181 /* MSI only */
1182 gpie = (IXGBE_GPIE_EIAME |
1183 IXGBE_GPIE_PBA_SUPPORT);
1184 }
1185 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1186 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1187 }
1188
1189 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1190
1191 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1192 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1193 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1194
1195 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1196 }
1197
1198 for (i = 0; i < adapter->num_tx_queues; i++) {
1199 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1200 txdctl |= IXGBE_TXDCTL_ENABLE;
1201 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1202 }
1203
1204 for (i = 0; i < adapter->num_rx_queues; i++) {
1205 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1206 rxdctl |= IXGBE_RXDCTL_ENABLE;
1207 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1208 }
1209 /* enable all receives */
1210 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1211 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1212 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1213
1214 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1215 ixgbe_configure_msix(adapter);
1216 else
1217 ixgbe_configure_msi_and_legacy(adapter);
1218
1219 clear_bit(__IXGBE_DOWN, &adapter->state);
1220 napi_enable(&adapter->napi);
1221 ixgbe_irq_enable(adapter);
1222
1223 /* bring the link up in the watchdog, this could race with our first
1224 * link up interrupt but shouldn't be a problem */
1225 mod_timer(&adapter->watchdog_timer, jiffies);
1226 return 0;
1227 }
1228
1229 int ixgbe_up(struct ixgbe_adapter *adapter)
1230 {
1231 /* hardware has been reset, we need to reload some things */
1232 ixgbe_configure(adapter);
1233
1234 return ixgbe_up_complete(adapter);
1235 }
1236
1237 void ixgbe_reset(struct ixgbe_adapter *adapter)
1238 {
1239 if (ixgbe_init_hw(&adapter->hw))
1240 DPRINTK(PROBE, ERR, "Hardware Error\n");
1241
1242 /* reprogram the RAR[0] in case user changed it. */
1243 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1244
1245 }
1246
1247 #ifdef CONFIG_PM
1248 static int ixgbe_resume(struct pci_dev *pdev)
1249 {
1250 struct net_device *netdev = pci_get_drvdata(pdev);
1251 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1252 u32 err, num_rx_queues = adapter->num_rx_queues;
1253
1254 pci_set_power_state(pdev, PCI_D0);
1255 pci_restore_state(pdev);
1256 err = pci_enable_device(pdev);
1257 if (err) {
1258 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1259 "suspend\n");
1260 return err;
1261 }
1262 pci_set_master(pdev);
1263
1264 pci_enable_wake(pdev, PCI_D3hot, 0);
1265 pci_enable_wake(pdev, PCI_D3cold, 0);
1266
1267 if (netif_running(netdev)) {
1268 err = ixgbe_request_irq(adapter, &num_rx_queues);
1269 if (err)
1270 return err;
1271 }
1272
1273 ixgbe_reset(adapter);
1274
1275 if (netif_running(netdev))
1276 ixgbe_up(adapter);
1277
1278 netif_device_attach(netdev);
1279
1280 return 0;
1281 }
1282 #endif
1283
1284 /**
1285 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1286 * @adapter: board private structure
1287 * @rx_ring: ring to free buffers from
1288 **/
1289 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1290 struct ixgbe_ring *rx_ring)
1291 {
1292 struct pci_dev *pdev = adapter->pdev;
1293 unsigned long size;
1294 unsigned int i;
1295
1296 /* Free all the Rx ring sk_buffs */
1297
1298 for (i = 0; i < rx_ring->count; i++) {
1299 struct ixgbe_rx_buffer *rx_buffer_info;
1300
1301 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1302 if (rx_buffer_info->dma) {
1303 pci_unmap_single(pdev, rx_buffer_info->dma,
1304 adapter->rx_buf_len,
1305 PCI_DMA_FROMDEVICE);
1306 rx_buffer_info->dma = 0;
1307 }
1308 if (rx_buffer_info->skb) {
1309 dev_kfree_skb(rx_buffer_info->skb);
1310 rx_buffer_info->skb = NULL;
1311 }
1312 if (!rx_buffer_info->page)
1313 continue;
1314 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1315 PCI_DMA_FROMDEVICE);
1316 rx_buffer_info->page_dma = 0;
1317
1318 put_page(rx_buffer_info->page);
1319 rx_buffer_info->page = NULL;
1320 }
1321
1322 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1323 memset(rx_ring->rx_buffer_info, 0, size);
1324
1325 /* Zero out the descriptor ring */
1326 memset(rx_ring->desc, 0, rx_ring->size);
1327
1328 rx_ring->next_to_clean = 0;
1329 rx_ring->next_to_use = 0;
1330
1331 writel(0, adapter->hw.hw_addr + rx_ring->head);
1332 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1333 }
1334
1335 /**
1336 * ixgbe_clean_tx_ring - Free Tx Buffers
1337 * @adapter: board private structure
1338 * @tx_ring: ring to be cleaned
1339 **/
1340 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1341 struct ixgbe_ring *tx_ring)
1342 {
1343 struct ixgbe_tx_buffer *tx_buffer_info;
1344 unsigned long size;
1345 unsigned int i;
1346
1347 /* Free all the Tx ring sk_buffs */
1348
1349 for (i = 0; i < tx_ring->count; i++) {
1350 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1351 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1352 }
1353
1354 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1355 memset(tx_ring->tx_buffer_info, 0, size);
1356
1357 /* Zero out the descriptor ring */
1358 memset(tx_ring->desc, 0, tx_ring->size);
1359
1360 tx_ring->next_to_use = 0;
1361 tx_ring->next_to_clean = 0;
1362
1363 writel(0, adapter->hw.hw_addr + tx_ring->head);
1364 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1365 }
1366
1367 /**
1368 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1369 * @adapter: board private structure
1370 **/
1371 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1372 {
1373 int i;
1374
1375 for (i = 0; i < adapter->num_tx_queues; i++)
1376 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1377 }
1378
1379 /**
1380 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1381 * @adapter: board private structure
1382 **/
1383 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1384 {
1385 int i;
1386
1387 for (i = 0; i < adapter->num_rx_queues; i++)
1388 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1389 }
1390
1391 void ixgbe_down(struct ixgbe_adapter *adapter)
1392 {
1393 struct net_device *netdev = adapter->netdev;
1394 u32 rxctrl;
1395
1396 /* signal that we are down to the interrupt handler */
1397 set_bit(__IXGBE_DOWN, &adapter->state);
1398
1399 /* disable receives */
1400 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1401 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1402 rxctrl & ~IXGBE_RXCTRL_RXEN);
1403
1404 netif_tx_disable(netdev);
1405
1406 /* disable transmits in the hardware */
1407
1408 /* flush both disables */
1409 IXGBE_WRITE_FLUSH(&adapter->hw);
1410 msleep(10);
1411
1412 napi_disable(&adapter->napi);
1413 atomic_set(&adapter->irq_sem, 0);
1414
1415 ixgbe_irq_disable(adapter);
1416
1417 del_timer_sync(&adapter->watchdog_timer);
1418
1419 netif_carrier_off(netdev);
1420 netif_stop_queue(netdev);
1421
1422 ixgbe_reset(adapter);
1423 ixgbe_clean_all_tx_rings(adapter);
1424 ixgbe_clean_all_rx_rings(adapter);
1425
1426 }
1427
1428 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1429 {
1430 struct net_device *netdev = pci_get_drvdata(pdev);
1431 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1432 #ifdef CONFIG_PM
1433 int retval = 0;
1434 #endif
1435
1436 netif_device_detach(netdev);
1437
1438 if (netif_running(netdev)) {
1439 ixgbe_down(adapter);
1440 ixgbe_free_irq(adapter);
1441 }
1442
1443 #ifdef CONFIG_PM
1444 retval = pci_save_state(pdev);
1445 if (retval)
1446 return retval;
1447 #endif
1448
1449 pci_enable_wake(pdev, PCI_D3hot, 0);
1450 pci_enable_wake(pdev, PCI_D3cold, 0);
1451
1452 pci_disable_device(pdev);
1453
1454 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1455
1456 return 0;
1457 }
1458
1459 static void ixgbe_shutdown(struct pci_dev *pdev)
1460 {
1461 ixgbe_suspend(pdev, PMSG_SUSPEND);
1462 }
1463
1464 /**
1465 * ixgbe_clean - NAPI Rx polling callback
1466 * @adapter: board private structure
1467 **/
1468 static int ixgbe_clean(struct napi_struct *napi, int budget)
1469 {
1470 struct ixgbe_adapter *adapter = container_of(napi,
1471 struct ixgbe_adapter, napi);
1472 struct net_device *netdev = adapter->netdev;
1473 int tx_cleaned = 0, work_done = 0;
1474
1475 /* In non-MSIX case, there is no multi-Tx/Rx queue */
1476 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
1477 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1478 budget);
1479
1480 if (tx_cleaned)
1481 work_done = budget;
1482
1483 /* If budget not fully consumed, exit the polling mode */
1484 if (work_done < budget) {
1485 netif_rx_complete(netdev, napi);
1486 ixgbe_irq_enable(adapter);
1487 }
1488
1489 return work_done;
1490 }
1491
1492 /**
1493 * ixgbe_tx_timeout - Respond to a Tx Hang
1494 * @netdev: network interface device structure
1495 **/
1496 static void ixgbe_tx_timeout(struct net_device *netdev)
1497 {
1498 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1499
1500 /* Do the reset outside of interrupt context */
1501 schedule_work(&adapter->reset_task);
1502 }
1503
1504 static void ixgbe_reset_task(struct work_struct *work)
1505 {
1506 struct ixgbe_adapter *adapter;
1507 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1508
1509 adapter->tx_timeout_count++;
1510
1511 ixgbe_down(adapter);
1512 ixgbe_up(adapter);
1513 }
1514
1515 /**
1516 * ixgbe_alloc_queues - Allocate memory for all rings
1517 * @adapter: board private structure to initialize
1518 *
1519 * We allocate one ring per queue at run-time since we don't know the
1520 * number of queues at compile-time. The polling_netdev array is
1521 * intended for Multiqueue, but should work fine with a single queue.
1522 **/
1523 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1524 {
1525 int i;
1526
1527 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1528 sizeof(struct ixgbe_ring), GFP_KERNEL);
1529 if (!adapter->tx_ring)
1530 return -ENOMEM;
1531
1532 for (i = 0; i < adapter->num_tx_queues; i++)
1533 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1534
1535 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1536 sizeof(struct ixgbe_ring), GFP_KERNEL);
1537 if (!adapter->rx_ring) {
1538 kfree(adapter->tx_ring);
1539 return -ENOMEM;
1540 }
1541
1542 for (i = 0; i < adapter->num_rx_queues; i++) {
1543 adapter->rx_ring[i].adapter = adapter;
1544 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1545 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1546 }
1547
1548 return 0;
1549 }
1550
1551 /**
1552 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1553 * @adapter: board private structure to initialize
1554 *
1555 * ixgbe_sw_init initializes the Adapter private data structure.
1556 * Fields are initialized based on PCI device information and
1557 * OS network device settings (MTU size).
1558 **/
1559 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1560 {
1561 struct ixgbe_hw *hw = &adapter->hw;
1562 struct pci_dev *pdev = adapter->pdev;
1563
1564 /* default flow control settings */
1565 hw->fc.original_type = ixgbe_fc_full;
1566 hw->fc.type = ixgbe_fc_full;
1567
1568 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1569 if (hw->mac.ops.reset(hw)) {
1570 dev_err(&pdev->dev, "HW Init failed\n");
1571 return -EIO;
1572 }
1573 if (hw->phy.ops.setup_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1574 false)) {
1575 dev_err(&pdev->dev, "Link Speed setup failed\n");
1576 return -EIO;
1577 }
1578
1579 /* initialize eeprom parameters */
1580 if (ixgbe_init_eeprom(hw)) {
1581 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1582 return -EIO;
1583 }
1584
1585 /* Set the default values */
1586 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1587 adapter->num_tx_queues = 1;
1588 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1589
1590 if (ixgbe_alloc_queues(adapter)) {
1591 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1592 return -ENOMEM;
1593 }
1594
1595 atomic_set(&adapter->irq_sem, 1);
1596 set_bit(__IXGBE_DOWN, &adapter->state);
1597
1598 return 0;
1599 }
1600
1601 /**
1602 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1603 * @adapter: board private structure
1604 * @txdr: tx descriptor ring (for a specific queue) to setup
1605 *
1606 * Return 0 on success, negative on failure
1607 **/
1608 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1609 struct ixgbe_ring *txdr)
1610 {
1611 struct pci_dev *pdev = adapter->pdev;
1612 int size;
1613
1614 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1615 txdr->tx_buffer_info = vmalloc(size);
1616 if (!txdr->tx_buffer_info) {
1617 DPRINTK(PROBE, ERR,
1618 "Unable to allocate memory for the transmit descriptor ring\n");
1619 return -ENOMEM;
1620 }
1621 memset(txdr->tx_buffer_info, 0, size);
1622
1623 /* round up to nearest 4K */
1624 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1625 txdr->size = ALIGN(txdr->size, 4096);
1626
1627 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1628 if (!txdr->desc) {
1629 vfree(txdr->tx_buffer_info);
1630 DPRINTK(PROBE, ERR,
1631 "Memory allocation failed for the tx desc ring\n");
1632 return -ENOMEM;
1633 }
1634
1635 txdr->adapter = adapter;
1636 txdr->next_to_use = 0;
1637 txdr->next_to_clean = 0;
1638 txdr->work_limit = txdr->count;
1639 spin_lock_init(&txdr->tx_lock);
1640
1641 return 0;
1642 }
1643
1644 /**
1645 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1646 * @adapter: board private structure
1647 * @rxdr: rx descriptor ring (for a specific queue) to setup
1648 *
1649 * Returns 0 on success, negative on failure
1650 **/
1651 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1652 struct ixgbe_ring *rxdr)
1653 {
1654 struct pci_dev *pdev = adapter->pdev;
1655 int size, desc_len;
1656
1657 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1658 rxdr->rx_buffer_info = vmalloc(size);
1659 if (!rxdr->rx_buffer_info) {
1660 DPRINTK(PROBE, ERR,
1661 "vmalloc allocation failed for the rx desc ring\n");
1662 return -ENOMEM;
1663 }
1664 memset(rxdr->rx_buffer_info, 0, size);
1665
1666 desc_len = sizeof(union ixgbe_adv_rx_desc);
1667
1668 /* Round up to nearest 4K */
1669 rxdr->size = rxdr->count * desc_len;
1670 rxdr->size = ALIGN(rxdr->size, 4096);
1671
1672 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1673
1674 if (!rxdr->desc) {
1675 DPRINTK(PROBE, ERR,
1676 "Memory allocation failed for the rx desc ring\n");
1677 vfree(rxdr->rx_buffer_info);
1678 return -ENOMEM;
1679 }
1680
1681 rxdr->next_to_clean = 0;
1682 rxdr->next_to_use = 0;
1683 rxdr->adapter = adapter;
1684
1685 return 0;
1686 }
1687
1688 /**
1689 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1690 * @adapter: board private structure
1691 * @tx_ring: Tx descriptor ring for a specific queue
1692 *
1693 * Free all transmit software resources
1694 **/
1695 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1696 struct ixgbe_ring *tx_ring)
1697 {
1698 struct pci_dev *pdev = adapter->pdev;
1699
1700 ixgbe_clean_tx_ring(adapter, tx_ring);
1701
1702 vfree(tx_ring->tx_buffer_info);
1703 tx_ring->tx_buffer_info = NULL;
1704
1705 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1706
1707 tx_ring->desc = NULL;
1708 }
1709
1710 /**
1711 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1712 * @adapter: board private structure
1713 *
1714 * Free all transmit software resources
1715 **/
1716 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1717 {
1718 int i;
1719
1720 for (i = 0; i < adapter->num_tx_queues; i++)
1721 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1722 }
1723
1724 /**
1725 * ixgbe_free_rx_resources - Free Rx Resources
1726 * @adapter: board private structure
1727 * @rx_ring: ring to clean the resources from
1728 *
1729 * Free all receive software resources
1730 **/
1731 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1732 struct ixgbe_ring *rx_ring)
1733 {
1734 struct pci_dev *pdev = adapter->pdev;
1735
1736 ixgbe_clean_rx_ring(adapter, rx_ring);
1737
1738 vfree(rx_ring->rx_buffer_info);
1739 rx_ring->rx_buffer_info = NULL;
1740
1741 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1742
1743 rx_ring->desc = NULL;
1744 }
1745
1746 /**
1747 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1748 * @adapter: board private structure
1749 *
1750 * Free all receive software resources
1751 **/
1752 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1753 {
1754 int i;
1755
1756 for (i = 0; i < adapter->num_rx_queues; i++)
1757 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1758 }
1759
1760 /**
1761 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1762 * (Descriptors) for all queues
1763 * @adapter: board private structure
1764 *
1765 * If this function returns with an error, then it's possible one or
1766 * more of the rings is populated (while the rest are not). It is the
1767 * callers duty to clean those orphaned rings.
1768 *
1769 * Return 0 on success, negative on failure
1770 **/
1771 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1772 {
1773 int i, err = 0;
1774
1775 for (i = 0; i < adapter->num_tx_queues; i++) {
1776 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1777 if (err) {
1778 DPRINTK(PROBE, ERR,
1779 "Allocation for Tx Queue %u failed\n", i);
1780 break;
1781 }
1782 }
1783
1784 return err;
1785 }
1786
1787 /**
1788 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1789 * (Descriptors) for all queues
1790 * @adapter: board private structure
1791 *
1792 * If this function returns with an error, then it's possible one or
1793 * more of the rings is populated (while the rest are not). It is the
1794 * callers duty to clean those orphaned rings.
1795 *
1796 * Return 0 on success, negative on failure
1797 **/
1798
1799 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1800 {
1801 int i, err = 0;
1802
1803 for (i = 0; i < adapter->num_rx_queues; i++) {
1804 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1805 if (err) {
1806 DPRINTK(PROBE, ERR,
1807 "Allocation for Rx Queue %u failed\n", i);
1808 break;
1809 }
1810 }
1811
1812 return err;
1813 }
1814
1815 /**
1816 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1817 * @netdev: network interface device structure
1818 * @new_mtu: new value for maximum frame size
1819 *
1820 * Returns 0 on success, negative on failure
1821 **/
1822 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1823 {
1824 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1825 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1826
1827 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1828 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1829 return -EINVAL;
1830
1831 netdev->mtu = new_mtu;
1832
1833 if (netif_running(netdev)) {
1834 ixgbe_down(adapter);
1835 ixgbe_up(adapter);
1836 }
1837
1838 return 0;
1839 }
1840
1841 /**
1842 * ixgbe_open - Called when a network interface is made active
1843 * @netdev: network interface device structure
1844 *
1845 * Returns 0 on success, negative value on failure
1846 *
1847 * The open entry point is called when a network interface is made
1848 * active by the system (IFF_UP). At this point all resources needed
1849 * for transmit and receive operations are allocated, the interrupt
1850 * handler is registered with the OS, the watchdog timer is started,
1851 * and the stack is notified that the interface is ready.
1852 **/
1853 static int ixgbe_open(struct net_device *netdev)
1854 {
1855 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1856 int err;
1857 u32 ctrl_ext;
1858 u32 num_rx_queues = adapter->num_rx_queues;
1859
1860 /* Let firmware know the driver has taken over */
1861 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1862 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1863 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
1864
1865 try_intr_reinit:
1866 /* allocate transmit descriptors */
1867 err = ixgbe_setup_all_tx_resources(adapter);
1868 if (err)
1869 goto err_setup_tx;
1870
1871 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1872 num_rx_queues = 1;
1873 adapter->num_rx_queues = num_rx_queues;
1874 }
1875
1876 /* allocate receive descriptors */
1877 err = ixgbe_setup_all_rx_resources(adapter);
1878 if (err)
1879 goto err_setup_rx;
1880
1881 ixgbe_configure(adapter);
1882
1883 err = ixgbe_request_irq(adapter, &num_rx_queues);
1884 if (err)
1885 goto err_req_irq;
1886
1887 /* ixgbe_request might have reduced num_rx_queues */
1888 if (num_rx_queues < adapter->num_rx_queues) {
1889 /* We didn't get MSI-X, so we need to release everything,
1890 * set our Rx queue count to num_rx_queues, and redo the
1891 * whole init process.
1892 */
1893 ixgbe_free_irq(adapter);
1894 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1895 pci_disable_msi(adapter->pdev);
1896 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1897 }
1898 ixgbe_free_all_rx_resources(adapter);
1899 ixgbe_free_all_tx_resources(adapter);
1900 adapter->num_rx_queues = num_rx_queues;
1901
1902 /* Reset the hardware, and start over. */
1903 ixgbe_reset(adapter);
1904
1905 goto try_intr_reinit;
1906 }
1907
1908 err = ixgbe_up_complete(adapter);
1909 if (err)
1910 goto err_up;
1911
1912 return 0;
1913
1914 err_up:
1915 ixgbe_free_irq(adapter);
1916 err_req_irq:
1917 ixgbe_free_all_rx_resources(adapter);
1918 err_setup_rx:
1919 ixgbe_free_all_tx_resources(adapter);
1920 err_setup_tx:
1921 ixgbe_reset(adapter);
1922
1923 return err;
1924 }
1925
1926 /**
1927 * ixgbe_close - Disables a network interface
1928 * @netdev: network interface device structure
1929 *
1930 * Returns 0, this is not allowed to fail
1931 *
1932 * The close entry point is called when an interface is de-activated
1933 * by the OS. The hardware is still under the drivers control, but
1934 * needs to be disabled. A global MAC reset is issued to stop the
1935 * hardware, and all transmit and receive resources are freed.
1936 **/
1937 static int ixgbe_close(struct net_device *netdev)
1938 {
1939 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1940 u32 ctrl_ext;
1941
1942 ixgbe_down(adapter);
1943 ixgbe_free_irq(adapter);
1944
1945 ixgbe_free_all_tx_resources(adapter);
1946 ixgbe_free_all_rx_resources(adapter);
1947
1948 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1949 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1950 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
1951
1952 return 0;
1953 }
1954
1955 /**
1956 * ixgbe_update_stats - Update the board statistics counters.
1957 * @adapter: board private structure
1958 **/
1959 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
1960 {
1961 struct ixgbe_hw *hw = &adapter->hw;
1962 u64 good_rx, missed_rx, bprc;
1963
1964 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1965 good_rx = IXGBE_READ_REG(hw, IXGBE_GPRC);
1966 missed_rx = IXGBE_READ_REG(hw, IXGBE_MPC(0));
1967 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(1));
1968 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(2));
1969 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(3));
1970 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(4));
1971 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(5));
1972 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(6));
1973 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(7));
1974 adapter->stats.gprc += (good_rx - missed_rx);
1975
1976 adapter->stats.mpc[0] += missed_rx;
1977 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
1978 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
1979 adapter->stats.bprc += bprc;
1980 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
1981 adapter->stats.mprc -= bprc;
1982 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
1983 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
1984 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
1985 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
1986 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
1987 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
1988 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
1989
1990 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
1991 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
1992 adapter->stats.lxontxc += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
1993 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
1994 adapter->stats.lxofftxc += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
1995 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
1996 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
1997 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
1998 adapter->stats.rnbc[0] += IXGBE_READ_REG(hw, IXGBE_RNBC(0));
1999 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2000 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2001 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2002 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2003 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2004 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2005 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2006 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2007 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2008 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2009 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2010 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2011 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2012
2013 /* Fill out the OS statistics structure */
2014 adapter->net_stats.rx_packets = adapter->stats.gprc;
2015 adapter->net_stats.tx_packets = adapter->stats.gptc;
2016 adapter->net_stats.rx_bytes = adapter->stats.gorc;
2017 adapter->net_stats.tx_bytes = adapter->stats.gotc;
2018 adapter->net_stats.multicast = adapter->stats.mprc;
2019
2020 /* Rx Errors */
2021 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2022 adapter->stats.rlec;
2023 adapter->net_stats.rx_dropped = 0;
2024 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2025 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2026 adapter->net_stats.rx_missed_errors = adapter->stats.mpc[0];
2027
2028 }
2029
2030 /**
2031 * ixgbe_watchdog - Timer Call-back
2032 * @data: pointer to adapter cast into an unsigned long
2033 **/
2034 static void ixgbe_watchdog(unsigned long data)
2035 {
2036 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2037 struct net_device *netdev = adapter->netdev;
2038 bool link_up;
2039 u32 link_speed = 0;
2040
2041 adapter->hw.phy.ops.check(&adapter->hw, &(link_speed), &link_up);
2042
2043 if (link_up) {
2044 if (!netif_carrier_ok(netdev)) {
2045 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2046 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2047 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2048 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2049 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2050 "Flow Control: %s\n",
2051 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2052 "10 Gbps" :
2053 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2054 "1 Gpbs" : "unknown speed")),
2055 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2056 (FLOW_RX ? "RX" :
2057 (FLOW_TX ? "TX" : "None"))));
2058
2059 netif_carrier_on(netdev);
2060 netif_wake_queue(netdev);
2061 } else {
2062 /* Force detection of hung controller */
2063 adapter->detect_tx_hung = true;
2064 }
2065 } else {
2066 if (netif_carrier_ok(netdev)) {
2067 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2068 netif_carrier_off(netdev);
2069 netif_stop_queue(netdev);
2070 }
2071 }
2072
2073 ixgbe_update_stats(adapter);
2074
2075 /* Reset the timer */
2076 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2077 mod_timer(&adapter->watchdog_timer,
2078 round_jiffies(jiffies + 2 * HZ));
2079 }
2080
2081 #define IXGBE_MAX_TXD_PWR 14
2082 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
2083
2084 /* Tx Descriptors needed, worst case */
2085 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
2086 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
2087 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
2088 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
2089
2090 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2091 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2092 u32 tx_flags, u8 *hdr_len)
2093 {
2094 struct ixgbe_adv_tx_context_desc *context_desc;
2095 unsigned int i;
2096 int err;
2097 struct ixgbe_tx_buffer *tx_buffer_info;
2098 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2099 u32 mss_l4len_idx = 0, l4len;
2100 *hdr_len = 0;
2101
2102 if (skb_is_gso(skb)) {
2103 if (skb_header_cloned(skb)) {
2104 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2105 if (err)
2106 return err;
2107 }
2108 l4len = tcp_hdrlen(skb);
2109 *hdr_len += l4len;
2110
2111 if (skb->protocol == ntohs(ETH_P_IP)) {
2112 struct iphdr *iph = ip_hdr(skb);
2113 iph->tot_len = 0;
2114 iph->check = 0;
2115 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2116 iph->daddr, 0,
2117 IPPROTO_TCP,
2118 0);
2119 adapter->hw_tso_ctxt++;
2120 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2121 ipv6_hdr(skb)->payload_len = 0;
2122 tcp_hdr(skb)->check =
2123 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2124 &ipv6_hdr(skb)->daddr,
2125 0, IPPROTO_TCP, 0);
2126 adapter->hw_tso6_ctxt++;
2127 }
2128
2129 i = tx_ring->next_to_use;
2130
2131 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2132 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2133
2134 /* VLAN MACLEN IPLEN */
2135 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2136 vlan_macip_lens |=
2137 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2138 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2139 IXGBE_ADVTXD_MACLEN_SHIFT);
2140 *hdr_len += skb_network_offset(skb);
2141 vlan_macip_lens |=
2142 (skb_transport_header(skb) - skb_network_header(skb));
2143 *hdr_len +=
2144 (skb_transport_header(skb) - skb_network_header(skb));
2145 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2146 context_desc->seqnum_seed = 0;
2147
2148 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2149 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2150 IXGBE_ADVTXD_DTYP_CTXT);
2151
2152 if (skb->protocol == ntohs(ETH_P_IP))
2153 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2154 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2155 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2156
2157 /* MSS L4LEN IDX */
2158 mss_l4len_idx |=
2159 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2160 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2161 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2162
2163 tx_buffer_info->time_stamp = jiffies;
2164 tx_buffer_info->next_to_watch = i;
2165
2166 i++;
2167 if (i == tx_ring->count)
2168 i = 0;
2169 tx_ring->next_to_use = i;
2170
2171 return true;
2172 }
2173 return false;
2174 }
2175
2176 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2177 struct ixgbe_ring *tx_ring,
2178 struct sk_buff *skb, u32 tx_flags)
2179 {
2180 struct ixgbe_adv_tx_context_desc *context_desc;
2181 unsigned int i;
2182 struct ixgbe_tx_buffer *tx_buffer_info;
2183 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2184
2185 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2186 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2187 i = tx_ring->next_to_use;
2188 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2189 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2190
2191 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2192 vlan_macip_lens |=
2193 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2194 vlan_macip_lens |= (skb_network_offset(skb) <<
2195 IXGBE_ADVTXD_MACLEN_SHIFT);
2196 if (skb->ip_summed == CHECKSUM_PARTIAL)
2197 vlan_macip_lens |= (skb_transport_header(skb) -
2198 skb_network_header(skb));
2199
2200 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2201 context_desc->seqnum_seed = 0;
2202
2203 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2204 IXGBE_ADVTXD_DTYP_CTXT);
2205
2206 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2207 if (skb->protocol == ntohs(ETH_P_IP))
2208 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2209
2210 if (skb->sk->sk_protocol == IPPROTO_TCP)
2211 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2212 }
2213
2214 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2215 context_desc->mss_l4len_idx = 0;
2216
2217 tx_buffer_info->time_stamp = jiffies;
2218 tx_buffer_info->next_to_watch = i;
2219 adapter->hw_csum_tx_good++;
2220 i++;
2221 if (i == tx_ring->count)
2222 i = 0;
2223 tx_ring->next_to_use = i;
2224
2225 return true;
2226 }
2227 return false;
2228 }
2229
2230 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2231 struct ixgbe_ring *tx_ring,
2232 struct sk_buff *skb, unsigned int first)
2233 {
2234 struct ixgbe_tx_buffer *tx_buffer_info;
2235 unsigned int len = skb->len;
2236 unsigned int offset = 0, size, count = 0, i;
2237 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2238 unsigned int f;
2239
2240 len -= skb->data_len;
2241
2242 i = tx_ring->next_to_use;
2243
2244 while (len) {
2245 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2246 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2247
2248 tx_buffer_info->length = size;
2249 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2250 skb->data + offset,
2251 size, PCI_DMA_TODEVICE);
2252 tx_buffer_info->time_stamp = jiffies;
2253 tx_buffer_info->next_to_watch = i;
2254
2255 len -= size;
2256 offset += size;
2257 count++;
2258 i++;
2259 if (i == tx_ring->count)
2260 i = 0;
2261 }
2262
2263 for (f = 0; f < nr_frags; f++) {
2264 struct skb_frag_struct *frag;
2265
2266 frag = &skb_shinfo(skb)->frags[f];
2267 len = frag->size;
2268 offset = frag->page_offset;
2269
2270 while (len) {
2271 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2272 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2273
2274 tx_buffer_info->length = size;
2275 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2276 frag->page,
2277 offset,
2278 size, PCI_DMA_TODEVICE);
2279 tx_buffer_info->time_stamp = jiffies;
2280 tx_buffer_info->next_to_watch = i;
2281
2282 len -= size;
2283 offset += size;
2284 count++;
2285 i++;
2286 if (i == tx_ring->count)
2287 i = 0;
2288 }
2289 }
2290 if (i == 0)
2291 i = tx_ring->count - 1;
2292 else
2293 i = i - 1;
2294 tx_ring->tx_buffer_info[i].skb = skb;
2295 tx_ring->tx_buffer_info[first].next_to_watch = i;
2296
2297 return count;
2298 }
2299
2300 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2301 struct ixgbe_ring *tx_ring,
2302 int tx_flags, int count, u32 paylen, u8 hdr_len)
2303 {
2304 union ixgbe_adv_tx_desc *tx_desc = NULL;
2305 struct ixgbe_tx_buffer *tx_buffer_info;
2306 u32 olinfo_status = 0, cmd_type_len = 0;
2307 unsigned int i;
2308 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2309
2310 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2311
2312 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2313
2314 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2315 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2316
2317 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2318 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2319
2320 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2321 IXGBE_ADVTXD_POPTS_SHIFT;
2322
2323 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2324 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2325 IXGBE_ADVTXD_POPTS_SHIFT;
2326
2327 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2328 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2329 IXGBE_ADVTXD_POPTS_SHIFT;
2330
2331 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2332
2333 i = tx_ring->next_to_use;
2334 while (count--) {
2335 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2336 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2337 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2338 tx_desc->read.cmd_type_len =
2339 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2340 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2341
2342 i++;
2343 if (i == tx_ring->count)
2344 i = 0;
2345 }
2346
2347 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2348
2349 /*
2350 * Force memory writes to complete before letting h/w
2351 * know there are new descriptors to fetch. (Only
2352 * applicable for weak-ordered memory model archs,
2353 * such as IA-64).
2354 */
2355 wmb();
2356
2357 tx_ring->next_to_use = i;
2358 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2359 }
2360
2361 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2362 {
2363 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2364 struct ixgbe_ring *tx_ring;
2365 unsigned int len = skb->len;
2366 unsigned int first;
2367 unsigned int tx_flags = 0;
2368 unsigned long flags = 0;
2369 u8 hdr_len;
2370 int tso;
2371 unsigned int mss = 0;
2372 int count = 0;
2373 unsigned int f;
2374 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2375 len -= skb->data_len;
2376
2377 tx_ring = adapter->tx_ring;
2378
2379 if (skb->len <= 0) {
2380 dev_kfree_skb(skb);
2381 return NETDEV_TX_OK;
2382 }
2383 mss = skb_shinfo(skb)->gso_size;
2384
2385 if (mss)
2386 count++;
2387 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2388 count++;
2389
2390 count += TXD_USE_COUNT(len);
2391 for (f = 0; f < nr_frags; f++)
2392 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2393
2394 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2395 if (IXGBE_DESC_UNUSED(tx_ring) < (count + 2)) {
2396 adapter->tx_busy++;
2397 netif_stop_queue(netdev);
2398 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2399 return NETDEV_TX_BUSY;
2400 }
2401 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2402 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2403 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2404 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2405 }
2406
2407 if (skb->protocol == ntohs(ETH_P_IP))
2408 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2409 first = tx_ring->next_to_use;
2410 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2411 if (tso < 0) {
2412 dev_kfree_skb_any(skb);
2413 return NETDEV_TX_OK;
2414 }
2415
2416 if (tso)
2417 tx_flags |= IXGBE_TX_FLAGS_TSO;
2418 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2419 (skb->ip_summed == CHECKSUM_PARTIAL))
2420 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2421
2422 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2423 ixgbe_tx_map(adapter, tx_ring, skb, first),
2424 skb->len, hdr_len);
2425
2426 netdev->trans_start = jiffies;
2427
2428 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2429 /* Make sure there is space in the ring for the next send. */
2430 if (IXGBE_DESC_UNUSED(tx_ring) < DESC_NEEDED)
2431 netif_stop_queue(netdev);
2432 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2433
2434 return NETDEV_TX_OK;
2435 }
2436
2437 /**
2438 * ixgbe_get_stats - Get System Network Statistics
2439 * @netdev: network interface device structure
2440 *
2441 * Returns the address of the device statistics structure.
2442 * The statistics are actually updated from the timer callback.
2443 **/
2444 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2445 {
2446 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2447
2448 /* only return the current stats */
2449 return &adapter->net_stats;
2450 }
2451
2452 /**
2453 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2454 * @netdev: network interface device structure
2455 * @p: pointer to an address structure
2456 *
2457 * Returns 0 on success, negative on failure
2458 **/
2459 static int ixgbe_set_mac(struct net_device *netdev, void *p)
2460 {
2461 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2462 struct sockaddr *addr = p;
2463
2464 if (!is_valid_ether_addr(addr->sa_data))
2465 return -EADDRNOTAVAIL;
2466
2467 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2468 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2469
2470 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2471
2472 return 0;
2473 }
2474
2475 #ifdef CONFIG_NET_POLL_CONTROLLER
2476 /*
2477 * Polling 'interrupt' - used by things like netconsole to send skbs
2478 * without having to re-enable interrupts. It's not called while
2479 * the interrupt routine is executing.
2480 */
2481 static void ixgbe_netpoll(struct net_device *netdev)
2482 {
2483 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2484
2485 disable_irq(adapter->pdev->irq);
2486 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2487 ixgbe_intr(adapter->pdev->irq, netdev);
2488 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2489 enable_irq(adapter->pdev->irq);
2490 }
2491 #endif
2492
2493 /**
2494 * ixgbe_probe - Device Initialization Routine
2495 * @pdev: PCI device information struct
2496 * @ent: entry in ixgbe_pci_tbl
2497 *
2498 * Returns 0 on success, negative on failure
2499 *
2500 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2501 * The OS initialization, configuring of the adapter private structure,
2502 * and a hardware reset occur.
2503 **/
2504 static int __devinit ixgbe_probe(struct pci_dev *pdev,
2505 const struct pci_device_id *ent)
2506 {
2507 struct net_device *netdev;
2508 struct ixgbe_adapter *adapter = NULL;
2509 struct ixgbe_hw *hw;
2510 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2511 unsigned long mmio_start, mmio_len;
2512 static int cards_found;
2513 int i, err, pci_using_dac;
2514 u16 link_status, link_speed, link_width;
2515 u32 part_num;
2516
2517 err = pci_enable_device(pdev);
2518 if (err)
2519 return err;
2520
2521 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2522 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2523 pci_using_dac = 1;
2524 } else {
2525 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2526 if (err) {
2527 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2528 if (err) {
2529 dev_err(&pdev->dev, "No usable DMA "
2530 "configuration, aborting\n");
2531 goto err_dma;
2532 }
2533 }
2534 pci_using_dac = 0;
2535 }
2536
2537 err = pci_request_regions(pdev, ixgbe_driver_name);
2538 if (err) {
2539 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2540 goto err_pci_reg;
2541 }
2542
2543 pci_set_master(pdev);
2544
2545 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2546 if (!netdev) {
2547 err = -ENOMEM;
2548 goto err_alloc_etherdev;
2549 }
2550
2551 SET_NETDEV_DEV(netdev, &pdev->dev);
2552
2553 pci_set_drvdata(pdev, netdev);
2554 adapter = netdev_priv(netdev);
2555
2556 adapter->netdev = netdev;
2557 adapter->pdev = pdev;
2558 hw = &adapter->hw;
2559 hw->back = adapter;
2560 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2561
2562 mmio_start = pci_resource_start(pdev, 0);
2563 mmio_len = pci_resource_len(pdev, 0);
2564
2565 hw->hw_addr = ioremap(mmio_start, mmio_len);
2566 if (!hw->hw_addr) {
2567 err = -EIO;
2568 goto err_ioremap;
2569 }
2570
2571 for (i = 1; i <= 5; i++) {
2572 if (pci_resource_len(pdev, i) == 0)
2573 continue;
2574 }
2575
2576 netdev->open = &ixgbe_open;
2577 netdev->stop = &ixgbe_close;
2578 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2579 netdev->get_stats = &ixgbe_get_stats;
2580 netdev->set_multicast_list = &ixgbe_set_multi;
2581 netdev->set_mac_address = &ixgbe_set_mac;
2582 netdev->change_mtu = &ixgbe_change_mtu;
2583 ixgbe_set_ethtool_ops(netdev);
2584 netdev->tx_timeout = &ixgbe_tx_timeout;
2585 netdev->watchdog_timeo = 5 * HZ;
2586 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2587 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2588 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2589 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2590 #ifdef CONFIG_NET_POLL_CONTROLLER
2591 netdev->poll_controller = ixgbe_netpoll;
2592 #endif
2593 strcpy(netdev->name, pci_name(pdev));
2594
2595 netdev->mem_start = mmio_start;
2596 netdev->mem_end = mmio_start + mmio_len;
2597
2598 adapter->bd_number = cards_found;
2599
2600 /* PCI config space info */
2601 hw->vendor_id = pdev->vendor;
2602 hw->device_id = pdev->device;
2603 hw->revision_id = pdev->revision;
2604 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2605 hw->subsystem_device_id = pdev->subsystem_device;
2606
2607 /* Setup hw api */
2608 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
2609 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
2610
2611 err = ii->get_invariants(hw);
2612 if (err)
2613 goto err_hw_init;
2614
2615 /* setup the private structure */
2616 err = ixgbe_sw_init(adapter);
2617 if (err)
2618 goto err_sw_init;
2619
2620 netdev->features = NETIF_F_SG |
2621 NETIF_F_HW_CSUM |
2622 NETIF_F_HW_VLAN_TX |
2623 NETIF_F_HW_VLAN_RX |
2624 NETIF_F_HW_VLAN_FILTER;
2625
2626 netdev->features |= NETIF_F_TSO;
2627
2628 netdev->features |= NETIF_F_TSO6;
2629 if (pci_using_dac)
2630 netdev->features |= NETIF_F_HIGHDMA;
2631
2632
2633 /* make sure the EEPROM is good */
2634 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2635 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2636 err = -EIO;
2637 goto err_eeprom;
2638 }
2639
2640 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2641 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2642
2643 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2644 err = -EIO;
2645 goto err_eeprom;
2646 }
2647
2648 init_timer(&adapter->watchdog_timer);
2649 adapter->watchdog_timer.function = &ixgbe_watchdog;
2650 adapter->watchdog_timer.data = (unsigned long)adapter;
2651
2652 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2653
2654 /* initialize default flow control settings */
2655 hw->fc.original_type = ixgbe_fc_full;
2656 hw->fc.type = ixgbe_fc_full;
2657 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2658 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2659 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2660
2661 /* Interrupt Throttle Rate */
2662 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2663 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2664
2665 /* print bus type/speed/width info */
2666 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2667 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2668 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2669 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2670 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2671 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2672 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2673 "Unknown"),
2674 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2675 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2676 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2677 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2678 "Unknown"),
2679 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2680 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2681 ixgbe_read_part_num(hw, &part_num);
2682 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2683 hw->mac.type, hw->phy.type,
2684 (part_num >> 8), (part_num & 0xff));
2685
2686 /* reset the hardware with the new settings */
2687 ixgbe_start_hw(hw);
2688
2689 netif_carrier_off(netdev);
2690 netif_stop_queue(netdev);
2691
2692 strcpy(netdev->name, "eth%d");
2693 err = register_netdev(netdev);
2694 if (err)
2695 goto err_register;
2696
2697
2698 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2699 cards_found++;
2700 return 0;
2701
2702 err_register:
2703 err_hw_init:
2704 err_sw_init:
2705 err_eeprom:
2706 iounmap(hw->hw_addr);
2707 err_ioremap:
2708 free_netdev(netdev);
2709 err_alloc_etherdev:
2710 pci_release_regions(pdev);
2711 err_pci_reg:
2712 err_dma:
2713 pci_disable_device(pdev);
2714 return err;
2715 }
2716
2717 /**
2718 * ixgbe_remove - Device Removal Routine
2719 * @pdev: PCI device information struct
2720 *
2721 * ixgbe_remove is called by the PCI subsystem to alert the driver
2722 * that it should release a PCI device. The could be caused by a
2723 * Hot-Plug event, or because the driver is going to be removed from
2724 * memory.
2725 **/
2726 static void __devexit ixgbe_remove(struct pci_dev *pdev)
2727 {
2728 struct net_device *netdev = pci_get_drvdata(pdev);
2729 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2730
2731 set_bit(__IXGBE_DOWN, &adapter->state);
2732 del_timer_sync(&adapter->watchdog_timer);
2733
2734 flush_scheduled_work();
2735
2736 unregister_netdev(netdev);
2737
2738 kfree(adapter->tx_ring);
2739 kfree(adapter->rx_ring);
2740
2741 iounmap(adapter->hw.hw_addr);
2742 pci_release_regions(pdev);
2743
2744 free_netdev(netdev);
2745
2746 pci_disable_device(pdev);
2747 }
2748
2749 /**
2750 * ixgbe_io_error_detected - called when PCI error is detected
2751 * @pdev: Pointer to PCI device
2752 * @state: The current pci connection state
2753 *
2754 * This function is called after a PCI bus error affecting
2755 * this device has been detected.
2756 */
2757 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2758 pci_channel_state_t state)
2759 {
2760 struct net_device *netdev = pci_get_drvdata(pdev);
2761 struct ixgbe_adapter *adapter = netdev->priv;
2762
2763 netif_device_detach(netdev);
2764
2765 if (netif_running(netdev))
2766 ixgbe_down(adapter);
2767 pci_disable_device(pdev);
2768
2769 /* Request a slot slot reset. */
2770 return PCI_ERS_RESULT_NEED_RESET;
2771 }
2772
2773 /**
2774 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2775 * @pdev: Pointer to PCI device
2776 *
2777 * Restart the card from scratch, as if from a cold-boot.
2778 */
2779 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2780 {
2781 struct net_device *netdev = pci_get_drvdata(pdev);
2782 struct ixgbe_adapter *adapter = netdev->priv;
2783
2784 if (pci_enable_device(pdev)) {
2785 DPRINTK(PROBE, ERR,
2786 "Cannot re-enable PCI device after reset.\n");
2787 return PCI_ERS_RESULT_DISCONNECT;
2788 }
2789 pci_set_master(pdev);
2790
2791 pci_enable_wake(pdev, PCI_D3hot, 0);
2792 pci_enable_wake(pdev, PCI_D3cold, 0);
2793
2794 ixgbe_reset(adapter);
2795
2796 return PCI_ERS_RESULT_RECOVERED;
2797 }
2798
2799 /**
2800 * ixgbe_io_resume - called when traffic can start flowing again.
2801 * @pdev: Pointer to PCI device
2802 *
2803 * This callback is called when the error recovery driver tells us that
2804 * its OK to resume normal operation.
2805 */
2806 static void ixgbe_io_resume(struct pci_dev *pdev)
2807 {
2808 struct net_device *netdev = pci_get_drvdata(pdev);
2809 struct ixgbe_adapter *adapter = netdev->priv;
2810
2811 if (netif_running(netdev)) {
2812 if (ixgbe_up(adapter)) {
2813 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2814 return;
2815 }
2816 }
2817
2818 netif_device_attach(netdev);
2819
2820 }
2821
2822 static struct pci_error_handlers ixgbe_err_handler = {
2823 .error_detected = ixgbe_io_error_detected,
2824 .slot_reset = ixgbe_io_slot_reset,
2825 .resume = ixgbe_io_resume,
2826 };
2827
2828 static struct pci_driver ixgbe_driver = {
2829 .name = ixgbe_driver_name,
2830 .id_table = ixgbe_pci_tbl,
2831 .probe = ixgbe_probe,
2832 .remove = __devexit_p(ixgbe_remove),
2833 #ifdef CONFIG_PM
2834 .suspend = ixgbe_suspend,
2835 .resume = ixgbe_resume,
2836 #endif
2837 .shutdown = ixgbe_shutdown,
2838 .err_handler = &ixgbe_err_handler
2839 };
2840
2841 /**
2842 * ixgbe_init_module - Driver Registration Routine
2843 *
2844 * ixgbe_init_module is the first routine called when the driver is
2845 * loaded. All it does is register with the PCI subsystem.
2846 **/
2847 static int __init ixgbe_init_module(void)
2848 {
2849 int ret;
2850 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
2851 ixgbe_driver_string, ixgbe_driver_version);
2852
2853 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
2854
2855 ret = pci_register_driver(&ixgbe_driver);
2856 return ret;
2857 }
2858 module_init(ixgbe_init_module);
2859
2860 /**
2861 * ixgbe_exit_module - Driver Exit Cleanup Routine
2862 *
2863 * ixgbe_exit_module is called just before the driver is removed
2864 * from memory.
2865 **/
2866 static void __exit ixgbe_exit_module(void)
2867 {
2868 pci_unregister_driver(&ixgbe_driver);
2869 }
2870 module_exit(ixgbe_exit_module);
2871
2872 /* ixgbe_main.c */
linux 2.6.24.3 for JZ soc