to make u-boot work for fat32 filesystem
[jz_uboot.git] / board / a3000 / a3000.c
blobab707ae9703c3e9d64f14e28f36d78ebcf07d615
1 /*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
5 * Modified during 2003 by
6 * Ken Chou, kchou@ieee.org
8 * See file CREDITS for list of people who contributed to this
9 * project.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
27 #include <common.h>
28 #include <mpc824x.h>
29 #include <pci.h>
31 int checkboard (void)
33 ulong busfreq = get_bus_freq(0);
34 char buf[32];
36 printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
37 return 0;
41 long int initdram (int board_type)
43 long size;
44 long new_bank0_end;
45 long mear1;
46 long emear1;
48 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
50 new_bank0_end = size - 1;
51 mear1 = mpc824x_mpc107_getreg(MEAR1);
52 emear1 = mpc824x_mpc107_getreg(EMEAR1);
53 mear1 = (mear1 & 0xFFFFFF00) |
54 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
55 emear1 = (emear1 & 0xFFFFFF00) |
56 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
57 mpc824x_mpc107_setreg(MEAR1, mear1);
58 mpc824x_mpc107_setreg(EMEAR1, emear1);
60 return (size);
64 * Initialize PCI Devices
66 #ifndef CONFIG_PCI_PNP
67 static struct pci_config_table pci_a3000_config_table[] = {
68 /* vendor, device, class */
69 /* bus, dev, func */
70 { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID,
71 PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, /* dp83815 eth0 divice */
72 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
73 PCI_ENET0_MEMADDR,
74 PCI_COMMAND_IO |
75 PCI_COMMAND_MEMORY |
76 PCI_COMMAND_MASTER }},
77 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
78 PCI_ANY_ID, 0x14, PCI_ANY_ID, /* PCI slot1 */
79 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
80 PCI_ENET1_MEMADDR,
81 PCI_COMMAND_IO |
82 PCI_COMMAND_MEMORY |
83 PCI_COMMAND_MASTER }},
84 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
85 PCI_ANY_ID, 0x15, PCI_ANY_ID, /* PCI slot2 */
86 pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
87 PCI_ENET2_MEMADDR,
88 PCI_COMMAND_IO |
89 PCI_COMMAND_MEMORY |
90 PCI_COMMAND_MASTER }},
91 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
92 PCI_ANY_ID, 0x16, PCI_ANY_ID, /* PCI slot3 */
93 pci_cfgfunc_config_device, { PCI_ENET3_IOADDR,
94 PCI_ENET3_MEMADDR,
95 PCI_COMMAND_IO |
96 PCI_COMMAND_MEMORY |
97 PCI_COMMAND_MASTER }},
98 { }
100 #endif
102 struct pci_controller hose = {
103 #ifndef CONFIG_PCI_PNP
104 config_table: pci_a3000_config_table,
105 #endif
108 void pci_init_board(void)
110 pci_mpc824x_init(&hose);