3 * Denis Peter, d.peter@mpl.ch
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 /* PLX9096 register definitions
25 #define __PLX9056_H_ 1
30 #define LOCAL_OFFSET 0x080
33 #define LOCAL_OFFSET 0x000
36 #define PCI9056_VENDOR_ID PCI_VENDOR_ID
37 /*#define PCI9656_DEVICE_ID PCI_DEVICE_ID */
38 #define PCI9056_COMMAND PCI_COMMAND
39 /*#define PCI9656_STATUS PCI_STATUS */
40 #define PCI9056_REVISION PCI_REVISION_ID
42 #define PCI9056_CACHE_SIZE PCI_CACHE_LINE_SIZE
43 #define PCI9056_RTR_BASE PCI_BASE_ADDRESS_0
44 #define PCI9056_RTR_IO_BASE PCI_BASE_ADDRESS_1
45 #define PCI9056_LOCAL_BASE0 PCI_BASE_ADDRESS_2
46 #define PCI9056_LOCAL_BASE1 PCI_BASE_ADDRESS_3
47 #define PCI9056_UNUSED_BASE1 PCI_BASE_ADDRESS_4
48 #define PCI9056_UNUSED_BASE2 PCI_BASE_ADDRESS_5
49 #define PCI9056_CIS_PTR PCI_CARDBUS_CIS
50 #define PCI9056_SUB_ID PCI_SUBSYSTEM_VENDOR_ID
51 #define PCI9056_EXP_ROM_BASE PCI_ROM_ADDRESS
52 #define PCI9056_CAP_PTR PCI_CAPABILITY_LIST
53 #define PCI9056_INT_LINE PCI_INTERRUPT_LINE
55 #if defined(PLX9056_LOC)
56 #define PCI9056_PM_CAP_ID 0x180
57 #define PCI9056_PM_CSR 0x184
58 #define PCI9056_HS_CAP_ID 0x188
59 #define PCI9056_VPD_CAP_ID 0x18C
60 #define PCI9056_VPD_DATA 0x190
64 #define PCI_DEVICE_ID_PLX9056 0x9056
66 /* Local Configuration Registers Accessible via the PCI Base address + Variable */
67 #define PCI9056_SPACE0_RANGE (0x000 + LOCAL_OFFSET)
68 #define PCI9056_SPACE0_REMAP (0x004 + LOCAL_OFFSET)
69 #define PCI9056_LOCAL_DMA_ARBIT (0x008 + LOCAL_OFFSET)
70 #define PCI9056_ENDIAN_DESC (0x00c + LOCAL_OFFSET)
71 #define PCI9056_EXP_ROM_RANGE (0x010 + LOCAL_OFFSET)
72 #define PCI9056_EXP_ROM_REMAP (0x014 + LOCAL_OFFSET)
73 #define PCI9056_SPACE0_ROM_DESC (0x018 + LOCAL_OFFSET)
74 #define PCI9056_DM_RANGE (0x01c + LOCAL_OFFSET)
75 #define PCI9056_DM_MEM_BASE (0x020 + LOCAL_OFFSET)
76 #define PCI9056_DM_IO_BASE (0x024 + LOCAL_OFFSET)
77 #define PCI9056_DM_PCI_MEM_REMAP (0x028 + LOCAL_OFFSET)
78 #define PCI9056_DM_PCI_IO_CONFIG (0x02c + LOCAL_OFFSET)
79 #define PCI9056_SPACE1_RANGE (0x0f0 + LOCAL_OFFSET)
80 #define PCI9056_SPACE1_REMAP (0x0f4 + LOCAL_OFFSET)
81 #define PCI9056_SPACE1_DESC (0x0f8 + LOCAL_OFFSET)
82 #define PCI9056_DM_DAC (0x0fc + LOCAL_OFFSET)
85 #define PCI9056_ARBITER_CTRL 0x1A0
86 #define PCI9056_ABORT_ADDRESS 0x1A4
89 /* Runtime registers PCI Address + LOCAL_OFFSET */
91 #define PCI9056_MAILBOX0 0x0C0
92 #define PCI9056_MAILBOX1 0x0C4
94 #define PCI9056_MAILBOX0 0x078
95 #define PCI9056_MAILBOX1 0x07c
98 #define PCI9056_MAILBOX2 (0x048 + LOCAL_OFFSET)
99 #define PCI9056_MAILBOX3 (0x04c + LOCAL_OFFSET)
100 #define PCI9056_MAILBOX4 (0x050 + LOCAL_OFFSET)
101 #define PCI9056_MAILBOX5 (0x054 + LOCAL_OFFSET)
102 #define PCI9056_MAILBOX6 (0x058 + LOCAL_OFFSET)
103 #define PCI9056_MAILBOX7 (0x05c + LOCAL_OFFSET)
104 #define PCI9056_PCI_TO_LOC_DBELL (0x060 + LOCAL_OFFSET)
105 #define PCI9056_LOC_TO_PCI_DBELL (0x064 + LOCAL_OFFSET)
106 #define PCI9056_INT_CTRL_STAT (0x068 + LOCAL_OFFSET)
107 #define PCI9056_EEPROM_CTRL_STAT (0x06c + LOCAL_OFFSET)
108 #define PCI9056_PERM_VENDOR_ID (0x070 + LOCAL_OFFSET)
109 #define PCI9056_REVISION_ID (0x074 + LOCAL_OFFSET)
111 #endif /* #ifndef __PLX9056_H_ */