to make u-boot work for fat32 filesystem
[jz_uboot.git] / board / mpl / vcma9 / vcma9.c
blob0d2003d2fc3ae89822d6b1915df9ef6223310ebc
1 /*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
9 * See file CREDITS for list of people who contributed to this
10 * project.
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
28 #include <common.h>
29 #include <s3c2410.h>
30 #include <i2c.h>
32 #include "vcma9.h"
33 #include "../common/common_util.h"
35 DECLARE_GLOBAL_DATA_PTR;
37 #define FCLK_SPEED 1
39 #if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
40 #define M_MDIV 0xC3
41 #define M_PDIV 0x4
42 #define M_SDIV 0x1
43 #elif FCLK_SPEED==1 /* Fout = 202.8MHz */
44 #define M_MDIV 0xA1
45 #define M_PDIV 0x3
46 #define M_SDIV 0x1
47 #endif
49 #define USB_CLOCK 1
51 #if USB_CLOCK==0
52 #define U_M_MDIV 0xA1
53 #define U_M_PDIV 0x3
54 #define U_M_SDIV 0x1
55 #elif USB_CLOCK==1
56 #define U_M_MDIV 0x48
57 #define U_M_PDIV 0x3
58 #define U_M_SDIV 0x2
59 #endif
61 static inline void delay(unsigned long loops)
63 __asm__ volatile ("1:\n"
64 "subs %0, %1, #1\n"
65 "bne 1b":"=r" (loops):"0" (loops));
69 * Miscellaneous platform dependent initialisations
72 int board_init(void)
74 S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
75 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
77 /* to reduce PLL lock time, adjust the LOCKTIME register */
78 clk_power->LOCKTIME = 0xFFFFFF;
80 /* configure MPLL */
81 clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
83 /* some delay between MPLL and UPLL */
84 delay (4000);
86 /* configure UPLL */
87 clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
89 /* some delay between MPLL and UPLL */
90 delay (8000);
92 /* set up the I/O ports */
93 gpio->GPACON = 0x007FFFFF;
94 gpio->GPBCON = 0x002AAAAA;
95 gpio->GPBUP = 0x000002BF;
96 gpio->GPCCON = 0xAAAAAAAA;
97 gpio->GPCUP = 0x0000FFFF;
98 gpio->GPDCON = 0xAAAAAAAA;
99 gpio->GPDUP = 0x0000FFFF;
100 gpio->GPECON = 0xAAAAAAAA;
101 gpio->GPEUP = 0x000037F7;
102 gpio->GPFCON = 0x00000000;
103 gpio->GPFUP = 0x00000000;
104 gpio->GPGCON = 0xFFEAFF5A;
105 gpio->GPGUP = 0x0000F0DC;
106 gpio->GPHCON = 0x0028AAAA;
107 gpio->GPHUP = 0x00000656;
109 /* setup correct IRQ modes for NIC */
110 gpio->EXTINT2 = (gpio->EXTINT2 & ~(7<<8)) | (4<<8); /* rising edge mode */
112 /* select USB port 2 to be host or device (fix to host for now) */
113 gpio->MISCCR |= 0x08;
115 /* init serial */
116 gd->baudrate = CONFIG_BAUDRATE;
117 gd->have_console = 1;
118 serial_init();
120 /* arch number of VCMA9-Board */
121 gd->bd->bi_arch_number = MACH_TYPE_MPL_VCMA9;
123 /* adress of boot parameters */
124 gd->bd->bi_boot_params = 0x30000100;
126 icache_enable();
127 dcache_enable();
129 return 0;
133 * NAND flash initialization.
135 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
136 extern ulong
137 nand_probe(ulong physadr);
140 static inline void NF_Reset(void)
142 int i;
144 NF_SetCE(NFCE_LOW);
145 NF_Cmd(0xFF); /* reset command */
146 for(i = 0; i < 10; i++); /* tWB = 100ns. */
147 NF_WaitRB(); /* wait 200~500us; */
148 NF_SetCE(NFCE_HIGH);
152 static inline void NF_Init(void)
154 #if 0 /* a little bit too optimistic */
155 #define TACLS 0
156 #define TWRPH0 3
157 #define TWRPH1 0
158 #else
159 #define TACLS 0
160 #define TWRPH0 4
161 #define TWRPH1 2
162 #endif
164 NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0));
165 /*nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); */
166 /* 1 1 1 1, 1 xxx, r xxx, r xxx */
167 /* En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 */
169 NF_Reset();
172 void
173 nand_init(void)
175 S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
177 NF_Init();
178 #ifdef DEBUG
179 printf("NAND flash probing at 0x%.8lX\n", (ulong)nand);
180 #endif
181 printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20);
183 #endif
186 * Get some Board/PLD Info
189 static u8 Get_PLD_ID(void)
191 VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
193 return(pld->ID);
196 static u8 Get_PLD_BOARD(void)
198 VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
200 return(pld->BOARD);
203 static u8 Get_PLD_SDRAM(void)
205 VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
207 return(pld->SDRAM);
210 static u8 Get_PLD_Version(void)
212 return((Get_PLD_ID() >> 4) & 0x0F);
215 static u8 Get_PLD_Revision(void)
217 return(Get_PLD_ID() & 0x0F);
220 #if 0 /* not used */
221 static int Get_Board_Config(void)
223 u8 config = Get_PLD_BOARD() & 0x03;
225 if (config == 3)
226 return 1;
227 else
228 return 0;
230 #endif
232 static uchar Get_Board_PCB(void)
234 return(((Get_PLD_BOARD() >> 4) & 0x03) + 'A');
237 static u8 Get_SDRAM_ChipNr(void)
239 switch ((Get_PLD_SDRAM() >> 4) & 0x0F) {
240 case 0: return 4;
241 case 1: return 1;
242 case 2: return 2;
243 default: return 0;
247 static ulong Get_SDRAM_ChipSize(void)
249 switch (Get_PLD_SDRAM() & 0x0F) {
250 case 0: return 16 * (1024*1024);
251 case 1: return 32 * (1024*1024);
252 case 2: return 8 * (1024*1024);
253 case 3: return 8 * (1024*1024);
254 default: return 0;
257 static const char * Get_SDRAM_ChipGeom(void)
259 switch (Get_PLD_SDRAM() & 0x0F) {
260 case 0: return "4Mx8x4";
261 case 1: return "8Mx8x4";
262 case 2: return "2Mx8x4";
263 case 3: return "4Mx8x2";
264 default: return "unknown";
268 static void Show_VCMA9_Info(char *board_name, char *serial)
270 printf("Board: %s SN: %s PCB Rev: %c PLD(%d,%d)\n",
271 board_name, serial, Get_Board_PCB(), Get_PLD_Version(), Get_PLD_Revision());
272 printf("SDRAM: %d chips %s\n", Get_SDRAM_ChipNr(), Get_SDRAM_ChipGeom());
275 int dram_init(void)
277 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
278 gd->bd->bi_dram[0].size = Get_SDRAM_ChipSize() * Get_SDRAM_ChipNr();
280 return 0;
283 /* ------------------------------------------------------------------------- */
286 * Check Board Identity:
289 int checkboard(void)
291 unsigned char s[50];
292 int i;
293 backup_t *b = (backup_t *) s;
295 i = getenv_r("serial#", s, 32);
296 if ((i < 0) || strncmp (s, "VCMA9", 5)) {
297 get_backup_values (b);
298 if (strncmp (b->signature, "MPL\0", 4) != 0) {
299 puts ("### No HW ID - assuming VCMA9");
300 } else {
301 b->serial_name[5] = 0;
302 Show_VCMA9_Info(b->serial_name, &b->serial_name[6]);
304 } else {
305 s[5] = 0;
306 Show_VCMA9_Info(s, &s[6]);
308 /*printf("\n");*/
309 return(0);
313 extern void mem_test_reloc(void);
315 int last_stage_init(void)
317 mem_test_reloc();
318 checkboard();
319 show_stdio_dev();
320 check_env();
321 return 0;
324 /***************************************************************************
325 * some helping routines
327 #if !CONFIG_USB_KEYBOARD
328 int overwrite_console(void)
330 /* return TRUE if console should be overwritten */
331 return 0;
333 #endif
335 /************************************************************************
336 * Print VCMA9 Info
337 ************************************************************************/
338 void print_vcma9_info(void)
340 unsigned char s[50];
341 int i;
343 if ((i = getenv_r("serial#", s, 32)) < 0) {
344 puts ("### No HW ID - assuming VCMA9");
345 printf("i %d", i*24);
346 } else {
347 s[5] = 0;
348 Show_VCMA9_Info(s, &s[6]);