board/w7o/errors.h

   1 /*
   2  * (C) Copyright 2001
   3  * Bill Hunter, Wave 7 Optics, william.hunter@mediaone.net
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23 #ifndef _ERRORS_H_
  24 #define _ERRORS_H_
  25
  26 #define ERR_FF          -1      /* led test value(2) */
  27 #define ERR_00          0x0000  /* led test value(2) */
  28 #define ERR_LED         0x01    /* led test failed (1)(3)(4) */
  29 #define ERR_RAMG        0x04    /* start SDRAM data bus test (2) */
  30 #define ERR_RAML        0x05    /* SDRAM data bus fault in LSW chip (5) */
  31 #define ERR_RAMH        0x06    /* SDRAM data bus fault in MSW chip (6) */
  32 #define ERR_RAMB        0x07    /* SDRAM data bus fault both chips (5)(6)(7) */
  33 #define ERR_ADDG        0x08    /* start Address ghosting test (13) */
  34 #define ERR_ADDF        0x09    /* fault during Address ghosting test (13) */
  35 #define ERR_POST1       0x0a    /* post1 tests complete */
  36 #define ERR_TMP1        0x0b    /* */
  37 #define ERR_R55G        0x0c    /* start SDRAM fill 55 test (2) */
  38 #define ERR_R55L        0x0d    /* SDRAM fill test 55 failed in LSW chip (8) */
  39 #define ERR_R55H        0x0e    /* SDRAM fill test 55 failed in MSW chip (9) */
  40 #define ERR_R55B        0x0f    /* SDRAM fill test 55 fail in both chips (10) */
  41 #define ERR_RAAG        0x10    /* start SDRAM fill aa test (2) */
  42 #define ERR_RAAL        0x11    /* SDRAM fill test aa failed in LSW chip (8) */
  43 #define ERR_RAAH        0x12    /* SDRAM fill test aa failed in MSW chip (9) */
  44 #define ERR_RAAB        0x13    /* SDRAM fill test aa fail in both chips (10) */
  45 #define ERR_R00G        0x14    /* start SDRAM fill 00 test (2) */
  46 #define ERR_R00L        0x15    /* SDRAM fill test 00 failed in LSW chip (8) */
  47 #define ERR_R00H        0x16    /* SDRAM fill test 00 failed in MSW chip (9) */
  48 #define ERR_R00B        0x17    /* SDRAM fill test 00 fail in both chips (10) */
  49 #define ERR_RTCG        0x18    /* start RTC test */
  50 #define ERR_RTCBAT      0x19    /* RTC battery failure */
  51 #define ERR_RTCTIM      0x1A    /* RTC invalid time/date values */
  52 #define ERR_RTCVAL      0x1B    /* RTC NVRAM not accessable */
  53 #define ERR_FPGAG       0x20    /* fault during FPGA programming */
  54 #define ERR_XRW1        0x21    /* Xilinx - can't read/write regs on FPGA 1 */
  55 #define ERR_XRW2        0x22    /* Xilinx - can't read/write regs on FPGA 2 */
  56 #define ERR_XRW3        0x23    /* Xilinx - can't read/write regs on FPGA 3 */
  57 #define ERR_XRW4        0x24    /* Xilinx - can't read/write regs on FPGA 4 */
  58 #define ERR_XRW5        0x25    /* Xilinx - can't read/write regs on FPGA 5 */
  59 #define ERR_XRW6        0x26    /* Xilinx - can't read/write regs on FPGA 6 */
  60 #define ERR_XINIT0      0x27    /* Xilinx - INIT line failed to go low */
  61 #define ERR_XINIT1      0x28    /* Xilinx - INIT line failed to go high */
  62 #define ERR_XDONE1      0x29    /* Xilinx - DONE line failed to go high */
  63 #define ERR_XIMAGE      0x2A    /* Xilinx - Bad FPGA image in Flash */
  64 #define ERR_TempG       0x2b    /* start temp sensor tests */
  65 #define ERR_Tinit0      0x2C    /* temp sensor 0 failed to init */
  66 #define ERR_Tinit1      0x2D    /* temp sensor 1 failed to init */
  67 #define ERR_Ttest0      0x2E    /* temp sensor 0 failed test */
  68 #define ERR_Ttest1      0x2F    /* temp sensor 1 failed test */
  69 #define ERR_lm75r       0x30    /* temp sensor read failure */
  70 #define ERR_lm75w       0x31    /* temp sensor write failure */
  71
  72
  73 #define ERR_POSTOK      0x55    /* PANIC: psych... OK */
  74
  75 #if !defined(__ASSEMBLY__)
  76 extern void log_stat(int errcode);
  77 extern void log_warn(int errcode);
  78 extern void log_err(int errcode);
  79 #endif
  80
  81 /*
  82 Debugging suggestions:
  83 (1) periferal data bus shorted or crossed
  84 (2) general processor halt, check reset, watch dog, power supply ripple, processor clock.
  85 (3) check p_we, p_r/w, p_oe, p_rdy lines.
  86 (4) check LED buffers
  87 (5) check SDRAM data bus bits 16-31, check LSW SDRAM chip.
  88 (6) check SDRAM data bus bits 0-15, check MSW SDRAM chip.
  89 (7) check SDRAM control lines and clocks
  90 (8) check decoupling caps, replace LSW SDRAM
  91 (9) check decoupling caps, replace MSW SDRAM
  92 (10)
  93 (11)
  94 (12)
  95 (13) SDRAM address shorted or unconnected, check sdram caps
  96 */
  97 #endif /* _ERRORS_H_ */