3 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * Main Flash Configuration.
30 typedef struct flashCfg_s
{
31 unsigned short mfg
; /* Manufacture ID */
32 unsigned short dev
; /* Device ID */
33 unsigned char devWidth
; /* Device Width */
34 unsigned char numDevs
; /* Number of devices */
35 unsigned char numCols
; /* Number of columns */
36 unsigned char colWidth
; /* Width of a column */
37 unsigned char weDataWidth
; /* Write/Erase Data Width */
41 * Vital Product Data - VPD
43 #define MAX_PROD_ID 15
44 #define MAX_ETH_ADDRS 10
45 typedef unsigned char EthAddr
[6];
47 unsigned char _devAddr
; /* Device address during read */
48 char productId
[MAX_PROD_ID
]; /* Product ID */
49 char revisionId
; /* Revision ID as a char */
50 unsigned long serialNum
; /* Serial number */
51 unsigned char manuID
; /* Manufact ID - byte int */
52 unsigned long configOpt
; /* Config Option - bit field */
53 unsigned long sysClk
; /* System clock in Hertz */
54 unsigned long serClk
; /* Ext. clock in Hertz */
55 flashCfg_t flashCfg
; /* Flash configuration */
56 unsigned long numPOTS
; /* Number of POTS lines */
57 unsigned long numDS1
; /* Number of DS1 circuits */
58 EthAddr ethAddrs
[MAX_ETH_ADDRS
]; /* Ethernet MAC, 1st = craft */
62 #define VPD_MAX_EEPROM_SIZE 512 /* Max size VPD EEPROM */
63 #define SDRAM_SPD_DATA_SIZE 128 /* Size SPD in VPD EEPROM */
66 * PIDs - Packet Identifiers
68 #define VPD_PID_GI 0x0 /* Guaranted Illegal */
69 #define VPD_PID_PID 0x1 /* Product Identifier */
70 #define VPD_PID_REV 0x2 /* Product Revision */
71 #define VPD_PID_SN 0x3 /* Serial Number */
72 #define VPD_PID_MANID 0x4 /* Manufacture ID */
73 #define VPD_PID_PCO 0x5 /* Product configuration */
74 #define VPD_PID_SYSCLK 0x6 /* System Clock */
75 #define VPD_PID_SERCLK 0x7 /* Ser. Clk. Speed in Hertz */
76 #define VPD_PID_CRC 0x8 /* VPD CRC */
77 #define VPD_PID_FLASH 0x9 /* Flash Configuration */
78 #define VPD_PID_ETHADDR 0xA /* Ethernet Address(es) */
79 #define VPD_PID_GAL 0xB /* Galileo Switch Config */
80 #define VPD_PID_POTS 0xC /* Number of POTS Lines */
81 #define VPD_PID_DS1 0xD /* Number of DS1s */
82 #define VPD_PID_TERM 0xFF /* Termination packet */
85 * VPD - Eyecatcher/Magic
87 #define VPD_EYECATCHER "W7O"
88 #define VPD_EYE_SIZE 3
89 typedef struct vpd_header
{
90 unsigned char eyecatcher
[VPD_EYE_SIZE
]; /* eyecatcher - "W7O" */
91 unsigned short size
__attribute__((packed
)); /* size of EEPROM */
95 #define VPD_DATA_SIZE (VPD_MAX_EEPROM_SIZE - SDRAM_SPD_DATA_SIZE - \
97 typedef struct vpd_s
{
99 unsigned char packets
[VPD_DATA_SIZE
];
102 typedef struct vpd_packet
{
103 unsigned char identifier
;
105 unsigned char data
[1];
109 * VPD configOpt bit mask
111 #define VPD_HAS_BBRAM 0x1 /* Battery backed SRAM */
112 #define VPD_HAS_RTC 0x2 /* Battery backed RTC */
113 #define VPD_HAS_EXT_SER_CLK 0x4 /* External serial clock */
114 #define VPD_HAS_SER_TRANS_1 0x8 /* COM1 transceiver */
115 #define VPD_HAS_SER_TRANS_2 0x10 /* COM2 transceiver */
116 #define VPD_HAS_CRAFT_PHY 0x20 /* CRAFT Ethernet */
117 #define VPD_HAS_DTT_1 0x40 /* I2C Digital therm. #1 */
118 #define VPD_HAS_DTT_2 0x80 /* I2C Digital therm. #2 */
119 #define VPD_HAS_1000_UP_LASER 0x100 /* GMM - 1000Mbit Uplink */
120 #define VPD_HAS_70KM_UP_LASER 0x200 /* CMM - 70KM Uplink laser */
121 #define VPD_HAS_2_UPLINKS 0x400 /* CMM - 2 uplink lasers */
122 #define VPD_HAS_FPGA 0x800 /* Has 1 or more FPGAs */
123 #define VPD_HAS_DFA 0x1000 /* CLM - Has 2 Fiber Inter. */
124 #define VPD_HAS_GAL_SWITCH 0x2000 /* GMM - Has a Gal switch */
125 #define VPD_HAS_POTS_LINES 0x4000 /* GMM - Has POTS lines */
126 #define VPD_HAS_DS1_CHANNELS 0x8000 /* GMM - Has DS1 channels */
127 #define VPD_HAS_CABLE_RETURN 0x10000 /* GBM/GBR - Cable ret. path */
129 #define VPD_EEPROM_SIZE (256 - SDRAM_SPD_DATA_SIZE) /* Size EEPROM */
131 extern int vpd_get_data(unsigned char dev_addr
, VPD
*vpd
);
132 extern void vpd_print(VPD
*vpdInfo
);