3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #if (CONFIG_COMMANDS & CFG_CMD_MII)
34 #ifdef CONFIG_TERSE_MII
36 * Display values from last command.
44 * MII device/info/read/write
47 * mii device {devname}
49 * mii read {addr} {reg}
50 * mii write {addr} {reg} {data}
52 int do_mii (cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
55 unsigned char addr
, reg
;
61 printf ("Usage:\n%s\n", cmdtp
->usage
);
65 #if defined(CONFIG_8xx) || defined(CONFIG_MCF52x2)
70 * We use the last specified parameters, unless new ones are
78 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
81 addr
= simple_strtoul (argv
[2], NULL
, 16);
83 reg
= simple_strtoul (argv
[3], NULL
, 16);
85 data
= simple_strtoul (argv
[4], NULL
, 16);
88 /* use current device */
89 devname
= miiphy_get_current_dev();
92 * check device/read/write/list.
95 unsigned char j
, start
, end
;
101 * Look for any and all PHYs. Valid addresses are 0..31.
104 start
= addr
; end
= addr
+ 1;
109 for (j
= start
; j
< end
; j
++) {
110 if (miiphy_info (devname
, j
, &oui
, &model
, &rev
) == 0) {
111 printf ("PHY 0x%02X: "
117 miiphy_speed (devname
, j
),
118 (miiphy_duplex (devname
, j
) == FULL
)
122 } else if (op
== 'r') {
123 if (miiphy_read (devname
, addr
, reg
, &data
) != 0) {
124 puts ("Error reading from the PHY\n");
127 printf ("%04X\n", data
& 0x0000FFFF);
129 } else if (op
== 'w') {
130 if (miiphy_write (devname
, addr
, reg
, data
) != 0) {
131 puts ("Error writing to the PHY\n");
134 } else if (op
== 'd') {
138 miiphy_set_current_dev (argv
[2]);
140 printf ("Usage:\n%s\n", cmdtp
->usage
);
145 * Save the parameters for repeats.
155 /***************************************************/
159 "mii - MII utility commands\n",
160 "device - list available devices\n"
161 "mii device <devname> - set current device\n"
162 "mii info <addr> - display MII PHY info\n"
163 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
164 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
167 #else /* ! CONFIG_TERSE_MII ================================================= */
169 typedef struct _MII_reg_desc_t
{
174 MII_reg_desc_t reg_0_5_desc_tbl
[] = {
175 { 0, "PHY control register" },
176 { 1, "PHY status register" },
177 { 2, "PHY ID 1 register" },
178 { 3, "PHY ID 2 register" },
179 { 4, "Autonegotiation advertisement register" },
180 { 5, "Autonegotiation partner abilities register" },
183 typedef struct _MII_field_desc_t
{
190 MII_field_desc_t reg_0_desc_tbl
[] = {
191 { 15, 15, 0x01, "reset" },
192 { 14, 14, 0x01, "loopback" },
193 { 13, 6, 0x81, "speed selection" }, /* special */
194 { 12, 12, 0x01, "A/N enable" },
195 { 11, 11, 0x01, "power-down" },
196 { 10, 10, 0x01, "isolate" },
197 { 9, 9, 0x01, "restart A/N" },
198 { 8, 8, 0x01, "duplex" }, /* special */
199 { 7, 7, 0x01, "collision test enable" },
200 { 5, 0, 0x3f, "(reserved)" }
203 MII_field_desc_t reg_1_desc_tbl
[] = {
204 { 15, 15, 0x01, "100BASE-T4 able" },
205 { 14, 14, 0x01, "100BASE-X full duplex able" },
206 { 13, 13, 0x01, "100BASE-X half duplex able" },
207 { 12, 12, 0x01, "10 Mbps full duplex able" },
208 { 11, 11, 0x01, "10 Mbps half duplex able" },
209 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
210 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
211 { 8, 8, 0x01, "extended status" },
212 { 7, 7, 0x01, "(reserved)" },
213 { 6, 6, 0x01, "MF preamble suppression" },
214 { 5, 5, 0x01, "A/N complete" },
215 { 4, 4, 0x01, "remote fault" },
216 { 3, 3, 0x01, "A/N able" },
217 { 2, 2, 0x01, "link status" },
218 { 1, 1, 0x01, "jabber detect" },
219 { 0, 0, 0x01, "extended capabilities" },
222 MII_field_desc_t reg_2_desc_tbl
[] = {
223 { 15, 0, 0xffff, "OUI portion" },
226 MII_field_desc_t reg_3_desc_tbl
[] = {
227 { 15, 10, 0x3f, "OUI portion" },
228 { 9, 4, 0x3f, "manufacturer part number" },
229 { 3, 0, 0x0f, "manufacturer rev. number" },
232 MII_field_desc_t reg_4_desc_tbl
[] = {
233 { 15, 15, 0x01, "next page able" },
234 { 14, 14, 0x01, "reserved" },
235 { 13, 13, 0x01, "remote fault" },
236 { 12, 12, 0x01, "reserved" },
237 { 11, 11, 0x01, "asymmetric pause" },
238 { 10, 10, 0x01, "pause enable" },
239 { 9, 9, 0x01, "100BASE-T4 able" },
240 { 8, 8, 0x01, "100BASE-TX full duplex able" },
241 { 7, 7, 0x01, "100BASE-TX able" },
242 { 6, 6, 0x01, "10BASE-T full duplex able" },
243 { 5, 5, 0x01, "10BASE-T able" },
244 { 4, 0, 0x1f, "xxx to do" },
247 MII_field_desc_t reg_5_desc_tbl
[] = {
248 { 15, 15, 0x01, "next page able" },
249 { 14, 14, 0x01, "acknowledge" },
250 { 13, 13, 0x01, "remote fault" },
251 { 12, 12, 0x01, "(reserved)" },
252 { 11, 11, 0x01, "asymmetric pause able" },
253 { 10, 10, 0x01, "pause able" },
254 { 9, 9, 0x01, "100BASE-T4 able" },
255 { 8, 8, 0x01, "100BASE-X full duplex able" },
256 { 7, 7, 0x01, "100BASE-TX able" },
257 { 6, 6, 0x01, "10BASE-T full duplex able" },
258 { 5, 5, 0x01, "10BASE-T able" },
259 { 4, 0, 0x1f, "xxx to do" },
262 #define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0]))
263 #define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0]))
264 #define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0]))
265 #define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0]))
266 #define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0]))
267 #define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0]))
269 typedef struct _MII_field_desc_and_len_t
{
270 MII_field_desc_t
* pdesc
;
272 } MII_field_desc_and_len_t
;
274 MII_field_desc_and_len_t desc_and_len_tbl
[] = {
275 { reg_0_desc_tbl
, DESC0LEN
},
276 { reg_1_desc_tbl
, DESC1LEN
},
277 { reg_2_desc_tbl
, DESC2LEN
},
278 { reg_3_desc_tbl
, DESC3LEN
},
279 { reg_4_desc_tbl
, DESC4LEN
},
280 { reg_5_desc_tbl
, DESC5LEN
},
283 static void dump_reg(
285 MII_reg_desc_t
* prd
,
286 MII_field_desc_and_len_t
* pdl
);
288 static int special_field(
290 MII_field_desc_t
* pdesc
,
293 void MII_dump_0_to_5(
300 for (i
= 0; i
< 6; i
++) {
301 if ((reglo
<= i
) && (i
<= reghi
))
302 dump_reg(regvals
[i
], ®_0_5_desc_tbl
[i
],
303 &desc_and_len_tbl
[i
]);
307 static void dump_reg(
309 MII_reg_desc_t
* prd
,
310 MII_field_desc_and_len_t
* pdl
)
313 ushort mask_in_place
;
314 MII_field_desc_t
* pdesc
;
316 printf("%u. (%04hx) -- %s --\n",
317 prd
->regno
, regval
, prd
->name
);
319 for (i
= 0; i
< pdl
->len
; i
++) {
320 pdesc
= &pdl
->pdesc
[i
];
322 mask_in_place
= pdesc
->mask
<< pdesc
->lo
;
324 printf(" (%04hx:%04hx) %u.",
326 regval
& mask_in_place
,
329 if (special_field(prd
->regno
, pdesc
, regval
)) {
332 if (pdesc
->hi
== pdesc
->lo
)
333 printf("%2u ", pdesc
->lo
);
335 printf("%2u-%2u", pdesc
->hi
, pdesc
->lo
);
337 (regval
& mask_in_place
) >> pdesc
->lo
,
355 static int special_field(
357 MII_field_desc_t
* pdesc
,
360 if ((regno
== 0) && (pdesc
->lo
== 6)) {
361 ushort speed_bits
= regval
& PHY_BMCR_SPEED_MASK
;
362 printf("%2u,%2u = b%u%u speed selection = %s Mbps",
366 speed_bits
== PHY_BMCR_1000_MBPS
? "1000" :
367 speed_bits
== PHY_BMCR_100_MBPS
? "100" :
368 speed_bits
== PHY_BMCR_10_MBPS
? "10" :
373 else if ((regno
== 0) && (pdesc
->lo
== 8)) {
374 printf("%2u = %5u duplex = %s",
376 (regval
>> pdesc
->lo
) & 1,
377 ((regval
>> pdesc
->lo
) & 1) ? "full" : "half");
381 else if ((regno
== 4) && (pdesc
->lo
== 0)) {
382 ushort sel_bits
= (regval
>> pdesc
->lo
) & pdesc
->mask
;
383 printf("%2u-%2u = %5u selector = %s",
384 pdesc
->hi
, pdesc
->lo
, sel_bits
,
385 sel_bits
== PHY_ANLPAR_PSB_802_3
?
387 sel_bits
== PHY_ANLPAR_PSB_802_9
?
388 "IEEE 802.9 ISLAN-16T" :
393 else if ((regno
== 5) && (pdesc
->lo
== 0)) {
394 ushort sel_bits
= (regval
>> pdesc
->lo
) & pdesc
->mask
;
395 printf("%2u-%2u = %u selector = %s",
396 pdesc
->hi
, pdesc
->lo
, sel_bits
,
397 sel_bits
== PHY_ANLPAR_PSB_802_3
?
399 sel_bits
== PHY_ANLPAR_PSB_802_9
?
400 "IEEE 802.9 ISLAN-16T" :
415 static void extract_range(
421 *plo
= simple_strtoul(input
, &end
, 16);
424 *phi
= simple_strtoul(end
, NULL
, 16);
431 /* ---------------------------------------------------------------- */
432 int do_mii (cmd_tbl_t
* cmdtp
, int flag
, int argc
, char *argv
[])
435 unsigned char addrlo
, addrhi
, reglo
, reghi
;
436 unsigned char addr
, reg
;
446 * We use the last specified parameters, unless new ones are
451 addrlo
= last_addr_lo
;
452 addrhi
= last_addr_hi
;
457 if ((flag
& CMD_FLAG_REPEAT
) == 0) {
459 if (strlen(argv
[1]) > 1)
465 extract_range(argv
[2], &addrlo
, &addrhi
);
467 extract_range(argv
[3], ®lo
, ®hi
);
469 data
= simple_strtoul (argv
[4], NULL
, 16);
472 /* use current device */
473 devname
= miiphy_get_current_dev();
476 * check info/read/write.
479 unsigned char j
, start
, end
;
485 * Look for any and all PHYs. Valid addresses are 0..31.
488 start
= addrlo
; end
= addrhi
;
493 for (j
= start
; j
<= end
; j
++) {
494 if (miiphy_info (devname
, j
, &oui
, &model
, &rev
) == 0) {
495 printf("PHY 0x%02X: "
501 miiphy_speed (devname
, j
),
502 (miiphy_duplex (devname
, j
) == FULL
)
506 } else if (op
[0] == 'r') {
507 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
508 for (reg
= reglo
; reg
<= reghi
; reg
++) {
510 if (miiphy_read (devname
, addr
, reg
, &data
) != 0) {
512 "Error reading from the PHY addr=%02x reg=%02x\n",
516 if ((addrlo
!= addrhi
) || (reglo
!= reghi
))
517 printf("addr=%02x reg=%02x data=",
518 (uint
)addr
, (uint
)reg
);
519 printf("%04X\n", data
& 0x0000FFFF);
522 if ((addrlo
!= addrhi
) && (reglo
!= reghi
))
525 } else if (op
[0] == 'w') {
526 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
527 for (reg
= reglo
; reg
<= reghi
; reg
++) {
528 if (miiphy_write (devname
, addr
, reg
, data
) != 0) {
529 printf("Error writing to the PHY addr=%02x reg=%02x\n",
535 } else if (strncmp(op
, "du", 2) == 0) {
538 if ((reglo
> 5) || (reghi
> 5)) {
540 "The MII dump command only formats the "
541 "standard MII registers, 0-5.\n");
544 for (addr
= addrlo
; addr
<= addrhi
; addr
++) {
545 for (reg
= reglo
; reg
< reghi
+ 1; reg
++) {
546 if (miiphy_read(devname
, addr
, reg
, ®s
[reg
]) != 0) {
549 "Error reading from the PHY addr=%02x reg=%02x\n",
555 MII_dump_0_to_5(regs
, reglo
, reghi
);
558 } else if (strncmp(op
, "de", 2) == 0) {
562 miiphy_set_current_dev (argv
[2]);
564 printf("Usage:\n%s\n", cmdtp
->usage
);
569 * Save the parameters for repeats.
573 last_addr_lo
= addrlo
;
574 last_addr_hi
= addrhi
;
582 /***************************************************/
586 "mii - MII utility commands\n",
587 "device - list available devices\n"
588 "mii device <devname> - set current device\n"
589 "mii info <addr> - display MII PHY info\n"
590 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
591 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
592 "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
593 "Addr and/or reg may be ranges, e.g. 2-7.\n"
596 #endif /* CONFIG_TERSE_MII */
598 #endif /* CFG_CMD_MII */