2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
32 #ifdef CONFIG_AT91RM9200DK /* need this for the at91rm9200dk */
34 #include <asm/arch/hardware.h>
36 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
37 #include <asm/arch/ixp425.h>
41 #if defined(CONFIG_SOFT_I2C)
43 /* #define DEBUG_I2C */
46 DECLARE_GLOBAL_DATA_PTR
;
50 /*-----------------------------------------------------------------------
57 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
58 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
62 #define PRINTD(fmt,args...) do { \
63 if (gd->have_console) \
64 printf (fmt ,##args); \
67 #define PRINTD(fmt,args...)
70 /*-----------------------------------------------------------------------
73 static void send_reset (void);
74 static void send_start (void);
75 static void send_stop (void);
76 static void send_ack (int);
77 static int write_byte (uchar byte
);
78 static uchar
read_byte (int);
81 /*-----------------------------------------------------------------------
82 * Send a reset sequence consisting of 9 clocks with the data signal high
83 * to clock any confused device back into an idle state. Also send a
84 * <stop> at the end of the sequence for belts & suspenders.
86 static void send_reset(void)
89 volatile ioport_t
*iop
= ioport_addr((immap_t
*)CFG_IMMR
, I2C_PORT
);
92 volatile immap_t
*immr
= (immap_t
*)CFG_IMMR
;
102 for(j
= 0; j
< 9; j
++) {
114 /*-----------------------------------------------------------------------
115 * START: High -> Low on SDA while SCL is High
117 static void send_start(void)
119 #ifdef CONFIG_MPC8260
120 volatile ioport_t
*iop
= ioport_addr((immap_t
*)CFG_IMMR
, I2C_PORT
);
123 volatile immap_t
*immr
= (immap_t
*)CFG_IMMR
;
136 /*-----------------------------------------------------------------------
137 * STOP: Low -> High on SDA while SCL is High
139 static void send_stop(void)
141 #ifdef CONFIG_MPC8260
142 volatile ioport_t
*iop
= ioport_addr((immap_t
*)CFG_IMMR
, I2C_PORT
);
145 volatile immap_t
*immr
= (immap_t
*)CFG_IMMR
;
161 /*-----------------------------------------------------------------------
162 * ack should be I2C_ACK or I2C_NOACK
164 static void send_ack(int ack
)
166 #ifdef CONFIG_MPC8260
167 volatile ioport_t
*iop
= ioport_addr((immap_t
*)CFG_IMMR
, I2C_PORT
);
170 volatile immap_t
*immr
= (immap_t
*)CFG_IMMR
;
186 /*-----------------------------------------------------------------------
187 * Send 8 bits and look for an acknowledgement.
189 static int write_byte(uchar data
)
191 #ifdef CONFIG_MPC8260
192 volatile ioport_t
*iop
= ioport_addr((immap_t
*)CFG_IMMR
, I2C_PORT
);
195 volatile immap_t
*immr
= (immap_t
*)CFG_IMMR
;
201 for(j
= 0; j
< 8; j
++) {
204 I2C_SDA(data
& 0x80);
214 * Look for an <ACK>(negative logic) and return it.
229 return(nack
); /* not a nack is an ack */
233 /*-----------------------------------------------------------------------
234 * if ack == I2C_ACK, ACK the byte so can continue reading, else
235 * send I2C_NOACK to end the read.
237 static uchar
read_byte(int ack
)
239 #ifdef CONFIG_MPC8260
240 volatile ioport_t
*iop
= ioport_addr((immap_t
*)CFG_IMMR
, I2C_PORT
);
243 volatile immap_t
*immr
= (immap_t
*)CFG_IMMR
;
249 * Read 8 bits, MSB first.
253 for(j
= 0; j
< 8; j
++) {
267 /*=====================================================================*/
268 /* Public Functions */
269 /*=====================================================================*/
271 /*-----------------------------------------------------------------------
274 void i2c_init (int speed
, int slaveaddr
)
277 * WARNING: Do NOT save speed in a static variable: if the
278 * I2C routines are called before RAM is initialized (to read
279 * the DIMM SPD, for instance), RAM won't be usable and your
285 /*-----------------------------------------------------------------------
286 * Probe to see if a chip is present. Also good for checking for the
287 * completion of EEPROM writes since the chip stops responding until
288 * the write completes (typically 10mSec).
290 int i2c_probe(uchar addr
)
295 * perform 1 byte write transaction with just address byte
299 rc
= write_byte ((addr
<< 1) | 0);
305 /*-----------------------------------------------------------------------
308 int i2c_read(uchar chip
, uint addr
, int alen
, uchar
*buffer
, int len
)
311 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
312 chip
, addr
, alen
, buffer
, len
);
314 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
316 * EEPROM chips that implement "address overflow" are ones
317 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
318 * address and the extra bits end up in the "chip address"
319 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
320 * four 256 byte chips.
322 * Note that we consider the length of the address field to
323 * still be one byte because the extra address bits are
324 * hidden in the chip address.
326 chip
|= ((addr
>> (alen
* 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW
);
328 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
333 * Do the addressing portion of a write cycle to set the
334 * chip's address pointer. If the address length is zero,
335 * don't do the normal write cycle to set the address pointer,
336 * there is no address pointer in this chip.
340 if(write_byte(chip
<< 1)) { /* write cycle */
342 PRINTD("i2c_read, no chip responded %02X\n", chip
);
345 shift
= (alen
-1) * 8;
347 if(write_byte(addr
>> shift
)) {
348 PRINTD("i2c_read, address not <ACK>ed\n");
353 send_stop(); /* reportedly some chips need a full stop */
357 * Send the chip address again, this time for a read cycle.
358 * Then read the data. On the last byte, we do a NACK instead
359 * of an ACK(len == 0) to terminate the read.
361 write_byte((chip
<< 1) | 1); /* read cycle */
363 *buffer
++ = read_byte(len
== 0);
369 /*-----------------------------------------------------------------------
372 int i2c_write(uchar chip
, uint addr
, int alen
, uchar
*buffer
, int len
)
374 int shift
, failures
= 0;
376 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
377 chip
, addr
, alen
, buffer
, len
);
380 if(write_byte(chip
<< 1)) { /* write cycle */
382 PRINTD("i2c_write, no chip responded %02X\n", chip
);
385 shift
= (alen
-1) * 8;
387 if(write_byte(addr
>> shift
)) {
388 PRINTD("i2c_write, address not <ACK>ed\n");
395 if(write_byte(*buffer
++)) {
403 /*-----------------------------------------------------------------------
406 uchar
i2c_reg_read(uchar i2c_addr
, uchar reg
)
410 i2c_read(i2c_addr
, reg
, 1, &buf
, 1);
415 /*-----------------------------------------------------------------------
418 void i2c_reg_write(uchar i2c_addr
, uchar reg
, uchar val
)
420 i2c_write(i2c_addr
, reg
, 1, &val
, 1);
424 #endif /* CONFIG_SOFT_I2C */