cpu/74xx_7xx/cpu.c

   1 /*
   2  * (C) Copyright 2001
   3  * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * cpu.c
  26  *
  27  * CPU specific code
  28  *
  29  * written or collected and sometimes rewritten by
  30  * Magnus Damm <damm@bitsmart.com>
  31  *
  32  * minor modifications by
  33  * Wolfgang Denk <wd@denx.de>
  34  *
  35  * more modifications by
  36  * Josh Huber <huber@mclx.com>
  37  * added support for the 74xx series of cpus
  38  * added support for the 7xx series of cpus
  39  * made the code a little less hard-coded, and more auto-detectish
  40  */
  41
  42 #include <common.h>
  43 #include <command.h>
  44 #include <74xx_7xx.h>
  45 #include <asm/cache.h>
  46
  47 #ifdef CONFIG_AMIGAONEG3SE
  48 #include "../board/MAI/AmigaOneG3SE/via686.h"
  49 #include "../board/MAI/AmigaOneG3SE/memio.h"
  50 #endif
  51
  52 DECLARE_GLOBAL_DATA_PTR;
  53
  54 cpu_t
  55 get_cpu_type(void)
  56 {
  57         uint pvr = get_pvr();
  58         cpu_t type;
  59
  60         type = CPU_UNKNOWN;
  61
  62         switch (PVR_VER(pvr)) {
  63         case 0x000c:
  64                 type = CPU_7400;
  65                 break;
  66         case 0x0008:
  67                 type = CPU_750;
  68
  69                 if (((pvr >> 8) & 0xff) == 0x01) {
  70                         type = CPU_750CX;       /* old CX (80100 and 8010x?)*/
  71                 } else if (((pvr >> 8) & 0xff) == 0x22) {
  72                         type = CPU_750CX;       /* CX (82201,82202) and CXe (82214) */
  73                 } else if (((pvr >> 8) & 0xff) == 0x33) {
  74                         type = CPU_750CX;       /* CXe (83311) */
  75                 } else if (((pvr >> 12) & 0xF) == 0x3) {
  76                         type = CPU_755;
  77                 }
  78                 break;
  79
  80         case 0x7000:
  81                 type = CPU_750FX;
  82                 break;
  83
  84         case 0x7002:
  85                 type = CPU_750GX;
  86                 break;
  87
  88         case 0x800C:
  89                 type = CPU_7410;
  90                 break;
  91
  92         case 0x8000:
  93                 type = CPU_7450;
  94                 break;
  95
  96         case 0x8001:
  97                 type = CPU_7455;
  98                 break;
  99
 100         case 0x8002:
 101                 type = CPU_7457;
 102                 break;
 103
 104         default:
 105                 break;
 106         }
 107
 108         return type;
 109 }
 110
 111 /* ------------------------------------------------------------------------- */
 112
 113 #if !defined(CONFIG_BAB7xx)
 114 int checkcpu (void)
 115 {
 116         uint type   = get_cpu_type();
 117         uint pvr    = get_pvr();
 118         ulong clock = gd->cpu_clk;
 119         char buf[32];
 120         char *str;
 121
 122         puts ("CPU:   ");
 123
 124         switch (type) {
 125         case CPU_750CX:
 126                 printf ("750CX%s v%d.%d", (pvr&0xf0)?"e":"",
 127                         (pvr>>8) & 0xf,
 128                         pvr & 0xf);
 129                 goto    PR_CLK;
 130
 131         case CPU_750:
 132                 str = "750";
 133                 break;
 134
 135         case CPU_750FX:
 136                 str = "750FX";
 137                 break;
 138
 139         case CPU_750GX:
 140                 str = "750GX";
 141                 break;
 142
 143         case CPU_755:
 144                 str = "755";
 145                 break;
 146
 147         case CPU_7400:
 148                 str = "MPC7400";
 149                 break;
 150
 151         case CPU_7410:
 152                 str = "MPC7410";
 153                 break;
 154
 155         case CPU_7450:
 156                 str = "MPC7450";
 157                 break;
 158
 159         case CPU_7455:
 160                 str = "MPC7455";
 161                 break;
 162
 163         case CPU_7457:
 164                 str = "MPC7457";
 165                 break;
 166
 167         default:
 168                 printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
 169                 return -1;
 170         }
 171
 172         printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
 173 PR_CLK:
 174         printf (" @ %s MHz\n", strmhz(buf, clock));
 175
 176         return (0);
 177 }
 178 #endif
 179 /* these two functions are unimplemented currently [josh] */
 180
 181 /* -------------------------------------------------------------------- */
 182 /* L1 i-cache                                                           */
 183
 184 int
 185 checkicache(void)
 186 {
 187         return 0; /* XXX */
 188 }
 189
 190 /* -------------------------------------------------------------------- */
 191 /* L1 d-cache                                                           */
 192
 193 int
 194 checkdcache(void)
 195 {
 196         return 0; /* XXX */
 197 }
 198
 199 /* -------------------------------------------------------------------- */
 200
 201 static inline void
 202 soft_restart(unsigned long addr)
 203 {
 204         /* SRR0 has system reset vector, SRR1 has default MSR value */
 205         /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
 206
 207         __asm__ __volatile__ ("mtspr    26, %0"         :: "r" (addr));
 208         __asm__ __volatile__ ("li       4, (1 << 6)"    ::: "r4");
 209         __asm__ __volatile__ ("mtspr    27, 4");
 210         __asm__ __volatile__ ("rfi");
 211
 212         while(1);       /* not reached */
 213 }
 214
 215
 216 #if !defined(CONFIG_PCIPPC2) && \
 217     !defined(CONFIG_BAB7xx)  && \
 218     !defined(CONFIG_ELPPC)   && \
 219     !defined(CONFIG_PPMC7XX)
 220 /* no generic way to do board reset. simply call soft_reset. */
 221 void
 222 do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 223 {
 224         ulong addr;
 225         /* flush and disable I/D cache */
 226         __asm__ __volatile__ ("mfspr    3, 1008"        ::: "r3");
 227         __asm__ __volatile__ ("ori      5, 5, 0xcc00"   ::: "r5");
 228         __asm__ __volatile__ ("ori      4, 3, 0xc00"    ::: "r4");
 229         __asm__ __volatile__ ("andc     5, 3, 5"        ::: "r5");
 230         __asm__ __volatile__ ("sync");
 231         __asm__ __volatile__ ("mtspr    1008, 4");
 232         __asm__ __volatile__ ("isync");
 233         __asm__ __volatile__ ("sync");
 234         __asm__ __volatile__ ("mtspr    1008, 5");
 235         __asm__ __volatile__ ("isync");
 236         __asm__ __volatile__ ("sync");
 237
 238 #ifdef CFG_RESET_ADDRESS
 239         addr = CFG_RESET_ADDRESS;
 240 #else
 241         /*
 242          * note: when CFG_MONITOR_BASE points to a RAM address,
 243          * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid
 244          * address. Better pick an address known to be invalid on your
 245          * system and assign it to CFG_RESET_ADDRESS.
 246          */
 247         addr = CFG_MONITOR_BASE - sizeof (ulong);
 248 #endif
 249         soft_restart(addr);
 250         while(1);       /* not reached */
 251 }
 252 #endif
 253
 254 /* ------------------------------------------------------------------------- */
 255
 256 /*
 257  * For the 7400 the TB clock runs at 1/4 the cpu bus speed.
 258  */
 259 #ifdef CONFIG_AMIGAONEG3SE
 260 unsigned long get_tbclk(void)
 261 {
 262         return (gd->bus_clk / 4);
 263 }
 264 #else   /* ! CONFIG_AMIGAONEG3SE */
 265
 266 unsigned long get_tbclk (void)
 267 {
 268         return CFG_BUS_HZ / 4;
 269 }
 270 #endif  /* CONFIG_AMIGAONEG3SE */
 271 /* ------------------------------------------------------------------------- */
 272
 273 #if defined(CONFIG_WATCHDOG)
 274 #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx)
 275 void
 276 watchdog_reset(void)
 277 {
 278
 279 }
 280 #endif  /* !CONFIG_PCIPPC2 && !CONFIG_BAB7xx */
 281 #endif  /* CONFIG_WATCHDOG */
 282
 283 /* ------------------------------------------------------------------------- */