drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <asm/processor.h>
  49 #include <asm/byteorder.h>
  50 #include <environment.h>
  51 #ifdef  CFG_FLASH_CFI_DRIVER
  52
  53 /*
  54  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  55  * The width of the port and the width of the chips are determined at initialization.
  56  * These widths are used to calculate the address for access CFI data structures.
  57  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  58  *
  59  * References
  60  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  61  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  62  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  63  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  64  *
  65  * TODO
  66  *
  67  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  68  * Table (ALT) to determine if protection is available
  69  *
  70  * Add support for other command sets Use the PRI and ALT to determine command set
  71  * Verify erase and program timeouts.
  72  */
  73
  74 #ifndef CFG_FLASH_BANKS_LIST
  75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  76 #endif
  77
  78 #define FLASH_CMD_CFI                   0x98
  79 #define FLASH_CMD_READ_ID               0x90
  80 #define FLASH_CMD_RESET                 0xff
  81 #define FLASH_CMD_BLOCK_ERASE           0x20
  82 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  83 #define FLASH_CMD_WRITE                 0x40
  84 #define FLASH_CMD_PROTECT               0x60
  85 #define FLASH_CMD_PROTECT_SET           0x01
  86 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  87 #define FLASH_CMD_CLEAR_STATUS          0x50
  88 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  90
  91 #define FLASH_STATUS_DONE               0x80
  92 #define FLASH_STATUS_ESS                0x40
  93 #define FLASH_STATUS_ECLBS              0x20
  94 #define FLASH_STATUS_PSLBS              0x10
  95 #define FLASH_STATUS_VPENS              0x08
  96 #define FLASH_STATUS_PSS                0x04
  97 #define FLASH_STATUS_DPS                0x02
  98 #define FLASH_STATUS_R                  0x01
  99 #define FLASH_STATUS_PROTECT            0x01
 100
 101 #define AMD_CMD_RESET                   0xF0
 102 #define AMD_CMD_WRITE                   0xA0
 103 #define AMD_CMD_ERASE_START             0x80
 104 #define AMD_CMD_ERASE_SECTOR            0x30
 105 #define AMD_CMD_UNLOCK_START            0xAA
 106 #define AMD_CMD_UNLOCK_ACK              0x55
 107 #define AMD_CMD_WRITE_TO_BUFFER         0x25
 108 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 109
 110 #define AMD_STATUS_TOGGLE               0x40
 111 #define AMD_STATUS_ERROR                0x20
 112
 113 #define AMD_ADDR_ERASE_START    ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 114 #define AMD_ADDR_START          ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 115 #define AMD_ADDR_ACK            ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
 116
 117 #define FLASH_OFFSET_CFI                0x55
 118 #define FLASH_OFFSET_CFI_RESP           0x10
 119 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 120 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15    /* extended query table primary addr */
 121 #define FLASH_OFFSET_WTOUT              0x1F
 122 #define FLASH_OFFSET_WBTOUT             0x20
 123 #define FLASH_OFFSET_ETOUT              0x21
 124 #define FLASH_OFFSET_CETOUT             0x22
 125 #define FLASH_OFFSET_WMAX_TOUT          0x23
 126 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 127 #define FLASH_OFFSET_EMAX_TOUT          0x25
 128 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 129 #define FLASH_OFFSET_SIZE               0x27
 130 #define FLASH_OFFSET_INTERFACE          0x28
 131 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 132 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 133 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 134 #define FLASH_OFFSET_PROTECT            0x02
 135 #define FLASH_OFFSET_USER_PROTECTION    0x85
 136 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 137
 138
 139 #define FLASH_MAN_CFI                   0x01000000
 140
 141 #define CFI_CMDSET_NONE             0
 142 #define CFI_CMDSET_INTEL_EXTENDED   1
 143 #define CFI_CMDSET_AMD_STANDARD     2
 144 #define CFI_CMDSET_INTEL_STANDARD   3
 145 #define CFI_CMDSET_AMD_EXTENDED     4
 146 #define CFI_CMDSET_MITSU_STANDARD   256
 147 #define CFI_CMDSET_MITSU_EXTENDED   257
 148 #define CFI_CMDSET_SST              258
 149
 150
 151 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 152 # undef  FLASH_CMD_RESET
 153 # define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
 154 #endif
 155
 156
 157 typedef union {
 158         unsigned char c;
 159         unsigned short w;
 160         unsigned long l;
 161         unsigned long long ll;
 162 } cfiword_t;
 163
 164 typedef union {
 165         volatile unsigned char *cp;
 166         volatile unsigned short *wp;
 167         volatile unsigned long *lp;
 168         volatile unsigned long long *llp;
 169 } cfiptr_t;
 170
 171 #define NUM_ERASE_REGIONS 4
 172
 173 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 174 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 175 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 176 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 177 #else
 178 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 179 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 180 #endif
 181
 182 /*
 183  * Check if chip width is defined. If not, start detecting with 8bit.
 184  */
 185 #ifndef CFG_FLASH_CFI_WIDTH
 186 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 187 #endif
 188
 189
 190 /*-----------------------------------------------------------------------
 191  * Functions
 192  */
 193
 194 typedef unsigned long flash_sect_t;
 195
 196 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 197 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 198 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 199 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 200 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 201 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 202 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 203 static int flash_detect_cfi (flash_info_t * info);
 204 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 205 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 206                                     ulong tout, char *prompt);
 207 ulong flash_get_size (ulong base, int banknum);
 208 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 209 static flash_info_t *flash_get_info(ulong base);
 210 #endif
 211 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 212 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 213 #endif
 214
 215 /*-----------------------------------------------------------------------
 216  * create an address based on the offset and the port width
 217  */
 218 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 219 {
 220         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 221 }
 222
 223 #ifdef DEBUG
 224 /*-----------------------------------------------------------------------
 225  * Debug support
 226  */
 227 void print_longlong (char *str, unsigned long long data)
 228 {
 229         int i;
 230         char *cp;
 231
 232         cp = (unsigned char *) &data;
 233         for (i = 0; i < 8; i++)
 234                 sprintf (&str[i * 2], "%2.2x", *cp++);
 235 }
 236 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 237 {
 238         cfiptr_t cptr;
 239         int x, y;
 240
 241         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 242                 cptr.cp =
 243                         flash_make_addr (info, sect,
 244                                          x + FLASH_OFFSET_CFI_RESP);
 245                 debug ("%p : ", cptr.cp);
 246                 for (y = 0; y < 16; y++) {
 247                         debug ("%2.2x ", cptr.cp[y]);
 248                 }
 249                 debug (" ");
 250                 for (y = 0; y < 16; y++) {
 251                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 252                                 debug ("%c", cptr.cp[y]);
 253                         } else {
 254                                 debug (".");
 255                         }
 256                 }
 257                 debug ("\n");
 258         }
 259 }
 260 #endif
 261
 262
 263 /*-----------------------------------------------------------------------
 264  * read a character at a port width address
 265  */
 266 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 267 {
 268         uchar *cp;
 269
 270         cp = flash_make_addr (info, 0, offset);
 271 #if defined(__LITTLE_ENDIAN)
 272         return (cp[0]);
 273 #else
 274         return (cp[info->portwidth - 1]);
 275 #endif
 276 }
 277
 278 /*-----------------------------------------------------------------------
 279  * read a short word by swapping for ppc format.
 280  */
 281 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 282 {
 283         uchar *addr;
 284         ushort retval;
 285
 286 #ifdef DEBUG
 287         int x;
 288 #endif
 289         addr = flash_make_addr (info, sect, offset);
 290
 291 #ifdef DEBUG
 292         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 293                info->portwidth);
 294         for (x = 0; x < 2 * info->portwidth; x++) {
 295                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 296         }
 297 #endif
 298 #if defined(__LITTLE_ENDIAN)
 299         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 300 #else
 301         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 302                   addr[info->portwidth - 1]);
 303 #endif
 304
 305         debug ("retval = 0x%x\n", retval);
 306         return retval;
 307 }
 308
 309 /*-----------------------------------------------------------------------
 310  * read a long word by picking the least significant byte of each maiximum
 311  * port size word. Swap for ppc format.
 312  */
 313 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 314 {
 315         uchar *addr;
 316         ulong retval;
 317
 318 #ifdef DEBUG
 319         int x;
 320 #endif
 321         addr = flash_make_addr (info, sect, offset);
 322
 323 #ifdef DEBUG
 324         debug ("long addr is at %p info->portwidth = %d\n", addr,
 325                info->portwidth);
 326         for (x = 0; x < 4 * info->portwidth; x++) {
 327                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 328         }
 329 #endif
 330 #if defined(__LITTLE_ENDIAN)
 331         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 332                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 333 #else
 334         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 335                 (addr[(info->portwidth) - 1] << 16) |
 336                 (addr[(4 * info->portwidth) - 1] << 8) |
 337                 addr[(3 * info->portwidth) - 1];
 338 #endif
 339         return retval;
 340 }
 341
 342
 343 /*-----------------------------------------------------------------------
 344  */
 345 unsigned long flash_init (void)
 346 {
 347         unsigned long size = 0;
 348         int i;
 349
 350 #ifdef CFG_FLASH_PROTECTION
 351         char *s = getenv("unlock");
 352 #endif
 353
 354         /* Init: no FLASHes known */
 355         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 356                 flash_info[i].flash_id = FLASH_UNKNOWN;
 357                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 358                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 359 #ifndef CFG_FLASH_QUIET_TEST
 360                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 361                                 i, flash_info[i].size, flash_info[i].size << 20);
 362 #endif /* CFG_FLASH_QUIET_TEST */
 363                 }
 364 #ifdef CFG_FLASH_PROTECTION
 365                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
 366                         /*
 367                          * Only the U-Boot image and it's environment is protected,
 368                          * all other sectors are unprotected (unlocked) if flash
 369                          * hardware protection is used (CFG_FLASH_PROTECTION) and
 370                          * the environment variable "unlock" is set to "yes".
 371                          */
 372                         if (flash_info[i].legacy_unlock) {
 373                                 int k;
 374
 375                                 /*
 376                                  * Disable legacy_unlock temporarily, since
 377                                  * flash_real_protect would relock all other sectors
 378                                  * again otherwise.
 379                                  */
 380                                 flash_info[i].legacy_unlock = 0;
 381
 382                                 /*
 383                                  * Legacy unlocking (e.g. Intel J3) -> unlock only one
 384                                  * sector. This will unlock all sectors.
 385                                  */
 386                                 flash_real_protect (&flash_info[i], 0, 0);
 387
 388                                 flash_info[i].legacy_unlock = 1;
 389
 390                                 /*
 391                                  * Manually mark other sectors as unlocked (unprotected)
 392                                  */
 393                                 for (k = 1; k < flash_info[i].sector_count; k++)
 394                                         flash_info[i].protect[k] = 0;
 395                         } else {
 396                                 /*
 397                                  * No legancy unlocking -> unlock all sectors
 398                                  */
 399                                 flash_protect (FLAG_PROTECT_CLEAR,
 400                                                flash_info[i].start[0],
 401                                                flash_info[i].start[0] + flash_info[i].size - 1,
 402                                                &flash_info[i]);
 403                         }
 404                 }
 405 #endif /* CFG_FLASH_PROTECTION */
 406         }
 407
 408         /* Monitor protection ON by default */
 409 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 410         flash_protect (FLAG_PROTECT_SET,
 411                        CFG_MONITOR_BASE,
 412                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 413                        flash_get_info(CFG_MONITOR_BASE));
 414 #endif
 415
 416         /* Environment protection ON by default */
 417 #ifdef CFG_ENV_IS_IN_FLASH
 418         flash_protect (FLAG_PROTECT_SET,
 419                        CFG_ENV_ADDR,
 420                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 421                        flash_get_info(CFG_ENV_ADDR));
 422 #endif
 423
 424         /* Redundant environment protection ON by default */
 425 #ifdef CFG_ENV_ADDR_REDUND
 426         flash_protect (FLAG_PROTECT_SET,
 427                        CFG_ENV_ADDR_REDUND,
 428                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 429                        flash_get_info(CFG_ENV_ADDR_REDUND));
 430 #endif
 431         return (size);
 432 }
 433
 434 /*-----------------------------------------------------------------------
 435  */
 436 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 437 static flash_info_t *flash_get_info(ulong base)
 438 {
 439         int i;
 440         flash_info_t * info = 0;
 441
 442         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 443                 info = & flash_info[i];
 444                 if (info->size && info->start[0] <= base &&
 445                     base <= info->start[0] + info->size - 1)
 446                         break;
 447         }
 448
 449         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 450 }
 451 #endif
 452
 453 /*-----------------------------------------------------------------------
 454  */
 455 int flash_erase (flash_info_t * info, int s_first, int s_last)
 456 {
 457         int rcode = 0;
 458         int prot;
 459         flash_sect_t sect;
 460
 461         if (info->flash_id != FLASH_MAN_CFI) {
 462                 puts ("Can't erase unknown flash type - aborted\n");
 463                 return 1;
 464         }
 465         if ((s_first < 0) || (s_first > s_last)) {
 466                 puts ("- no sectors to erase\n");
 467                 return 1;
 468         }
 469
 470         prot = 0;
 471         for (sect = s_first; sect <= s_last; ++sect) {
 472                 if (info->protect[sect]) {
 473                         prot++;
 474                 }
 475         }
 476         if (prot) {
 477                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 478         } else {
 479                 putc ('\n');
 480         }
 481
 482
 483         for (sect = s_first; sect <= s_last; sect++) {
 484                 if (info->protect[sect] == 0) { /* not protected */
 485                         switch (info->vendor) {
 486                         case CFI_CMDSET_INTEL_STANDARD:
 487                         case CFI_CMDSET_INTEL_EXTENDED:
 488                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 489                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 490                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 491                                 break;
 492                         case CFI_CMDSET_AMD_STANDARD:
 493                         case CFI_CMDSET_AMD_EXTENDED:
 494                                 flash_unlock_seq (info, sect);
 495                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 496                                                         AMD_CMD_ERASE_START);
 497                                 flash_unlock_seq (info, sect);
 498                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 499                                 break;
 500                         default:
 501                                 debug ("Unkown flash vendor %d\n",
 502                                        info->vendor);
 503                                 break;
 504                         }
 505
 506                         if (flash_full_status_check
 507                             (info, sect, info->erase_blk_tout, "erase")) {
 508                                 rcode = 1;
 509                         } else
 510                                 putc ('.');
 511                 }
 512         }
 513         puts (" done\n");
 514         return rcode;
 515 }
 516
 517 /*-----------------------------------------------------------------------
 518  */
 519 void flash_print_info (flash_info_t * info)
 520 {
 521         int i;
 522
 523         if (info->flash_id != FLASH_MAN_CFI) {
 524                 puts ("missing or unknown FLASH type\n");
 525                 return;
 526         }
 527
 528         printf ("CFI conformant FLASH (%d x %d)",
 529                 (info->portwidth << 3), (info->chipwidth << 3));
 530         printf ("  Size: %ld MB in %d Sectors\n",
 531                 info->size >> 20, info->sector_count);
 532         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
 533                 info->erase_blk_tout,
 534                 info->write_tout,
 535                 info->buffer_write_tout,
 536                 info->buffer_size);
 537
 538         puts ("  Sector Start Addresses:");
 539         for (i = 0; i < info->sector_count; ++i) {
 540 #ifdef CFG_FLASH_EMPTY_INFO
 541                 int k;
 542                 int size;
 543                 int erased;
 544                 volatile unsigned long *flash;
 545
 546                 /*
 547                  * Check if whole sector is erased
 548                  */
 549                 if (i != (info->sector_count - 1))
 550                         size = info->start[i + 1] - info->start[i];
 551                 else
 552                         size = info->start[0] + info->size - info->start[i];
 553                 erased = 1;
 554                 flash = (volatile unsigned long *) info->start[i];
 555                 size = size >> 2;       /* divide by 4 for longword access */
 556                 for (k = 0; k < size; k++) {
 557                         if (*flash++ != 0xffffffff) {
 558                                 erased = 0;
 559                                 break;
 560                         }
 561                 }
 562
 563                 if ((i % 5) == 0)
 564                         printf ("\n");
 565                 /* print empty and read-only info */
 566                 printf (" %08lX%s%s",
 567                         info->start[i],
 568                         erased ? " E" : "  ",
 569                         info->protect[i] ? "RO " : "   ");
 570 #else   /* ! CFG_FLASH_EMPTY_INFO */
 571                 if ((i % 5) == 0)
 572                         printf ("\n   ");
 573                 printf (" %08lX%s",
 574                         info->start[i], info->protect[i] ? " (RO)" : "     ");
 575 #endif
 576         }
 577         putc ('\n');
 578         return;
 579 }
 580
 581 /*-----------------------------------------------------------------------
 582  * Copy memory to flash, returns:
 583  * 0 - OK
 584  * 1 - write timeout
 585  * 2 - Flash not erased
 586  */
 587 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 588 {
 589         ulong wp;
 590         ulong cp;
 591         int aln;
 592         cfiword_t cword;
 593         int i, rc;
 594
 595 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 596         int buffered_size;
 597 #endif
 598         /* get lower aligned address */
 599         /* get lower aligned address */
 600         wp = (addr & ~(info->portwidth - 1));
 601
 602         /* handle unaligned start */
 603         if ((aln = addr - wp) != 0) {
 604                 cword.l = 0;
 605                 cp = wp;
 606                 for (i = 0; i < aln; ++i, ++cp)
 607                         flash_add_byte (info, &cword, (*(uchar *) cp));
 608
 609                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 610                         flash_add_byte (info, &cword, *src++);
 611                         cnt--;
 612                         cp++;
 613                 }
 614                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 615                         flash_add_byte (info, &cword, (*(uchar *) cp));
 616                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 617                         return rc;
 618                 wp = cp;
 619         }
 620
 621         /* handle the aligned part */
 622 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 623         buffered_size = (info->portwidth / info->chipwidth);
 624         buffered_size *= info->buffer_size;
 625         while (cnt >= info->portwidth) {
 626                 /* prohibit buffer write when buffer_size is 1 */
 627                 if (info->buffer_size == 1) {
 628                         cword.l = 0;
 629                         for (i = 0; i < info->portwidth; i++)
 630                                 flash_add_byte (info, &cword, *src++);
 631                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 632                                 return rc;
 633                         wp += info->portwidth;
 634                         cnt -= info->portwidth;
 635                         continue;
 636                 }
 637
 638                 /* write buffer until next buffered_size aligned boundary */
 639                 i = buffered_size - (wp % buffered_size);
 640                 if (i > cnt)
 641                         i = cnt;
 642                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 643                         return rc;
 644                 i -= i & (info->portwidth - 1);
 645                 wp += i;
 646                 src += i;
 647                 cnt -= i;
 648         }
 649 #else
 650         while (cnt >= info->portwidth) {
 651                 cword.l = 0;
 652                 for (i = 0; i < info->portwidth; i++) {
 653                         flash_add_byte (info, &cword, *src++);
 654                 }
 655                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 656                         return rc;
 657                 wp += info->portwidth;
 658                 cnt -= info->portwidth;
 659         }
 660 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 661         if (cnt == 0) {
 662                 return (0);
 663         }
 664
 665         /*
 666          * handle unaligned tail bytes
 667          */
 668         cword.l = 0;
 669         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 670                 flash_add_byte (info, &cword, *src++);
 671                 --cnt;
 672         }
 673         for (; i < info->portwidth; ++i, ++cp) {
 674                 flash_add_byte (info, &cword, (*(uchar *) cp));
 675         }
 676
 677         return flash_write_cfiword (info, wp, cword);
 678 }
 679
 680 /*-----------------------------------------------------------------------
 681  */
 682 #ifdef CFG_FLASH_PROTECTION
 683
 684 int flash_real_protect (flash_info_t * info, long sector, int prot)
 685 {
 686         int retcode = 0;
 687
 688         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 689         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 690         if (prot)
 691                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 692         else
 693                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 694
 695         if ((retcode =
 696              flash_full_status_check (info, sector, info->erase_blk_tout,
 697                                       prot ? "protect" : "unprotect")) == 0) {
 698
 699                 info->protect[sector] = prot;
 700
 701                 /*
 702                  * On some of Intel's flash chips (marked via legacy_unlock)
 703                  * unprotect unprotects all locking.
 704                  */
 705                 if ((prot == 0) && (info->legacy_unlock)) {
 706                         flash_sect_t i;
 707
 708                         for (i = 0; i < info->sector_count; i++) {
 709                                 if (info->protect[i])
 710                                         flash_real_protect (info, i, 1);
 711                         }
 712                 }
 713         }
 714         return retcode;
 715 }
 716
 717 /*-----------------------------------------------------------------------
 718  * flash_read_user_serial - read the OneTimeProgramming cells
 719  */
 720 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 721                              int len)
 722 {
 723         uchar *src;
 724         uchar *dst;
 725
 726         dst = buffer;
 727         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 728         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 729         memcpy (dst, src + offset, len);
 730         flash_write_cmd (info, 0, 0, info->cmd_reset);
 731 }
 732
 733 /*
 734  * flash_read_factory_serial - read the device Id from the protection area
 735  */
 736 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 737                                 int len)
 738 {
 739         uchar *src;
 740
 741         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 742         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 743         memcpy (buffer, src + offset, len);
 744         flash_write_cmd (info, 0, 0, info->cmd_reset);
 745 }
 746
 747 #endif /* CFG_FLASH_PROTECTION */
 748
 749 /*
 750  * flash_is_busy - check to see if the flash is busy
 751  * This routine checks the status of the chip and returns true if the chip is busy
 752  */
 753 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 754 {
 755         int retval;
 756
 757         switch (info->vendor) {
 758         case CFI_CMDSET_INTEL_STANDARD:
 759         case CFI_CMDSET_INTEL_EXTENDED:
 760                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 761                 break;
 762         case CFI_CMDSET_AMD_STANDARD:
 763         case CFI_CMDSET_AMD_EXTENDED:
 764                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 765                 break;
 766         default:
 767                 retval = 0;
 768         }
 769         debug ("flash_is_busy: %d\n", retval);
 770         return retval;
 771 }
 772
 773 /*-----------------------------------------------------------------------
 774  *  wait for XSR.7 to be set. Time out with an error if it does not.
 775  *  This routine does not set the flash to read-array mode.
 776  */
 777 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 778                                ulong tout, char *prompt)
 779 {
 780         ulong start;
 781
 782 #if CFG_HZ != 1000
 783         tout *= CFG_HZ/1000;
 784 #endif
 785
 786         /* Wait for command completion */
 787         start = get_timer (0);
 788         while (flash_is_busy (info, sector)) {
 789                 if (get_timer (start) > tout) {
 790                         printf ("Flash %s timeout at address %lx data %lx\n",
 791                                 prompt, info->start[sector],
 792                                 flash_read_long (info, sector, 0));
 793                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 794                         return ERR_TIMOUT;
 795                 }
 796                 udelay (1);             /* also triggers watchdog */
 797         }
 798         return ERR_OK;
 799 }
 800
 801 /*-----------------------------------------------------------------------
 802  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 803  * This routine sets the flash to read-array mode.
 804  */
 805 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 806                                     ulong tout, char *prompt)
 807 {
 808         int retcode;
 809
 810         retcode = flash_status_check (info, sector, tout, prompt);
 811         switch (info->vendor) {
 812         case CFI_CMDSET_INTEL_EXTENDED:
 813         case CFI_CMDSET_INTEL_STANDARD:
 814                 if ((retcode == ERR_OK)
 815                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 816                         retcode = ERR_INVAL;
 817                         printf ("Flash %s error at address %lx\n", prompt,
 818                                 info->start[sector]);
 819                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 820                                 puts ("Command Sequence Error.\n");
 821                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 822                                 puts ("Block Erase Error.\n");
 823                                 retcode = ERR_NOT_ERASED;
 824                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 825                                 puts ("Locking Error\n");
 826                         }
 827                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 828                                 puts ("Block locked.\n");
 829                                 retcode = ERR_PROTECTED;
 830                         }
 831                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 832                                 puts ("Vpp Low Error.\n");
 833                 }
 834                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 835                 break;
 836         default:
 837                 break;
 838         }
 839         return retcode;
 840 }
 841
 842 /*-----------------------------------------------------------------------
 843  */
 844 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 845 {
 846 #if defined(__LITTLE_ENDIAN)
 847         unsigned short  w;
 848         unsigned int    l;
 849         unsigned long long ll;
 850 #endif
 851
 852         switch (info->portwidth) {
 853         case FLASH_CFI_8BIT:
 854                 cword->c = c;
 855                 break;
 856         case FLASH_CFI_16BIT:
 857 #if defined(__LITTLE_ENDIAN)
 858                 w = c;
 859                 w <<= 8;
 860                 cword->w = (cword->w >> 8) | w;
 861 #else
 862                 cword->w = (cword->w << 8) | c;
 863 #endif
 864                 break;
 865         case FLASH_CFI_32BIT:
 866 #if defined(__LITTLE_ENDIAN)
 867                 l = c;
 868                 l <<= 24;
 869                 cword->l = (cword->l >> 8) | l;
 870 #else
 871                 cword->l = (cword->l << 8) | c;
 872 #endif
 873                 break;
 874         case FLASH_CFI_64BIT:
 875 #if defined(__LITTLE_ENDIAN)
 876                 ll = c;
 877                 ll <<= 56;
 878                 cword->ll = (cword->ll >> 8) | ll;
 879 #else
 880                 cword->ll = (cword->ll << 8) | c;
 881 #endif
 882                 break;
 883         }
 884 }
 885
 886
 887 /*-----------------------------------------------------------------------
 888  * make a proper sized command based on the port and chip widths
 889  */
 890 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 891 {
 892         int i;
 893         uchar *cp = (uchar *) cmdbuf;
 894
 895 #if defined(__LITTLE_ENDIAN)
 896         for (i = info->portwidth; i > 0; i--)
 897 #else
 898         for (i = 1; i <= info->portwidth; i++)
 899 #endif
 900                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 901 }
 902
 903 /*
 904  * Write a proper sized command to the correct address
 905  */
 906 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 907 {
 908
 909         volatile cfiptr_t addr;
 910         cfiword_t cword;
 911
 912         addr.cp = flash_make_addr (info, sect, offset);
 913         flash_make_cmd (info, cmd, &cword);
 914         switch (info->portwidth) {
 915         case FLASH_CFI_8BIT:
 916                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 917                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 918                 *addr.cp = cword.c;
 919 #ifdef CONFIG_BLACKFIN
 920                 asm("ssync;");
 921 #endif
 922                 break;
 923         case FLASH_CFI_16BIT:
 924                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 925                        cmd, cword.w,
 926                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 927                 *addr.wp = cword.w;
 928 #ifdef CONFIG_BLACKFIN
 929                 asm("ssync;");
 930 #endif
 931                 break;
 932         case FLASH_CFI_32BIT:
 933                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 934                        cmd, cword.l,
 935                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 936                 *addr.lp = cword.l;
 937 #ifdef CONFIG_BLACKFIN
 938                 asm("ssync;");
 939 #endif
 940                 break;
 941         case FLASH_CFI_64BIT:
 942 #ifdef DEBUG
 943                 {
 944                         char str[20];
 945
 946                         print_longlong (str, cword.ll);
 947
 948                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 949                                addr.llp, cmd, str,
 950                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 951                 }
 952 #endif
 953                 *addr.llp = cword.ll;
 954 #ifdef CONFIG_BLACKFIN
 955                 asm("ssync;");
 956 #endif
 957                 break;
 958         }
 959 }
 960
 961 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 962 {
 963         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 964         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 965 }
 966
 967 /*-----------------------------------------------------------------------
 968  */
 969 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 970 {
 971         cfiptr_t cptr;
 972         cfiword_t cword;
 973         int retval;
 974
 975         cptr.cp = flash_make_addr (info, sect, offset);
 976         flash_make_cmd (info, cmd, &cword);
 977
 978         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 979         switch (info->portwidth) {
 980         case FLASH_CFI_8BIT:
 981                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 982                 retval = (cptr.cp[0] == cword.c);
 983                 break;
 984         case FLASH_CFI_16BIT:
 985                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 986                 retval = (cptr.wp[0] == cword.w);
 987                 break;
 988         case FLASH_CFI_32BIT:
 989                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 990                 retval = (cptr.lp[0] == cword.l);
 991                 break;
 992         case FLASH_CFI_64BIT:
 993 #ifdef DEBUG
 994                 {
 995                         char str1[20];
 996                         char str2[20];
 997
 998                         print_longlong (str1, cptr.llp[0]);
 999                         print_longlong (str2, cword.ll);
1000                         debug ("is= %s %s\n", str1, str2);
1001                 }
1002 #endif
1003                 retval = (cptr.llp[0] == cword.ll);
1004                 break;
1005         default:
1006                 retval = 0;
1007                 break;
1008         }
1009         return retval;
1010 }
1011
1012 /*-----------------------------------------------------------------------
1013  */
1014 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1015 {
1016         cfiptr_t cptr;
1017         cfiword_t cword;
1018         int retval;
1019
1020         cptr.cp = flash_make_addr (info, sect, offset);
1021         flash_make_cmd (info, cmd, &cword);
1022         switch (info->portwidth) {
1023         case FLASH_CFI_8BIT:
1024                 retval = ((cptr.cp[0] & cword.c) == cword.c);
1025                 break;
1026         case FLASH_CFI_16BIT:
1027                 retval = ((cptr.wp[0] & cword.w) == cword.w);
1028                 break;
1029         case FLASH_CFI_32BIT:
1030                 retval = ((cptr.lp[0] & cword.l) == cword.l);
1031                 break;
1032         case FLASH_CFI_64BIT:
1033                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1034                 break;
1035         default:
1036                 retval = 0;
1037                 break;
1038         }
1039         return retval;
1040 }
1041
1042 /*-----------------------------------------------------------------------
1043  */
1044 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1045 {
1046         cfiptr_t cptr;
1047         cfiword_t cword;
1048         int retval;
1049
1050         cptr.cp = flash_make_addr (info, sect, offset);
1051         flash_make_cmd (info, cmd, &cword);
1052         switch (info->portwidth) {
1053         case FLASH_CFI_8BIT:
1054                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1055                 break;
1056         case FLASH_CFI_16BIT:
1057                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1058                 break;
1059         case FLASH_CFI_32BIT:
1060                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1061                 break;
1062         case FLASH_CFI_64BIT:
1063                 retval = ((cptr.llp[0] & cword.ll) !=
1064                           (cptr.llp[0] & cword.ll));
1065                 break;
1066         default:
1067                 retval = 0;
1068                 break;
1069         }
1070         return retval;
1071 }
1072
1073 /*-----------------------------------------------------------------------
1074  * detect if flash is compatible with the Common Flash Interface (CFI)
1075  * http://www.jedec.org/download/search/jesd68.pdf
1076  *
1077 */
1078 static int flash_detect_cfi (flash_info_t * info)
1079 {
1080         debug ("flash detect cfi\n");
1081
1082         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1083              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1084                 for (info->chipwidth = FLASH_CFI_BY8;
1085                      info->chipwidth <= info->portwidth;
1086                      info->chipwidth <<= 1) {
1087                         flash_write_cmd (info, 0, 0, info->cmd_reset);
1088                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1089                         /* wait for Flash data ready */
1090                         udelay(10);
1091                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1092                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1093                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1094                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1095                                 debug ("device interface is %d\n",
1096                                        info->interface);
1097                                 debug ("found port %d chip %d ",
1098                                        info->portwidth, info->chipwidth);
1099                                 debug ("port %d bits chip %d bits\n",
1100                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1101                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1102                                 return 1;
1103                         }
1104                 }
1105         }
1106         debug ("not found\n");
1107         return 0;
1108 }
1109
1110 /*
1111  * The following code cannot be run from FLASH!
1112  *
1113  */
1114 ulong flash_get_size (ulong base, int banknum)
1115 {
1116         flash_info_t *info = &flash_info[banknum];
1117         int i, j;
1118         flash_sect_t sect_cnt;
1119         unsigned long sector;
1120         unsigned long tmp;
1121         int size_ratio;
1122         uchar num_erase_regions;
1123         int erase_region_size;
1124         int erase_region_count;
1125 #ifdef CFG_FLASH_PROTECTION
1126         int ext_addr;
1127         info->legacy_unlock = 0;
1128 #endif
1129
1130         info->start[0] = base;
1131
1132         if (flash_detect_cfi (info)) {
1133                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1134 #ifdef DEBUG
1135                 flash_printqry (info, 0);
1136 #endif
1137                 switch (info->vendor) {
1138                 case CFI_CMDSET_INTEL_STANDARD:
1139                 case CFI_CMDSET_INTEL_EXTENDED:
1140                 default:
1141                         info->cmd_reset = FLASH_CMD_RESET;
1142 #ifdef CFG_FLASH_PROTECTION
1143                         /* read legacy lock/unlock bit from intel flash */
1144                         ext_addr = flash_read_ushort (info, 0,
1145                                                       FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1146                         info->legacy_unlock =
1147                                 flash_read_uchar (info, ext_addr + 5) & 0x08;
1148 #endif
1149                         break;
1150                 case CFI_CMDSET_AMD_STANDARD:
1151                 case CFI_CMDSET_AMD_EXTENDED:
1152                         info->cmd_reset = AMD_CMD_RESET;
1153                         break;
1154                 }
1155
1156                 debug ("manufacturer is %d\n", info->vendor);
1157                 size_ratio = info->portwidth / info->chipwidth;
1158                 /* if the chip is x8/x16 reduce the ratio by half */
1159                 if ((info->interface == FLASH_CFI_X8X16)
1160                     && (info->chipwidth == FLASH_CFI_BY8)) {
1161                         size_ratio >>= 1;
1162                 }
1163                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1164                 debug ("size_ratio %d port %d bits chip %d bits\n",
1165                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1166                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1167                 debug ("found %d erase regions\n", num_erase_regions);
1168                 sect_cnt = 0;
1169                 sector = base;
1170                 for (i = 0; i < num_erase_regions; i++) {
1171                         if (i > NUM_ERASE_REGIONS) {
1172                                 printf ("%d erase regions found, only %d used\n",
1173                                         num_erase_regions, NUM_ERASE_REGIONS);
1174                                 break;
1175                         }
1176                         tmp = flash_read_long (info, 0,
1177                                                FLASH_OFFSET_ERASE_REGIONS +
1178                                                i * 4);
1179                         erase_region_size =
1180                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1181                         tmp >>= 16;
1182                         erase_region_count = (tmp & 0xffff) + 1;
1183                         debug ("erase_region_count = %d erase_region_size = %d\n",
1184                                 erase_region_count, erase_region_size);
1185                         for (j = 0; j < erase_region_count; j++) {
1186                                 info->start[sect_cnt] = sector;
1187                                 sector += (erase_region_size * size_ratio);
1188
1189                                 /*
1190                                  * Only read protection status from supported devices (intel...)
1191                                  */
1192                                 switch (info->vendor) {
1193                                 case CFI_CMDSET_INTEL_EXTENDED:
1194                                 case CFI_CMDSET_INTEL_STANDARD:
1195                                         info->protect[sect_cnt] =
1196                                                 flash_isset (info, sect_cnt,
1197                                                              FLASH_OFFSET_PROTECT,
1198                                                              FLASH_STATUS_PROTECT);
1199                                         break;
1200                                 default:
1201                                         info->protect[sect_cnt] = 0; /* default: not protected */
1202                                 }
1203
1204                                 sect_cnt++;
1205                         }
1206                 }
1207
1208                 info->sector_count = sect_cnt;
1209                 /* multiply the size by the number of chips */
1210                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1211                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1212                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1213                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1214                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1215                         (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1216                 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1217                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1218                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1219                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1220                 info->flash_id = FLASH_MAN_CFI;
1221                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1222                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1223                 }
1224         }
1225
1226         flash_write_cmd (info, 0, 0, info->cmd_reset);
1227         return (info->size);
1228 }
1229
1230 /* loop through the sectors from the highest address
1231  * when the passed address is greater or equal to the sector address
1232  * we have a match
1233  */
1234 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1235 {
1236         flash_sect_t sector;
1237
1238         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1239                 if (addr >= info->start[sector])
1240                         break;
1241         }
1242         return sector;
1243 }
1244
1245 /*-----------------------------------------------------------------------
1246  */
1247 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1248                                 cfiword_t cword)
1249 {
1250         cfiptr_t ctladdr;
1251         cfiptr_t cptr;
1252         int flag;
1253
1254         ctladdr.cp = flash_make_addr (info, 0, 0);
1255         cptr.cp = (uchar *) dest;
1256
1257
1258         /* Check if Flash is (sufficiently) erased */
1259         switch (info->portwidth) {
1260         case FLASH_CFI_8BIT:
1261                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1262                 break;
1263         case FLASH_CFI_16BIT:
1264                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1265                 break;
1266         case FLASH_CFI_32BIT:
1267                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1268                 break;
1269         case FLASH_CFI_64BIT:
1270                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1271                 break;
1272         default:
1273                 return 2;
1274         }
1275         if (!flag)
1276                 return 2;
1277
1278         /* Disable interrupts which might cause a timeout here */
1279         flag = disable_interrupts ();
1280
1281         switch (info->vendor) {
1282         case CFI_CMDSET_INTEL_EXTENDED:
1283         case CFI_CMDSET_INTEL_STANDARD:
1284                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1285                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1286                 break;
1287         case CFI_CMDSET_AMD_EXTENDED:
1288         case CFI_CMDSET_AMD_STANDARD:
1289                 flash_unlock_seq (info, 0);
1290                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1291                 break;
1292         }
1293
1294         switch (info->portwidth) {
1295         case FLASH_CFI_8BIT:
1296                 cptr.cp[0] = cword.c;
1297                 break;
1298         case FLASH_CFI_16BIT:
1299                 cptr.wp[0] = cword.w;
1300                 break;
1301         case FLASH_CFI_32BIT:
1302                 cptr.lp[0] = cword.l;
1303                 break;
1304         case FLASH_CFI_64BIT:
1305                 cptr.llp[0] = cword.ll;
1306                 break;
1307         }
1308
1309         /* re-enable interrupts if necessary */
1310         if (flag)
1311                 enable_interrupts ();
1312
1313         return flash_full_status_check (info, find_sector (info, dest),
1314                                         info->write_tout, "write");
1315 }
1316
1317 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1318
1319 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1320                                   int len)
1321 {
1322         flash_sect_t sector;
1323         int cnt;
1324         int retcode;
1325         volatile cfiptr_t src;
1326         volatile cfiptr_t dst;
1327
1328         switch (info->vendor) {
1329         case CFI_CMDSET_INTEL_STANDARD:
1330         case CFI_CMDSET_INTEL_EXTENDED:
1331                 src.cp = cp;
1332                 dst.cp = (uchar *) dest;
1333                 sector = find_sector (info, dest);
1334                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1335                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1336                 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1337                                                    "write to buffer")) == ERR_OK) {
1338                         /* reduce the number of loops by the width of the port  */
1339                         switch (info->portwidth) {
1340                         case FLASH_CFI_8BIT:
1341                                 cnt = len;
1342                                 break;
1343                         case FLASH_CFI_16BIT:
1344                                 cnt = len >> 1;
1345                                 break;
1346                         case FLASH_CFI_32BIT:
1347                                 cnt = len >> 2;
1348                                 break;
1349                         case FLASH_CFI_64BIT:
1350                                 cnt = len >> 3;
1351                                 break;
1352                         default:
1353                                 return ERR_INVAL;
1354                                 break;
1355                         }
1356                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1357                         while (cnt-- > 0) {
1358                                 switch (info->portwidth) {
1359                                 case FLASH_CFI_8BIT:
1360                                         *dst.cp++ = *src.cp++;
1361                                         break;
1362                                 case FLASH_CFI_16BIT:
1363                                         *dst.wp++ = *src.wp++;
1364                                         break;
1365                                 case FLASH_CFI_32BIT:
1366                                         *dst.lp++ = *src.lp++;
1367                                         break;
1368                                 case FLASH_CFI_64BIT:
1369                                         *dst.llp++ = *src.llp++;
1370                                         break;
1371                                 default:
1372                                         return ERR_INVAL;
1373                                         break;
1374                                 }
1375                         }
1376                         flash_write_cmd (info, sector, 0,
1377                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1378                         retcode = flash_full_status_check (info, sector,
1379                                                            info->buffer_write_tout,
1380                                                            "buffer write");
1381                 }
1382                 return retcode;
1383
1384         case CFI_CMDSET_AMD_STANDARD:
1385         case CFI_CMDSET_AMD_EXTENDED:
1386                 src.cp = cp;
1387                 dst.cp = (uchar *) dest;
1388                 sector = find_sector (info, dest);
1389
1390                 flash_unlock_seq(info,0);
1391                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1392
1393                 switch (info->portwidth) {
1394                 case FLASH_CFI_8BIT:
1395                         cnt = len;
1396                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1397                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1398                         break;
1399                 case FLASH_CFI_16BIT:
1400                         cnt = len >> 1;
1401                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1402                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1403                         break;
1404                 case FLASH_CFI_32BIT:
1405                         cnt = len >> 2;
1406                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1407                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1408                         break;
1409                 case FLASH_CFI_64BIT:
1410                         cnt = len >> 3;
1411                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1412                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1413                         break;
1414                 default:
1415                         return ERR_INVAL;
1416                 }
1417
1418                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1419                 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1420                                                    "buffer write");
1421                 return retcode;
1422
1423         default:
1424                 debug ("Unknown Command Set\n");
1425                 return ERR_INVAL;
1426         }
1427 }
1428 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1429 #endif /* CFG_FLASH_CFI */