4 * Copyright (c) 2004 Texas Instruments
6 * This package is free software; you can redistribute it and/or
7 * modify it under the terms of the license found in the file
8 * named COPYING that should have accompanied this file.
10 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
11 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
12 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
14 * Author: Jian Zhang jzhang@ti.com, Texas Instruments
16 * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
17 * Rewritten to fit into the current U-Boot framework
19 * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
25 #ifdef CONFIG_DRIVER_OMAP24XX_I2C
27 #include <asm/arch/i2c.h>
30 #define inw(a) __raw_readw(a)
31 #define outw(a,v) __raw_writew(a,v)
33 static void wait_for_bb (void);
34 static u16
wait_for_pin (void);
35 static void flush_fifo(void);
37 void i2c_init (int speed
, int slaveadd
)
41 outw(0x2, I2C_SYSC
); /* for ES2 after soft reset */
43 outw(0x0, I2C_SYSC
); /* will probably self clear but */
45 if (inw (I2C_CON
) & I2C_CON_EN
) {
50 /* 12Mhz I2C module clock */
52 speed
= speed
/1000; /* 100 or 400 */
53 scl
= ((12000/(speed
*2)) - 7); /* use 7 when PSC = 0 */
57 outw (slaveadd
, I2C_OA
);
58 outw (I2C_CON_EN
, I2C_CON
);
60 /* have to enable intrrupts or OMAP i2c module doesn't work */
61 outw (I2C_IE_XRDY_IE
| I2C_IE_RRDY_IE
| I2C_IE_ARDY_IE
|
62 I2C_IE_NACK_IE
| I2C_IE_AL_IE
, I2C_IE
);
65 outw (0xFFFF, I2C_STAT
);
69 static int i2c_read_byte (u8 devaddr
, u8 regoffset
, u8
* value
)
74 /* wait until bus not busy */
79 /* set slave address */
80 outw (devaddr
, I2C_SA
);
81 /* no stop bit needed here */
82 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_TRX
, I2C_CON
);
84 status
= wait_for_pin ();
86 if (status
& I2C_STAT_XRDY
) {
87 /* Important: have to use byte access */
88 *(volatile u8
*) (I2C_DATA
) = regoffset
;
90 if (inw (I2C_STAT
) & I2C_STAT_NACK
) {
98 /* free bus, otherwise we can't use a combined transction */
100 while (inw (I2C_STAT
) || (inw (I2C_CON
) & I2C_CON_MST
)) {
102 /* Have to clear pending interrupt to clear I2C_STAT */
103 outw (0xFFFF, I2C_STAT
);
107 /* set slave address */
108 outw (devaddr
, I2C_SA
);
109 /* read one byte from slave */
111 /* need stop bit here */
112 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_STP
,
115 status
= wait_for_pin ();
116 if (status
& I2C_STAT_RRDY
) {
117 *value
= inw (I2C_DATA
);
124 outw (I2C_CON_EN
, I2C_CON
);
125 while (inw (I2C_STAT
)
126 || (inw (I2C_CON
) & I2C_CON_MST
)) {
128 outw (0xFFFF, I2C_STAT
);
133 outw (0xFFFF, I2C_STAT
);
138 static int i2c_write_byte (u8 devaddr
, u8 regoffset
, u8 value
)
143 /* wait until bus not busy */
148 /* set slave address */
149 outw (devaddr
, I2C_SA
);
150 /* stop bit needed here */
151 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_TRX
|
152 I2C_CON_STP
, I2C_CON
);
154 /* wait until state change */
155 status
= wait_for_pin ();
157 if (status
& I2C_STAT_XRDY
) {
158 /* send out two bytes */
159 outw ((value
<< 8) + regoffset
, I2C_DATA
);
160 /* must have enough delay to allow BB bit to go low */
162 if (inw (I2C_STAT
) & I2C_STAT_NACK
) {
172 outw (I2C_CON_EN
, I2C_CON
);
173 while ((stat
= inw (I2C_STAT
)) || (inw (I2C_CON
) & I2C_CON_MST
)) {
175 /* have to read to clear intrrupt */
176 outw (0xFFFF, I2C_STAT
);
177 if(--eout
== 0) /* better leave with error than hang */
182 outw (0xFFFF, I2C_STAT
);
187 static void flush_fifo(void)
190 /* note: if you try and read data when its not there or ready
191 * you get a bus error
194 stat
= inw(I2C_STAT
);
195 if(stat
== I2C_STAT_RRDY
){
197 outw(I2C_STAT_RRDY
,I2C_STAT
);
204 int i2c_probe (uchar chip
)
206 int res
= 1; /* default = fail */
208 if (chip
== inw (I2C_OA
)) {
212 /* wait until bus not busy */
215 /* try to read one byte */
217 /* set slave address */
219 /* stop bit needed here */
220 outw (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_STP
, I2C_CON
);
221 /* enough delay for the NACK bit set */
224 if (!(inw (I2C_STAT
) & I2C_STAT_NACK
)) {
225 res
= 0; /* success case */
227 outw(0xFFFF, I2C_STAT
);
229 outw(0xFFFF, I2C_STAT
); /* failue, clear sources*/
230 outw (inw (I2C_CON
) | I2C_CON_STP
, I2C_CON
); /* finish up xfer */
235 outw (0, I2C_CNT
); /* don't allow any more data in...we don't want it.*/
236 outw(0xFFFF, I2C_STAT
);
240 int i2c_read (uchar chip
, uint addr
, int alen
, uchar
* buffer
, int len
)
245 printf ("I2C read: addr len %d not supported\n", alen
);
249 if (addr
+ len
> 256) {
250 printf ("I2C read: address out of range\n");
254 for (i
= 0; i
< len
; i
++) {
255 if (i2c_read_byte (chip
, addr
+ i
, &buffer
[i
])) {
256 printf ("I2C read: I/O error\n");
257 i2c_init (CFG_I2C_SPEED
, CFG_I2C_SLAVE
);
265 int i2c_write (uchar chip
, uint addr
, int alen
, uchar
* buffer
, int len
)
270 printf ("I2C read: addr len %d not supported\n", alen
);
274 if (addr
+ len
> 256) {
275 printf ("I2C read: address out of range\n");
279 for (i
= 0; i
< len
; i
++) {
280 if (i2c_write_byte (chip
, addr
+ i
, buffer
[i
])) {
281 printf ("I2C read: I/O error\n");
282 i2c_init (CFG_I2C_SPEED
, CFG_I2C_SLAVE
);
290 static void wait_for_bb (void)
295 outw(0xFFFF, I2C_STAT
); /* clear current interruts...*/
296 while ((stat
= inw (I2C_STAT
) & I2C_STAT_BB
) && timeout
--) {
297 outw (stat
, I2C_STAT
);
302 printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
305 outw(0xFFFF, I2C_STAT
); /* clear delayed stuff*/
308 static u16
wait_for_pin (void)
315 status
= inw (I2C_STAT
);
317 (I2C_STAT_ROVR
| I2C_STAT_XUDF
| I2C_STAT_XRDY
|
318 I2C_STAT_RRDY
| I2C_STAT_ARDY
| I2C_STAT_NACK
|
319 I2C_STAT_AL
)) && timeout
--);
322 printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
324 outw(0xFFFF, I2C_STAT
);
329 #endif /* CONFIG_DRIVER_OMAP24XX_I2C */