4 * Copyright (c) 2005 blackfin.uclinux.org
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #ifndef _BLACKFIN_IO_H
29 #define _BLACKFIN_IO_H
33 #include <linux/config.h>
36 * These are for ISA/PCI shared memory _only_ and should never be used
37 * on any other type of memory, including Zorro memory. They are meant to
38 * access the bus in the bus byte order which is little-endian!.
40 * readX/writeX() are used to access memory mapped devices. On some
41 * architectures the memory mapped IO stuff needs to be accessed
42 * differently. On the m68k architecture, we just read/write the
43 * memory location directly.
45 /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
46 * two accesses to memory, which may be undesireable for some devices.
48 #define readb(addr) ({ unsigned char __v = (*(volatile unsigned char *) (addr));asm("ssync;"); __v; })
49 #define readw(addr) ({ unsigned short __v = (*(volatile unsigned short *) (addr)); asm("ssync;");__v; })
50 #define readl(addr) ({ unsigned int __v = (*(volatile unsigned int *) (addr));asm("ssync;"); __v; })
51 #define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))
52 #define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))
53 #define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))
54 #define __raw_readb readb
55 #define __raw_readw readw
56 #define __raw_readl readl
57 #define __raw_writeb writeb
58 #define __raw_writew writew
59 #define __raw_writel writel
60 #define memset_io(a,b,c) memset((void *)(a),(b),(c))
61 #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
62 #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
63 #define inb(addr) cf_inb((volatile unsigned char*)(addr))
64 #define inw(addr) readw(addr)
65 #define inl(addr) readl(addr)
66 #define outb(x,addr) cf_outb((unsigned char)(x), (volatile unsigned char*)(addr))
67 #define outw(x,addr) ((void) writew(x,addr))
68 #define outl(x,addr) ((void) writel(x,addr))
69 #define inb_p(addr) inb(addr)
70 #define inw_p(addr) inw(addr)
71 #define inl_p(addr) inl(addr)
72 #define outb_p(x,addr) outb(x,addr)
73 #define outw_p(x,addr) outw(x,addr)
74 #define outl_p(x,addr) outl(x,addr)
75 #define insb(port, addr, count) memcpy((void*)addr, (void*)port, count)
76 #define insw(port, addr, count) cf_insw((unsigned short*)addr, (unsigned short*)(port), (count))
77 #define insl(port, addr, count) memcpy((void*)addr, (void*)port, (4*count))
78 #define outsb(port, addr, count) memcpy((void*)port, (void*)addr, count)
79 #define outsw(port,addr,count) cf_outsw((unsigned short*)(port), (unsigned short*)addr, (count))
80 #define outsl(port, addr, count) memcpy((void*)port, (void*)addr, (4*count))
81 #define IO_SPACE_LIMIT 0xffff
83 /* Values for nocacheflag and cmode */
84 #define IOMAP_FULL_CACHING 0
85 #define IOMAP_NOCACHE_SER 1
86 #define IOMAP_NOCACHE_NONSER 2
87 #define IOMAP_WRITETHROUGH 3
90 extern void *__ioremap(unsigned long physaddr
, unsigned long size
, int cacheflag
);
91 extern void __iounmap(void *addr
, unsigned long size
);
92 extern inline void *ioremap(unsigned long physaddr
, unsigned long size
)
94 return __ioremap(physaddr
, size
, IOMAP_NOCACHE_SER
);
96 extern inline void *ioremap_nocache(unsigned long physaddr
, unsigned long size
)
98 return __ioremap(physaddr
, size
, IOMAP_NOCACHE_SER
);
100 extern inline void *ioremap_writethrough(unsigned long physaddr
, unsigned long size
)
102 return __ioremap(physaddr
, size
, IOMAP_WRITETHROUGH
);
104 extern inline void *ioremap_fullcache(unsigned long physaddr
, unsigned long size
)
106 return __ioremap(physaddr
, size
, IOMAP_FULL_CACHING
);
109 extern void iounmap(void *addr
);
113 extern void blkfin_inv_cache_all(void);
117 #define dma_cache_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
118 #define dma_cache_wback(_start,_size) do { } while (0)
119 #define dma_cache_wback_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
121 /* Pages to physical address... */
122 #define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
123 #define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
125 #define mm_ptov(vaddr) ((void *) (vaddr))
126 #define mm_vtop(vaddr) ((unsigned long) (vaddr))
127 #define phys_to_virt(vaddr) ((void *) (vaddr))
128 #define virt_to_phys(vaddr) ((unsigned long) (vaddr))
130 #define virt_to_bus virt_to_phys
131 #define bus_to_virt phys_to_virt