cpu/mpc5xx/cpu.c

   1 /*
   2  * (C) Copyright 2003
   3  * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation,
  21  */
  22
  23 /*
  24  * File:                cpu.c
  25  *
  26  * Discription:         Some cpu specific function for watchdog,
  27  *                      cpu version test, clock setting ...
  28  *
  29  */
  30
  31
  32 #include <common.h>
  33 #include <watchdog.h>
  34 #include <command.h>
  35 #include <mpc5xx.h>
  36
  37 DECLARE_GLOBAL_DATA_PTR;
  38
  39 #if (defined(CONFIG_MPC555))
  40 #  define       ID_STR  "MPC555/556"
  41
  42 /*
  43  * Check version of cpu with Processor Version Register (PVR)
  44  */
  45 static int check_cpu_version (long clock, uint pvr, uint immr)
  46 {
  47     char buf[32];
  48         /* The highest 16 bits should be 0x0002 for a MPC555/556 */
  49         if ((pvr >> 16) == 0x0002) {
  50                 printf (" " ID_STR " Version %x", (pvr >> 16));
  51                 printf (" at %s MHz:", strmhz (buf, clock));
  52         } else {
  53                 printf ("Not supported cpu version");
  54                 return -1;
  55         }
  56         return 0;
  57 }
  58 #endif /* CONFIG_MPC555 */
  59
  60
  61 /*
  62  * Check version of mpc5xx
  63  */
  64 int checkcpu (void)
  65 {
  66         ulong clock = gd->cpu_clk;
  67         uint immr = get_immr (0);       /* Return full IMMR contents */
  68         uint pvr = get_pvr ();          /* Retrieve PVR register */
  69
  70         puts ("CPU:   ");
  71
  72         return check_cpu_version (clock, pvr, immr);
  73 }
  74
  75 /*
  76  * Called by macro WATCHDOG_RESET
  77  */
  78 #if defined(CONFIG_WATCHDOG)
  79 void watchdog_reset (void)
  80 {
  81         int re_enable = disable_interrupts ();
  82
  83         reset_5xx_watchdog ((immap_t *) CFG_IMMR);
  84         if (re_enable)
  85                 enable_interrupts ();
  86 }
  87
  88 /*
  89  * Will clear software reset
  90  */
  91 void reset_5xx_watchdog (volatile immap_t * immr)
  92 {
  93         /* Use the MPC5xx Internal Watchdog */
  94         immr->im_siu_conf.sc_swsr = 0x556c;     /* Prevent SW time-out */
  95         immr->im_siu_conf.sc_swsr = 0xaa39;
  96 }
  97
  98 #endif /* CONFIG_WATCHDOG */
  99
 100
 101 /*
 102  * Get timebase clock frequency
 103  */
 104 unsigned long get_tbclk (void)
 105 {
 106         volatile immap_t *immr = (volatile immap_t *) CFG_IMMR;
 107         ulong oscclk, factor;
 108
 109         if (immr->im_clkrst.car_sccr & SCCR_TBS) {
 110                 return (gd->cpu_clk / 16);
 111         }
 112
 113         factor = (((CFG_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1;
 114
 115         oscclk = gd->cpu_clk / factor;
 116
 117         if ((immr->im_clkrst.car_sccr & SCCR_RTSEL) == 0 || factor > 2) {
 118                 return (oscclk / 4);
 119         }
 120         return (oscclk / 16);
 121 }
 122
 123 void dcache_enable (void)
 124 {
 125         return;
 126 }
 127
 128 void dcache_disable (void)
 129 {
 130         return;
 131 }
 132
 133 int dcache_status (void)
 134 {
 135         return 0;       /* always off */
 136 }
 137
 138 /*
 139  * Reset board
 140  */
 141 int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 142 {
 143 #if defined(CONFIG_PATI)
 144         volatile ulong *addr = (ulong *) CFG_RESET_ADDRESS;
 145         *addr = 1;
 146 #else
 147         ulong addr;
 148
 149         /* Interrupts off, enable reset */
 150         __asm__ volatile        ("  mtspr       81, %r0         \n\t"
 151                                  "  mfmsr       %r3             \n\t"
 152                                  "  rlwinm      %r31,%r3,0,25,23\n\t"
 153                                  "  mtmsr       %r31            \n\t");
 154         /*
 155          * Trying to execute the next instruction at a non-existing address
 156          * should cause a machine check, resulting in reset
 157          */
 158 #ifdef CFG_RESET_ADDRESS
 159         addr = CFG_RESET_ADDRESS;
 160 #else
 161         /*
 162          * note: when CFG_MONITOR_BASE points to a RAM address, CFG_MONITOR_BASE         * - sizeof (ulong) is usually a valid address. Better pick an address
 163          * known to be invalid on your system and assign it to CFG_RESET_ADDRESS.
 164          * "(ulong)-1" used to be a good choice for many systems...
 165          */
 166         addr = CFG_MONITOR_BASE - sizeof (ulong);
 167 #endif
 168         ((void (*) (void)) addr) ();
 169 #endif  /* #if defined(CONFIG_PATI) */
 170         return 1;
 171 }