cpu/mpc5xx/speed.c

   1 /*
   2  * (C) Copyright 2003
   3  * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation,
  21  */
  22
  23 /*
  24  * File:                speed.c
  25  *
  26  * Discription:         Provides cpu speed calculation
  27  *
  28  */
  29
  30 #include <common.h>
  31 #include <mpc5xx.h>
  32 #include <asm/processor.h>
  33
  34 DECLARE_GLOBAL_DATA_PTR;
  35
  36 /*
  37  * Get cpu and bus clock
  38  */
  39 int get_clocks (void)
  40 {
  41         volatile immap_t *immr = (immap_t *) CFG_IMMR;
  42
  43 #ifndef CONFIG_5xx_GCLK_FREQ
  44         uint divf = (immr->im_clkrst.car_plprcr & PLPRCR_DIVF_MSK);
  45         uint mf = ((immr->im_clkrst.car_plprcr & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT);
  46         ulong vcoout;
  47
  48         vcoout = (CFG_OSC_CLK / (divf + 1)) * (mf + 1) * 2;
  49         if(immr->im_clkrst.car_plprcr & PLPRCR_CSRC_MSK) {
  50                 gd->cpu_clk = vcoout / (2^(((immr->im_clkrst.car_sccr & SCCR_DFNL_MSK) >> SCCR_DFNL_SHIFT) + 1));
  51         } else {
  52                 gd->cpu_clk = vcoout / (2^(immr->im_clkrst.car_sccr & SCCR_DFNH_MSK));
  53         }
  54
  55 #else /* CONFIG_5xx_GCLK_FREQ */
  56         gd->bus_clk = CONFIG_5xx_GCLK_FREQ;
  57 #endif /* CONFIG_5xx_GCLK_FREQ */
  58
  59         if ((immr->im_clkrst.car_sccr & SCCR_EBDF11) == 0) {
  60                 /* No Bus Divider active */
  61                 gd->bus_clk = gd->cpu_clk;
  62         } else {
  63                 /* CLKOUT is GCLK / 2 */
  64                 gd->bus_clk = gd->cpu_clk / 2;
  65         }
  66         return (0);
  67 }