firmware/drivers/synaptics-mep.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 by Mark Arigo
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include <stdlib.h>
  23 #include "config.h"
  24 #include "cpu.h"
  25 #include "system.h"
  26 #include "kernel.h"
  27 #include "button-target.h"
  28
  29 #define LOGF_ENABLE
  30 #include "logf.h"
  31
  32 /* Driver for the Synaptics Touchpad based on the "Synaptics Modular Embedded
  33    Protocol: 3-Wire Interface Specification" documentation */
  34
  35 #if defined(MROBE_100)
  36 #define INT_ENABLE  GPIO_CLEAR_BITWISE(GPIOD_INT_LEV, 0x2);\
  37                     GPIO_SET_BITWISE(GPIOD_INT_EN, 0x2)
  38 #define INT_DISABLE GPIO_CLEAR_BITWISE(GPIOD_INT_EN, 0x2);\
  39                     GPIO_SET_BITWISE(GPIOD_INT_CLR, 0x2)
  40
  41 #define ACK     (GPIOD_INPUT_VAL & 0x1)
  42 #define ACK_HI  GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1)
  43 #define ACK_LO  GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_VAL, 0x1)
  44
  45 #define CLK     ((GPIOD_INPUT_VAL & 0x2) >> 1)
  46 #define CLK_HI  GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x2)
  47 #define CLK_LO  GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_VAL, 0x2)
  48
  49 #define DATA    ((GPIOD_INPUT_VAL & 0x4) >> 2)
  50 #define DATA_HI GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x4);\
  51                 GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x4)
  52 #define DATA_LO GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x4);\
  53                 GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_VAL, 0x4)
  54 #define DATA_CL GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x4)
  55
  56 #elif defined(PHILIPS_HDD1630)
  57 #define INT_ENABLE  GPIO_CLEAR_BITWISE(GPIOA_INT_LEV, 0x20);\
  58                     GPIO_SET_BITWISE(GPIOA_INT_EN, 0x20)
  59 #define INT_DISABLE GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x20);\
  60                     GPIO_SET_BITWISE(GPIOA_INT_CLR, 0x20)
  61
  62 #define ACK     (GPIOD_INPUT_VAL & 0x80)
  63 #define ACK_HI  GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x80)
  64 #define ACK_LO  GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_VAL, 0x80)
  65
  66 #define CLK     ((GPIOA_INPUT_VAL & 0x20) >> 5)
  67 #define CLK_HI  GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x20)
  68 #define CLK_LO  GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x20)
  69
  70 #define DATA    ((GPIOA_INPUT_VAL & 0x10) >> 4)
  71 #define DATA_HI GPIO_SET_BITWISE(GPIOA_OUTPUT_EN, 0x10);\
  72                 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x10)
  73 #define DATA_LO GPIO_SET_BITWISE(GPIOA_OUTPUT_EN, 0x10);\
  74                 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x10)
  75 #define DATA_CL GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x10)
  76
  77 #elif defined(PHILIPS_SA9200)
  78 #define INT_ENABLE  GPIO_CLEAR_BITWISE(GPIOD_INT_LEV, 0x2);\
  79                     GPIO_SET_BITWISE(GPIOD_INT_EN, 0x2)
  80 #define INT_DISABLE GPIO_CLEAR_BITWISE(GPIOD_INT_EN, 0x2);\
  81                     GPIO_SET_BITWISE(GPIOD_INT_CLR, 0x2)
  82
  83 #define ACK     (GPIOD_INPUT_VAL & 0x8)
  84 #define ACK_HI  GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x8)
  85 #define ACK_LO  GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_VAL, 0x8)
  86
  87 #define CLK     ((GPIOD_INPUT_VAL & 0x2) >> 1)
  88 #define CLK_HI  GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x2)
  89 #define CLK_LO  GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_VAL, 0x2)
  90
  91 #define DATA    ((GPIOD_INPUT_VAL & 0x10) >> 4)
  92 #define DATA_HI GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x10)
  93 #define DATA_LO GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_VAL, 0x10);\
  94                 GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x10)
  95 #define DATA_CL GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x10)
  96 #endif
  97
  98 #define LO 0
  99 #define HI 1
 100
 101 #define READ_RETRY      8
 102 #define READ_ERROR     -1
 103
 104 #define MEP_HELLO_HEADER 0x19
 105 #define MEP_HELLO_ID     0x1
 106
 107 #define MEP_READ  0x1
 108 #define MEP_WRITE 0x3
 109
 110 static unsigned short syn_status = 0;
 111
 112 static void syn_enable_int(bool enable)
 113 {
 114     if (enable)
 115     {
 116         INT_ENABLE;
 117     }
 118     else
 119     {
 120         INT_DISABLE;
 121     }
 122 }
 123
 124 static int syn_wait_clk_change(unsigned int val)
 125 {
 126     int i;
 127
 128     for (i = 0; i < 10000; i++)
 129     {
 130         if (CLK == val)
 131             return 1;
 132     }
 133
 134     return 0;
 135 }
 136
 137 static void syn_set_ack(int val)
 138 {
 139     if (val == HI)
 140     {
 141         ACK_HI;
 142     }
 143     else
 144     {
 145         ACK_LO;
 146     }
 147 }
 148
 149 static void syn_set_data(int val)
 150 {
 151     if (val == HI)
 152     {
 153         DATA_HI;
 154     }
 155     else
 156     {
 157         DATA_LO;
 158     }
 159 }
 160
 161 static inline int syn_get_data(void)
 162 {
 163     DATA_CL;
 164     return DATA;
 165 }
 166
 167 static void syn_wait_guest_flush(void)
 168 {
 169     /* Flush receiving (flushee) state:
 170        handshake until DATA goes high during P3 stage */
 171     if (CLK == LO)
 172     {
 173         syn_set_ack(HI);         /* P1 -> P2 */
 174         syn_wait_clk_change(HI); /* P2 -> P3 */
 175     }
 176
 177     while (syn_get_data() == LO)
 178     {
 179         syn_set_ack(HI);         /* P3 -> P0 */
 180         syn_wait_clk_change(LO); /* P0 -> P1 */
 181         syn_set_ack(LO);         /* P1 -> P2 */
 182         syn_wait_clk_change(HI); /* P2 -> P3 */
 183     }
 184
 185     /* Continue handshaking until back to P0 */
 186     syn_set_ack(HI);             /* P3 -> P0 */
 187 }
 188
 189 static void syn_flush(void)
 190 {
 191     int i;
 192
 193     logf("syn_flush...");
 194
 195     /* Flusher holds DATA low for at least 36 handshake cycles */
 196     syn_set_data(LO);
 197
 198     for (i = 0; i < 36; i++)
 199     {
 200         syn_wait_clk_change(LO); /* P0 -> P1 */
 201         syn_set_ack(LO);         /* P1 -> P2 */
 202         syn_wait_clk_change(HI); /* P2 -> P3 */
 203         syn_set_ack(HI);         /* P3 -> P0 */
 204     }
 205
 206     /* Raise DATA in P1 stage */
 207     syn_wait_clk_change(LO); /* P0 -> P1 */
 208     syn_set_data(HI);
 209
 210     /* After a flush, the flushing device enters a flush-receiving (flushee)
 211        state */
 212     syn_wait_guest_flush();
 213 }
 214
 215 static int syn_send(char *data, int len)
 216 {
 217     int i, bit;
 218     int parity = 0;
 219
 220     logf("syn_send...");
 221
 222     /* 1. Lower DATA line to issue a request-to-send to guest */
 223     syn_set_data(LO);
 224
 225     /* 2. Wait for guest to lower CLK */
 226     syn_wait_clk_change(LO);
 227
 228     /* 3. Lower ACK (with DATA still low) */
 229     syn_set_ack(LO);
 230
 231     /* 4. Wait for guest to raise CLK */
 232     syn_wait_clk_change(HI);
 233
 234     /* 5. Send data */
 235     for (i = 0; i < len; i++)
 236     {
 237        logf("  sending byte: %d", data[i]);
 238
 239         bit = 0;
 240         while (bit < 8)
 241         {
 242             /* 5a. Drive data low if bit is 0, or high if bit is 1 */
 243             if (data[i] & (1 << bit))
 244             {
 245                 syn_set_data(HI);
 246                 parity++;
 247             }
 248             else
 249             {
 250                 syn_set_data(LO);
 251             }
 252             bit++;
 253
 254             /* 5b. Invert ACK to indicate that the data bit is ready */
 255             syn_set_ack(HI);
 256
 257             /* 5c. Wait for guest to invert CLK */
 258             syn_wait_clk_change(LO);
 259
 260             /* Repeat for next bit */
 261             if (data[i] & (1 << bit))
 262             {
 263                 syn_set_data(HI);
 264                 parity++;
 265             }
 266             else
 267             {
 268                 syn_set_data(LO);
 269             }
 270             bit++;
 271
 272             syn_set_ack(LO);
 273
 274             syn_wait_clk_change(HI);
 275         }
 276     }
 277
 278     /* 7. Transmission termination sequence: */
 279     /* 7a. Host may put parity bit on DATA. Hosts that do not generate
 280            parity should set DATA high. Parity is 1 if there's an odd
 281            number of '1' bits, or 0 if there's an even number of '1' bits. */
 282     parity = parity % 2;
 283     if (parity)
 284     {
 285         syn_set_data(HI);
 286     }
 287     else
 288     {
 289         syn_set_data(LO);
 290     }
 291     logf("  send parity = %d", parity);
 292
 293     /* 7b. Raise ACK to indicate that the optional parity bit is ready */
 294     syn_set_ack(HI);
 295
 296     /* 7c. Guest lowers CLK */
 297     syn_wait_clk_change(LO);
 298
 299     /* 7d. Pull DATA high (if parity bit was 0) */
 300     syn_set_data(HI);
 301
 302     /* 7e. Lower ACK to indicate that the stop bit is ready */
 303     syn_set_ack(LO);
 304
 305     /* 7f. Guest raises CLK */
 306     syn_wait_clk_change(HI);
 307
 308     /* 7g. If DATA is low, guest is flushing this transfer. Host should
 309            enter the flushee state. */
 310     if (syn_get_data() == LO)
 311     {
 312         logf("  module flushing");
 313
 314         syn_wait_guest_flush();
 315         return -1;
 316     }
 317
 318     /* 7h. Host raises ACK and the link enters the idle state */
 319     syn_set_ack(HI);
 320
 321     return len;
 322 }
 323
 324 static int syn_read_data(char *data, int data_len)
 325 {
 326     int i, len, bit, parity;
 327     char *data_ptr, tmp;
 328
 329     logf("syn_read_data...");
 330
 331     /* 1. Guest drives CLK low */
 332     if (CLK != LO)
 333         return 0;
 334
 335     /* 1a. If the host is willing to receive a packet it lowers ACK */
 336     syn_set_ack(LO);
 337
 338     /* 2. Guest may issue a request-to-send by lowering DATA. If the
 339           guest decides not to transmit a packet, it may abort the
 340           transmission by not lowering DATA. */
 341
 342     /* 3. The guest raises CLK */
 343     syn_wait_clk_change(HI);
 344
 345     /* 4. If the guest is still driving DATA low, the transfer is commited
 346           to occur. Otherwise, the transfer is aborted. In either case,
 347           the host raises ACK. */
 348     if (syn_get_data() == HI)
 349     {
 350         logf("  read abort");
 351
 352         syn_set_ack(HI);
 353         return READ_ERROR;
 354     }
 355     else
 356     {
 357         syn_set_ack(HI);
 358     }
 359
 360     /* 5. Read the incoming data packet */
 361     i = 0;
 362     len = 0;
 363     parity = 0;
 364     while (i <= len)
 365     {
 366         bit = 0;
 367
 368         if (i < data_len)
 369             data_ptr = &data[i];
 370         else
 371             data_ptr = &tmp;
 372
 373         *data_ptr = 0;
 374         while (bit < 8)
 375         {
 376             /* 5b. Guset inverts CLK to indicate that data is ready */
 377             syn_wait_clk_change(LO);
 378
 379             /* 5d. Read the data bit from DATA */
 380             if (syn_get_data() == HI)
 381             {
 382                 *data_ptr |= (1 << bit);
 383                 parity++;
 384             }
 385             bit++;
 386
 387             /* 5e. Invert ACK to indicate that data has been read */
 388             syn_set_ack(LO);
 389
 390             /* Repeat for next bit */
 391             syn_wait_clk_change(HI);
 392
 393             if (syn_get_data() == HI)
 394             {
 395                 *data_ptr |= (1 << bit);
 396                 parity++;
 397             }
 398             bit++;
 399
 400             syn_set_ack(HI);
 401         }
 402
 403         /* First byte is the packet header */
 404         if (i == 0)
 405         {
 406             /* Format control (bit 3) should be 1 */
 407             if (*data_ptr & 0x8)
 408             {
 409                 /* Packet length is bits 0:2 */
 410                 len = *data_ptr & 0x7;
 411                 logf("  packet length = %d", len);
 412             }
 413             else
 414             {
 415                 logf("  invalid format ctrl bit");
 416                 return READ_ERROR;
 417             }
 418         }
 419
 420         i++;
 421     }
 422
 423     /* 7. Transmission termination cycle */
 424     /* 7a. The guest generates a parity bit on DATA */
 425     /* 7b. The host waits for guest to lower CLK */
 426     syn_wait_clk_change(LO);
 427
 428     /* 7c. The host verifies the parity bit is correct */
 429     parity = parity % 2;
 430     logf("  parity check: %d / %d", syn_get_data(), parity);
 431
 432     /* TODO: parity error handling */
 433
 434     /* 7d. The host lowers ACK */
 435     syn_set_ack(LO);
 436
 437     /* 7e. The host waits for the guest to raise CLK indicating
 438            that the stop bit is ready */
 439     syn_wait_clk_change(HI);
 440
 441     /* 7f. The host reads DATA and verifies that it is 1 */
 442     if (syn_get_data() == LO)
 443     {
 444         logf("  framing error");
 445
 446         syn_set_ack(HI);
 447         return READ_ERROR;
 448     }
 449
 450     syn_set_ack(HI);
 451
 452     return len;
 453 }
 454
 455 static int syn_read(char *data, int len)
 456 {
 457     int i;
 458     int ret = READ_ERROR;
 459
 460     for (i = 0; i < READ_RETRY; i++)
 461     {
 462         if (syn_wait_clk_change(LO))
 463         {
 464             /* module is sending data */
 465             ret = syn_read_data(data, len);
 466             if (ret != READ_ERROR)
 467                 return ret;
 468
 469             syn_flush();
 470         }
 471         else
 472         {
 473             /* module is idle */
 474             return 0;
 475         }
 476     }
 477
 478     return ret;
 479 }
 480
 481 static int syn_reset(void)
 482 {
 483     int val, id;
 484     char data[2];
 485
 486     logf("syn_reset...");
 487
 488     /* reset module 0 */
 489     data[0] = (0 << 4) | (1 << 3) | 0;
 490     syn_send(data, 1);
 491
 492     val = syn_read(data, 2);
 493     if (val == 1)
 494     {
 495         val = data[0] & 0xff;      /* packet header */
 496         id = (data[1] >> 4) & 0xf; /* packet id */
 497         if ((val == MEP_HELLO_HEADER) && (id == MEP_HELLO_ID))
 498         {
 499             logf("  module 0 reset");
 500             return 1;
 501         }
 502     }
 503
 504     logf("  reset failed");
 505     return 0;
 506 }
 507
 508 int touchpad_init(void)
 509 {
 510     syn_flush();
 511     syn_status = syn_reset();
 512
 513     if (syn_status)
 514     {
 515         /* reset interrupts */
 516         syn_enable_int(false);
 517         syn_enable_int(true);
 518
 519         CPU_INT_EN    |= HI_MASK;
 520         CPU_HI_INT_EN |= GPIO0_MASK;
 521     }
 522
 523     return syn_status;
 524 }
 525
 526 int touchpad_read_device(char *data, int len)
 527 {
 528     char tmp[4];
 529     int id;
 530     int val = 0;
 531
 532     if (syn_status)
 533     {
 534         /* disable interrupt while we read the touchpad */
 535         syn_enable_int(false);
 536
 537         val = syn_read(data, len);
 538         if (val > 0)
 539         {
 540             val = data[0] & 0xff;      /* packet header */
 541             id = (data[1] >> 4) & 0xf; /* packet id */
 542
 543             logf("syn_read:");
 544             logf("  data[0] = 0x%08x", data[0]);
 545             logf("  data[1] = 0x%08x", data[1]);
 546             logf("  data[2] = 0x%08x", data[2]);
 547             logf("  data[3] = 0x%08x", data[3]);
 548
 549             if ((val == MEP_BUTTON_HEADER) && (id == MEP_BUTTON_ID))
 550             {
 551                 /* an absolute packet should follow which we ignore */
 552                 syn_read(tmp, 4);
 553             }
 554             else if (val == MEP_ABSOLUTE_HEADER)
 555             {
 556                 logf(" pos %d", val);
 557                 logf(" z %d", data[3]);
 558                 logf(" finger %d", data[1] & 0x1);
 559                 logf(" gesture %d", data[1] & 0x2);
 560                 logf(" RelPosVld %d", data[1] & 0x4);
 561
 562                 if (!(data[1] & 0x1))
 563                 {
 564                     /* finger is NOT on touch strip */
 565                     val = 0;
 566                 }
 567             }
 568             else
 569             {
 570                 val = 0;
 571             }
 572         }
 573
 574         /* re-enable interrupts */
 575         syn_enable_int(true);
 576     }
 577
 578     return val;
 579 }
 580
 581 int touchpad_set_buttonlights(int led_mask, char brightness)
 582 {
 583     char data[6];
 584     int val = 0;
 585
 586     if (syn_status)
 587     {
 588         syn_enable_int(false);
 589
 590         /* turn on all touchpad leds */
 591         data[0] = 0x05;
 592         data[1] = 0x31;
 593         data[2] = (brightness & 0xf) << 4;
 594         data[3] = 0x00;
 595         data[4] = (led_mask >> 8) & 0xff;
 596         data[5] = led_mask & 0xff;
 597         syn_send(data, 6);
 598
 599         /* device responds with a single-byte ACK packet */
 600         val = syn_read(data, 2);
 601
 602         syn_enable_int(true);
 603     }
 604
 605     return val;
 606 }
 607
 608 #ifdef ROCKBOX_HAS_LOGF
 609 void syn_info(void)
 610 {
 611     int i, val;
 612     int data[8];
 613
 614     logf("syn_info...");
 615
 616     /* module base info */
 617     logf("module base info:");
 618     data[0] = MEP_READ;
 619     data[1] = 0x80;
 620     syn_send(data, 2);
 621     val = syn_read(data, 8);
 622     if (val > 0)
 623     {
 624         for (i = 0; i < 8; i++)
 625             logf("  data[%d] = 0x%02x", i, data[i]);
 626     }
 627
 628     /* module product info */
 629     logf("module product info:");
 630     data[0] = MEP_READ;
 631     data[1] = 0x81;
 632     syn_send(data, 2);
 633     val = syn_read(data, 8);
 634     if (val > 0)
 635     {
 636         for (i = 0; i < 8; i++)
 637             logf("  data[%d] = 0x%02x", i, data[i]);
 638     }
 639
 640     /* module serialization */
 641     logf("module serialization:");
 642     data[0] = MEP_READ;
 643     data[1] = 0x82;
 644     syn_send(data, 2);
 645     val = syn_read(data, 8);
 646     if (val > 0)
 647     {
 648         for (i = 0; i < 8; i++)
 649             logf("  data[%d] = 0x%02x", i, data[i]);
 650     }
 651
 652     /* 1-D sensor info */
 653     logf("1-d sensor info:");
 654     data[0] = MEP_READ;
 655     data[1] = 0x80 + 0x20;
 656     syn_send(data, 2);
 657     val = syn_read(data, 8);
 658     if (val > 0)
 659     {
 660         for (i = 0; i < 8; i++)
 661             logf("  data[%d] = 0x%02x", i, data[i]);
 662     }
 663 }
 664 #endif