firmware/export/wm8978.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 by Michael Sevakis
  11  *
  12  * Header file for WM8978 codec
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License
  16  * as published by the Free Software Foundation; either version 2
  17  * of the License, or (at your option) any later version.
  18  *
  19  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  20  * KIND, either express or implied.
  21  *
  22  ****************************************************************************/
  23 #ifndef _WM8978_H
  24 #define _WM8978_H
  25
  26 #define VOLUME_MIN -900
  27 #define VOLUME_MAX 60
  28
  29 int tenthdb2master(int db);
  30 void audiohw_set_headphone_vol(int vol_l, int vol_r);
  31 void audiohw_set_recsrc(int source, bool recording);
  32
  33 void wmc_set(unsigned int reg, unsigned int bits);
  34 void wmc_clear(unsigned int reg, unsigned int bits);
  35
  36 #define WMC_I2C_ADDR 0x34
  37
  38 /* Registers */
  39 #define WMC_SOFTWARE_RESET              0x00
  40 #define WMC_POWER_MANAGEMENT1           0x01
  41 #define WMC_POWER_MANAGEMENT2           0x02
  42 #define WMC_POWER_MANAGEMENT3           0x03
  43 #define WMC_AUDIO_INTERFACE             0x04
  44 #define WMC_COMPANDING_CTRL             0x05
  45 #define WMC_CLOCK_GEN_CTRL              0x06
  46 #define WMC_ADDITIONAL_CTRL             0x07
  47 #define WMC_GPIO                        0x08
  48 #define WMC_JACK_DETECT_CONTROL1        0x09
  49 #define WMC_DAC_CONTROL                 0x0a
  50 #define WMC_LEFT_DAC_DIGITAL_VOL        0x0b
  51 #define WMC_RIGHT_DAC_DIGITAL_VOL       0x0c
  52 #define WMC_JACK_DETECT_CONTROL2        0x0d
  53 #define WMC_ADC_CONTROL                 0x0e
  54 #define WMC_LEFT_ADC_DIGITAL_VOL        0x0f
  55 #define WMC_RIGHT_ADC_DIGITAL_VOL       0x10
  56 #define WMC_EQ1_LOW_SHELF               0x12
  57 #define WMC_EQ2_PEAK1                   0x13
  58 #define WMC_EQ3_PEAK2                   0x14
  59 #define WMC_EQ4_PEAK3                   0x15
  60 #define WMC_EQ5_HIGH_SHELF              0x16
  61 #define WMC_DAC_LIMITER1                0x18
  62 #define WMC_DAC_LIMITER2                0x19
  63 #define WMC_NOTCH_FILTER1               0x1b
  64 #define WMC_NOTCH_FILTER2               0x1c
  65 #define WMC_NOTCH_FILTER3               0x1d
  66 #define WMC_NOTCH_FILTER4               0x1e
  67 #define WMC_ALC_CONTROL1                0x20
  68 #define WMC_ALC_CONTROL2                0x21
  69 #define WMC_ALC_CONTROL3                0x22
  70 #define WMC_NOISE_GATE                  0x23
  71 #define WMC_PLL_N                       0x24
  72 #define WMC_PLL_K1                      0x25
  73 #define WMC_PLL_K2                      0x26
  74 #define WMC_PLL_K3                      0x27
  75 #define WMC_3D_CONTROL                  0x29
  76 #define WMC_BEEP_CONTROL                0x2b
  77 #define WMC_INPUT_CTRL                  0x2c
  78 #define WMC_LEFT_INP_PGA_GAIN_CTRL      0x2d
  79 #define WMC_RIGHT_INP_PGA_GAIN_CTRL     0x2e
  80 #define WMC_LEFT_ADC_BOOST_CTRL         0x2f
  81 #define WMC_RIGHT_ADC_BOOST_CTRL        0x30
  82 #define WMC_OUTPUT_CTRL                 0x31
  83 #define WMC_LEFT_MIXER_CTRL             0x32
  84 #define WMC_RIGHT_MIXER_CTRL            0x33
  85 #define WMC_LOUT1_HP_VOLUME_CTRL        0x34
  86 #define WMC_ROUT1_HP_VOLUME_CTRL        0x35
  87 #define WMC_LOUT2_SPK_VOLUME_CTRL       0x36
  88 #define WMC_ROUT2_SPK_VOLUME_CTRL       0x37
  89 #define WMC_OUT3_MIXER_CTRL             0x38
  90 #define WMC_OUT4_MONO_MIXER_CTRL        0x39
  91 #define WMC_NUM_REGISTERS               0x3a
  92
  93 /* Register bitmasks */
  94
  95 /* Volume update bit for volume registers */
  96 #define WMC_VU                          (1 << 8)
  97
  98 /* Zero-crossing bit for volume registers */
  99 #define WMC_ZC                          (1 << 7)
 100
 101 /* Mute bit for volume registers */
 102 #define WMC_MUTE                        (1 << 6)
 103
 104 /* Volume masks and macros for digital volumes */
 105 #define WMC_DVOL                        0xff
 106 #define WMC_DVOLr(x)                    ((x) & WMC_DVOL)
 107 #define WMC_DVOLw(x)                    ((x) & WMC_DVOL)
 108
 109 /* Volums masks and macros for analogue volumes */
 110 #define WMC_AVOL                        0x3f
 111 #define WMC_AVOLr(x)                    ((x) & WMC_AVOL)
 112 #define WMC_AVOLw(x)                    ((x) & WMC_AVOL)
 113
 114 /* WMC_SOFTWARE_RESET (0x00) */
 115 #define WMC_RESET
 116     /* Write any value */
 117
 118 /* WMC_POWER_MANAGEMENT1 (0x01) */
 119 #define WMC_BUFDCOMPEN                  (1 << 8)
 120 #define WMC_OUT4MIXEN                   (1 << 7)
 121 #define WMC_OUT3MIXEN                   (1 << 6)
 122 #define WMC_PLLEN                       (1 << 5)
 123 #define WMC_MICBEN                      (1 << 4)
 124 #define WMC_BIASEN                      (1 << 3)
 125 #define WMC_BUFIOEN                     (1 << 2)
 126 #define WMC_VMIDSEL                     (3 << 0)
 127     #define WMC_VMIDSEL_OFF             (0 << 0)
 128     #define WMC_VMIDSEL_75K             (1 << 0)
 129     #define WMC_VMIDSEL_300K            (2 << 0)
 130     #define WMC_VMIDSEL_5K              (3 << 0)
 131
 132 /* WMC_POWER_MANAGEMENT2 (0x02) */
 133 #define WMC_ROUT1EN                     (1 << 8)
 134 #define WMC_LOUT1EN                     (1 << 7)
 135 #define WMC_SLEEP                       (1 << 6)
 136 #define WMC_BOOSTENR                    (1 << 5)
 137 #define WMC_BOOSTENL                    (1 << 4)
 138 #define WMC_INPPGAENR                   (1 << 3)
 139 #define WMC_INPPGAENL                   (1 << 2)
 140 #define WMC_ADCENR                      (1 << 1)
 141 #define WMC_ADCENL                      (1 << 0)
 142
 143 /* WMC_POWER_MANAGEMENT3 (0x03) */
 144 #define WMC_OUT4EN                      (1 << 8)
 145 #define WMC_OUT3EN                      (1 << 7)
 146 #define WMC_LOUT2EN                     (1 << 6)
 147 #define WMC_ROUT2EN                     (1 << 5)
 148 #define WMC_RMIXEN                      (1 << 3)
 149 #define WMC_LMIXEN                      (1 << 2)
 150 #define WMC_DACENR                      (1 << 1)
 151 #define WMC_DACENL                      (1 << 0)
 152
 153 /* WMC_AUDIO_INTERFACE (0x04) */
 154 #define WMC_BCP                         (1 << 8)
 155 #define WMC_LRP                         (1 << 7)
 156 #define WMC_WL                          (3 << 5)
 157     #define WMC_WL_16                   (0 << 5)
 158     #define WMC_WL_20                   (1 << 5)
 159     #define WMC_WL_24                   (2 << 5)
 160     #define WMC_WL_32                   (3 << 5)
 161 #define WMC_FMT                         (3 << 3)
 162     #define WMC_FMT_RJUST               (0 << 3)
 163     #define WMC_FMT_LJUST               (1 << 3)
 164     #define WMC_FMT_I2S                 (2 << 3)
 165     #define WMC_FMT_DSP_PCM             (3 << 3)
 166 #define WMC_DACLRSWAP                   (1 << 2)
 167 #define WMC_ADCLRSWAP                   (1 << 1)
 168 #define WMC_MONO                        (1 << 0)
 169
 170 /* WMC_COMPANDING_CTRL (0x05) */
 171 #define WMC_WL8                         (1 << 5)
 172 #define WMC_DAC_COMP                    (3 << 3)
 173     #define WMC_DAC_COMP_OFF            (0 << 3)
 174     #define WMC_DAC_COMP_U_LAW          (2 << 3)
 175     #define WMC_DAC_COMP_A_LAW          (3 << 3)
 176 #define WMC_ADC_COMP                    (3 << 1)
 177     #define WMC_ADC_COMP_OFF            (0 << 1)
 178     #define WMC_ADC_COMP_U_LAW          (2 << 1)
 179     #define WMC_ADC_COMP_A_LAW          (3 << 1)
 180 #define WMC_LOOPBACK                    (1 << 0)
 181
 182 /* WMC_CLOCK_GEN_CTRL (0x06) */
 183 #define WMC_CLKSEL                      (1 << 8)
 184 #define WMC_MCLKDIV                     (7 << 5)
 185     #define WMC_MCLKDIV_1               (0 << 5)
 186     #define WMC_MCLKDIV_1_5             (1 << 5)
 187     #define WMC_MCLKDIV_2               (2 << 5)
 188     #define WMC_MCLKDIV_3               (3 << 5)
 189     #define WMC_MCLKDIV_4               (4 << 5)
 190     #define WMC_MCLKDIV_6               (5 << 5)
 191     #define WMC_MCLKDIV_8               (6 << 5)
 192     #define WMC_MCLKDIV_12              (7 << 5)
 193 #define WMC_BCLKDIV                     (7 << 2)
 194     #define WMC_BCLKDIV_1               (0 << 2)
 195     #define WMC_BCLKDIV_2               (1 << 2)
 196     #define WMC_BCLKDIV_4               (2 << 2)
 197     #define WMC_BCLKDIV_8               (3 << 2)
 198     #define WMC_BCLKDIV_16              (4 << 2)
 199     #define WMC_BCLKDIV_32              (5 << 2)
 200 #define WMC_MS                          (1 << 0)
 201
 202 /* WMC_ADDITIONAL_CTRL (0x07) */
 203 /* This configure the digital filter coefficients - pick the closest
 204  * to what's really being used (greater than or equal). */
 205 #define WMC_SR                          (7 << 1)
 206 #define WMC_SR_48KHZ                    (0 << 1)
 207 #define WMC_SR_32KHZ                    (1 << 1)
 208 #define WMC_SR_24KHZ                    (2 << 1)
 209 #define WMC_SR_16KHZ                    (3 << 1)
 210 #define WMC_SR_12KHZ                    (4 << 1)
 211 #define WMC_SR_8KHZ                     (5 << 1)
 212 /* 110-111=reserved */
 213 #define WMC_SLOWCLKEN                   (1 << 0)
 214
 215 /* WMC_GPIO (0x08) */
 216 #define WMC_OPCLKDIV                    (3 << 4)
 217     #define WMC_OPCLKDIV_1              (0 << 4)
 218     #define WMC_OPCLKDIV_2              (1 << 4)
 219     #define WMC_OPCLKDIV_3              (2 << 4)
 220     #define WMC_OPCLKDIV_4              (3 << 4)
 221 #define WMC_GPIO1POL                    (1 << 3)
 222 #define WMC_GPIO1SEL                    (7 << 0)
 223     #define WMC_GPIO1SEL_TEMP_OK        (2 << 0)
 224     #define WMC_GPIO1SEL_AMUTE_ACTIVE   (3 << 0)
 225     #define WMC_GPIO1SEL_PLL_CLK_OP     (4 << 0)
 226     #define WMC_GPIO1SEL_PLL_LOCK       (5 << 0)
 227     #define WMC_GPIO1SEL_LOGIC_1        (6 << 0)
 228     #define WMC_GPIO1SEL_LOGIC_0        (7 << 0)
 229
 230 /* WMC_JACK_DETECT_CONTROL1 (0x09) */
 231 #define WMC_JD_VMID                     (3 << 7)
 232     #define WMC_JD_VMID_EN_0            (1 << 7)
 233     #define WMC_JD_VMID_EN_1            (2 << 7)
 234 #define WMC_JD_EN                       (1 << 6)
 235 #define WMC_JD_SEL                      (3 << 4)
 236     #define WMC_JD_SEL_GPIO1            (0 << 4)
 237     #define WMC_JD_SEL_GPIO2            (1 << 4)
 238     #define WMC_JD_SEL_GPIO3            (2 << 4)
 239
 240 /* WMC_DAC_CONTROL (0x0a) */
 241 #define WMC_SOFT_MUTE                   (1 << 6)
 242 #define WMC_DACOSR_128                  (1 << 3)
 243 #define WMC_AMUTE                       (1 << 2)
 244 #define WMC_DACPOLR                     (1 << 1)
 245 #define WMC_DACPOLL                     (1 << 0)
 246
 247 /* WMC_LEFT_DAC_DIGITAL_VOL (0x0b) */
 248 /* WMC_RIGHT_DAC_DIGITAL_VOL (0x0c) */
 249     /* 00000000=mute, 00000001=-127dB...(0.5dB steps)...11111111=0dB */
 250     /* Use WMC_DVOL* macros */
 251
 252 /* WMC_JACK_DETECT_CONTROL2 (0x0d) */
 253 #define WMC_JD_EN1                      (0xf << 4)
 254     #define WMC_OUT1_EN1                (1 << 4)
 255     #define WMC_OUT2_EN1                (2 << 4)
 256     #define WMC_OUT3_EN1                (4 << 4)
 257     #define WMC_OUT4_EN1                (8 << 4)
 258 #define WMC_JD_EN0                      (0xf << 0)
 259     #define WMC_OUT1_EN0                (1 << 0)
 260     #define WMC_OUT2_EN0                (2 << 0)
 261     #define WMC_OUT3_EN0                (4 << 0)
 262     #define WMC_OUT4_EN0                (8 << 0)
 263
 264 /* WMC_ADC_CONTROL (0x0e) */
 265 #define WMC_HPFEN                       (1 << 8)
 266 #define WMC_HPFAPP                      (1 << 7)
 267 #define WMC_HPFCUT                      (7 << 4)
 268 #define WMC_ADCOSR                      (1 << 3)
 269 #define WMC_ADCRPOL                     (1 << 1)
 270 #define WMC_ADCLPOL                     (1 << 0)
 271
 272 /* WMC_LEFT_ADC_DIGITAL_VOL (0x0f) */
 273 /* WMC_RIGHT_ADC_DITIGAL_VOL (0x10) */
 274     /* 0.5dB steps: Mute:0x00, -127dB:0x01...0dB:0xff */
 275     /*Use WMC_DVOL* macros */
 276
 277 /* Macros for EQ gain and cutoff */
 278 #define WMC_EQGC                        0x1f
 279 #define WMC_EQGCr(x)                    ((x) & WMC_EQGC)
 280 #define WMC_EQGCw(x)                    ((x) & WMC_EQGC)
 281
 282 /* WMC_EQ1_LOW_SHELF (0x12) */
 283 #define WMC_EQ3DMODE                    (1 << 8)
 284 #define WMC_EQ1C                        (3 << 5) /* Cutoff */
 285     #define WMC_EQ1C_80HZ               (0 << 5) /* 80Hz */
 286     #define WMC_EQ1C_105HZ              (1 << 5) /* 105Hz */
 287     #define WMC_EQ1C_135HZ              (2 << 5) /* 135Hz */
 288     #define WMC_EQ1C_175HZ              (3 << 5) /* 175Hz */
 289     /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB, 11001-11111=reserved */
 290
 291 /* WMC_EQ2_PEAK1 (0x13) */
 292 #define WMC_EQ2BW                       (1 << 8)
 293 #define WMC_EQ2C                        (3 << 5) /* Center */
 294     #define WMC_EQ2C_230HZ              (0 << 5) /* 230Hz */
 295     #define WMC_EQ2C_300HZ              (1 << 5) /* 300Hz */
 296     #define WMC_EQ2C_385HZ              (2 << 5) /* 385Hz */
 297     #define WMC_EQ2C_500HZ              (3 << 5) /* 500Hz */
 298     /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
 299        11001-11111=reserved */
 300
 301 /* WMC_EQ3_PEAK2 (0x14) */
 302 #define WMC_EQ3BW                       (1 << 8)
 303 #define WMC_EQ3C                        (3 << 5) /* Center */
 304     #define WMC_EQ3C_650HZ              (0 << 5) /* 650Hz */
 305     #define WMC_EQ3C_850HZ              (1 << 5) /* 850Hz */
 306     #define WMC_EQ3C_1_1KHZ             (2 << 5) /* 1.1kHz */
 307     #define WMC_EQ3C_1_4KHZ             (3 << 5) /* 1.4kHz */
 308     /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
 309        11001-11111=reserved */
 310
 311 /* WMC_EQ4_PEAK3 (0x15) */
 312 #define WMC_EQ4BW                       (1 << 8)
 313 #define WMC_EQ4C                        (3 << 5) /* Center */
 314     #define WMC_EQ4C_1_8KHZ             (0 << 5) /* 1.8kHz */
 315     #define WMC_EQ4C_2_4KHZ             (1 << 5) /* 2.4kHz */
 316     #define WMC_EQ4C_3_2KHZ             (2 << 5) /* 3.2kHz */
 317     #define WMC_EQ4C_4_1KHZ             (3 << 5) /* 4.1kHz */
 318     /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
 319        11001-11111=reserved */
 320
 321 /* WMC_EQ5_HIGH_SHELF (0x16) */
 322 #define WMC_EQ5C                        (3 << 5) /* Cutoff */
 323     #define WMC_EQ5C_5_3KHZ             (0 << 5) /* 5.3kHz */
 324     #define WMC_EQ5C_6_9KHZ             (1 << 5) /* 6.9kHz */
 325     #define WMC_EQ5C_9KHZ               (2 << 5) /* 9.0kHz */
 326     #define WMC_EQ5C_11_7KHZ            (3 << 5) /* 11.7kHz */
 327     /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
 328        11001-11111=reserved */
 329
 330 /* WMC_DAC_LIMITER1 (0x18) */
 331 #define WMC_LIMEN                       (1 << 8)
 332     /* 0000=750uS, 0001=1.5mS...(x2 each step)...1010-1111=768mS */
 333 #define WMC_LIMDCY                      (0xf << 4)
 334     #define WMC_LIMDCYr(x)              (((x) & WMC_LIMDCY) >> 4)
 335     #define WMC_LIMDCYw(x)              (((x) << 4) & WMC_LIMDCY)
 336     /* 0000=94uS, 0001=188uS...(x2 each step)...1011-1111=192mS */
 337 #define WMC_LIMATK                      (0xf << 0)
 338     #define WMC_LIMATKr(x)              ((x) & WMC_LIMATK)
 339     #define WMC_LIMATKw(x)              ((x) & WMC_LIMATK)
 340
 341 /* WMC_DAC_LIMITER2 (0x19) */
 342 #define WMC_LIMLVL                      (7 << 4)
 343     /* 000=-1dB, 001=-2dB...(-1dB steps)...101-111:-6dB */
 344     #define WMC_LIMLVLr(x)              (((x) & WMC_LIMLVL) >> 4)
 345     #define WMC_LIMLVLw(x)              (((x) << 4) & WMC_LIMLVL)
 346 #define WMC_LIMBOOST                    (0xf << 0)
 347     /* 0000=0dB, 0001=+1dB...1100=+12dB, 1101-1111=reserved */
 348     #define WMC_LIMBOOSTr(x)            (((x) & WMC_LIMBOOST)
 349     #define WMC_LIMBOOSTw(x)            (((x) & WMC_LIMBOOST)
 350
 351
 352 /* Generic notch filter bits and macros */
 353 #define WMC_NFU                         (1 << 8)
 354 #define WMC_NFA                         (0x7f << 0)
 355 #define WMC_NFAr(x)                     ((x) & WMC_NFA)
 356 #define WMC_NFAw(x)                     ((x) & WMC_NFA)
 357
 358 /* WMC_NOTCH_FILTER1 (0x1b) */
 359 #define WMC_NFEN                        (1 << 7)
 360 /* WMC_NOTCH_FILTER2 (0x1c) */
 361 /* WMC_NOTCH_FILTER3 (0x1d) */
 362 /* WMC_NOTCH_FILTER4 (0x1e) */
 363
 364 /* WMC_ALC_CONTROL1 (0x20) */
 365 #define WMC_ALCSEL                      (3 << 7)
 366     #define WMC_ALCSEL_OFF              (0 << 7)
 367     #define WMC_ALCSEL_RIGHT_ONLY       (1 << 7)
 368     #define WMC_ALCSEL_LEFT_ONLY        (2 << 7)
 369     #define WMC_ALCSEL_BOTH_ON          (3 << 7)
 370     /* 000=-6.75dB, 001=-0.75dB...(6dB steps)...111=+35.25dB */
 371 #define WMC_ALCMAXGAIN                  (7 << 3)
 372     #define WMC_ALCMAXGAINr(x)          (((x) & WMC_ALCMAXGAIN) >> 3)
 373     #define WMC_ALCMAXGAINw(x)          (((x) << 3) & WMC_ALCMAXGAIN)
 374     /* 000:-12dB...(6dB steps)...111:+30dB */
 375 #define WMC_ALCMINGAIN                  (7 << 0)
 376     #define WMC_ALCMINGAINr(x)          ((x) & WMC_ALCMINGAIN)
 377     #define WMC_ALCMINGAINw(x)          ((x) & WMC_ALCMINGAIN)
 378
 379 /* WMC_ALC_CONTROL2 (0x21) */
 380     /* 0000=0ms, 0001=2.67ms, 0010=5.33ms...
 381        (2x with every step)...43.691s */
 382 #define WMC_ALCHLD                      (0xf << 4)
 383     #define WMC_ALCHLDr(x)              (((x) & WMC_ALCHLD) >> 4)
 384     #define WMC_ALCHLDw(x)              (((x) << 4) & WMC_ALCHLD)
 385     /* 1111:-1.5dBFS, 1110:-1.5dBFS, 1101:-3dBFS, 1100:-4.5dBFS...
 386        (-1.5dB steps)...0001:-21dBFS, 0000:-22.5dBFS */
 387 #define WMC_ALCLVL                      (0xf << 0)
 388     #define WMC_ALCLVLr(x)              ((x) & WMC_ALCLVL)
 389     #define WMC_ALCLVLw(x)              ((x) & WMC_ALCLVL)
 390
 391 /* WMC_ALC_CONTROL3 (0x22) */
 392 #define WMC_ALCMODE                     (1 << 8)
 393 #define WMC_ALCDCY                      (0xf << 4)
 394 #define WMC_ALCATK                      (0xf << 0)
 395
 396 /* WMC_NOISE_GATE (0x23) */
 397 #define WMC_NGEN                        (1 << 3)
 398     /* 000=-39dB, 001=-45dB, 010=-51dB...(6dB steps)...111=-81dB */
 399 #define WMC_NGTH                        (7 << 0)
 400     #define WMC_NGTHr(x)                ((x) & WMC_NGTH)
 401     #define WMC_NGTHw(x)                ((x) & WMC_NGTH)
 402
 403 /* WMC_PLL_N (0x24) */
 404 #define WMC_PLL_PRESCALE                (1 << 4)
 405 #define WMC_PLLN                        (0xf << 0)
 406     #define WMC_PLLNr(x)                ((x) & WMC_PLLN)
 407     #define WMC_PLLNw(x)                ((x) & WMC_PLLN)
 408
 409 /* WMC_PLL_K1 (0x25) */
 410 #define WMC_PLLK_23_18                  (0x3f << 0)
 411     #define WMC_PLLK_23_18r(x)          ((x) & WMC_PLLK_23_18)
 412     #define WMC_PLLK_23_18w(x)          ((x) & WMC_PLLK_23_18)
 413
 414 /* WMC_PLL_K2 (0x26) */
 415 #define WMC_PLLK_17_9                   (0x1ff << 0)
 416     #define WMC_PLLK_17_9r(x)           ((x) & WMC_PLLK_17_9)
 417     #define WMC_PLLK_17_9w(x)           ((x) & WMC_PLLK_17_9)
 418
 419 /* WMC_PLL_K3 (0x27) */
 420 #define WMC_PLLK_8_0                    (0x1ff << 0)
 421     #define WMC_PLLK_8_0r(x)            ((x) & WMC_PLLK_8_0)
 422     #define WMC_PLLK_8_0w(x)            ((x) & WMC_PLLK_8_0)
 423
 424 /* WMC_3D_CONTROL (0x29) */
 425     /* 0000: 0%, 0001: 6.67%...1110: 93.3%, 1111: 100% */
 426 #define WMC_DEPTH3D                     (0xf << 0)
 427     #define WMC_DEPTH3Dw(x)             ((x) & WMC_DEPTH3D)
 428     #define WMC_DEPTH3Dr(x)             ((x) & WMC_DEPTH3D)
 429
 430 /* WMC_BEEP_CONTROL (0x2b) */
 431 #define WMC_MUTERPGA2INV                (1 << 5)
 432 #define WMC_INVROUT2                    (1 << 4)
 433     /* 000=-15dB, 001=-12dB...111=+6dB */
 434 #define WMC_BEEPVOL                     (7 << 1)
 435     #define WMC_BEEPVOLr(x)             (((x) & WMC_BEEPVOL) >> 1)
 436     #define WMC_BEEPVOLw(x)             (((x) << 1) & WMC_BEEPVOL)
 437 #define WMC_BEEPEN                      (1 << 0)
 438
 439 /* WMC_INPUT_CTRL (0x2c) */
 440 #define WMC_MBVSEL                      (1 << 8)
 441 #define WMC_R2_2INPPGA                  (1 << 6)
 442 #define WMC_RIN2INPPGA                  (1 << 5)
 443 #define WMC_RIP2INPPGA                  (1 << 4)
 444 #define WMC_L2_2INPPGA                  (1 << 2)
 445 #define WMC_LIN2INPPGA                  (1 << 1)
 446 #define WMC_LIP2INPPGA                  (1 << 0)
 447
 448 /* WMC_LEFT_INP_PGA_GAIN_CTRL (0x2d) */
 449     /* 000000=-12dB, 000001=-11.25dB...010000=0dB, 111111=+35.25dB */
 450     /* Uses WMC_AVOL* macros */
 451
 452 /* WMC_RIGHT_INP_PGA_GAIN_CTRL (0x2e) */
 453     /* 000000=-12dB, 000001=-11.25dB...010000=0dB, 111111=+35.25dB */
 454     /* Uses WMC_AVOL* macros */
 455
 456 /* WMC_LEFT_ADC_BOOST_CTRL (0x2f) */
 457 #define WMC_PGABOOSTL                    (1 << 8)
 458     /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
 459 #define WMC_L2_2BOOSTVOL                 (7 << 4)
 460     #define WMC_L2_2BOOSTVOLr(x)         (((x) & WMC_L2_2BOOSTVOL) >> 4)
 461     #define WMC_L2_2BOOSTVOLw(x)         (((x) << 4) & WMC_L2_2BOOSTVOL)
 462     /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
 463 #define WMC_AUXL2BOOSTVOL                (7 << 0)
 464     #define WMC_AUXL2BOOSTVOLr(x)        ((x) & WMC_AUXL2BOOSTVOL)
 465     #define WMC_AUXL2BOOSTVOLw(x)        ((x) & WMC_AUXL2BOOSTVOL)
 466
 467 /* WMC_RIGHT_ADC_BOOST_CTRL (0x30) */
 468 #define WMC_PGABOOSTR                    (1 << 8)
 469     /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
 470 #define WMC_R2_2BOOSTVOL                (7 << 4)
 471     #define WMC_R2_2BOOSTVOLr(x)         (((x) & WMC_R2_2BOOSTVOL) >> 4)
 472     #define WMC_R2_2BOOSTVOLw(x)         (((x) << 4) & WMC_R2_2BOOSTVOL)
 473     /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
 474 #define WMC_AUXR2BOOSTVOL                (7 << 0)
 475     #define WMC_AUXR2BOOSTVOLr(x)        ((x) & WMC_AUXR2BOOSTVOL)
 476     #define WMC_AUXR2BOOSTVOLw(x)        ((x) & WMC_AUXR2BOOSTVOL)
 477
 478 /* WMC_OUTPUT_CTRL (0x31) */
 479 #define WMC_DACL2RMIX                    (1 << 6)
 480 #define WMC_DACR2LMIX                    (1 << 5)
 481 #define WMC_OUT4BOOST                    (1 << 4)
 482 #define WMC_OUT3BOOST                    (1 << 3)
 483 #define WMC_SPKBOOST                     (1 << 2)
 484 #define WMC_TSDEN                        (1 << 1)
 485 #define WMC_VROI                         (1 << 0)
 486
 487 /* WMC_LEFT_MIXER_CTRL (0x32) */
 488     /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
 489 #define WMC_AUXLMIXVOL                   (7 << 6)
 490     #define WMC_AUXLMIXVOLr(x)           (((x) & WMC_AUXLMIXVOL) >> 6)
 491     #define WMC_AUXLMIXVOLw(x)           (((x) << 6) & WMC_AUXLMIXVOL)
 492 #define WMC_AUXL2LMIX                    (1 << 5)
 493     /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
 494 #define WMC_BYPLMIXVOL                   (7 << 2)
 495     #define WMC_BYPLMIXVOLr(x)           (((x) & WMC_BYPLMIXVOL) >> 2)
 496     #define WMC_BYPLMIXVOLw(x)           (((x) << 2) & WMC_BYPLMIXVOL)
 497 #define WMC_BYPL2LMIX                    (1 << 1)
 498 #define WMC_DACL2LMIX                    (1 << 0)
 499
 500 /* WMC_RIGHT_MIXER_CTRL (0x33) */
 501     /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
 502 #define WMC_AUXRMIXVOL                   (7 << 6)
 503     #define WMC_AUXRMIXVOLr(x)           (((x) & WMC_AUXRMIXVOL) >> 6)
 504     #define WMC_AUXRMIXVOLw(x)           (((x) << 6) & WMC_AUXRMIXVOL)
 505 #define WMC_AUXR2RMIX                    (1 << 5)
 506     /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
 507 #define WMC_BYPRMIXVOL                   (7 << 2)
 508     #define WMC_BYPRMIXVOLr(x)           (((x) & WMC_BYPRMIXVOL) >> 2)
 509     #define WMC_BYPRMIXVOLw(x)           (((x) << 2) & WMC_BYPRMIXVOL)
 510 #define WMC_BYPR2RMIX                    (1 << 1)
 511 #define WMC_DACR2RMIX                    (1 << 0)
 512
 513 /* WMC_LOUT1_HP_VOLUME_CTRL (0x34) */
 514 /* WMC_ROUT1_HP_VOLUME_CTRL (0x35) */
 515 /* WMC_LOUT2_SPK_VOLUME_CTRL (0x36) */
 516 /* WMC_ROUT2_SPK_VOLUME_CTRL (0x37) */
 517     /* 000000=-57dB...111001=0dB...111111=+6dB */
 518     /* Uses WMC_AVOL* macros */
 519
 520 /* WMC_OUT3_MIXER_CTRL (0x38) */
 521 #define WMC_OUT42OUT3                    (1 << 3)
 522 #define WMC_BYPL2OUT3                    (1 << 2)
 523 #define WMC_LMIX2OUT3                    (1 << 1)
 524 #define WMC_LDAC2OUT3                    (1 << 0)
 525
 526 /* WMC_OUT4_MONO_MIXER_CTRL (0x39) */
 527 #define WMC_HALFSIG                      (1 << 5)
 528 #define WMC_LMIX2OUT4                    (1 << 4)
 529 #define WMC_LDAC2OUT4                    (1 << 3)
 530 #define WMC_BYPR2OUT4                    (1 << 2)
 531 #define WMC_RMIX2OUT4                    (1 << 1)
 532 #define WMC_RDAC2OUT4                    (1 << 0)
 533
 534 #endif /* _WM8978_H */