| blob | 75e3e4d2b36b45b9e33756d78050376ea48a0665 |
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * JPEG assembly IDCT
11 *
12 * Copyright (C) 2009 Andrew Mahone asm versions of the C IDCT algorithms used
13 * jpeg_load.c with
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
19 *
20 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
21 * KIND, either express or implied.
22 *
23 ****************************************************************************/
24 #include "config.h"
26 .section .text
27 .align 2
28 .global jpeg_idct1h
29 .type jpeg_idct1h, %function
30 .global jpeg_idct2v
31 .type jpeg_idct2v, %function
32 .global jpeg_idct2h
33 .type jpeg_idct2h, %function
34 .global jpeg_idct4v
35 .type jpeg_idct4v, %function
36 .global jpeg_idct4h
37 .type jpeg_idct4h, %function
38 .global jpeg_idct8v
39 .type jpeg_idct8v, %function
40 .global jpeg_idct8h
41 .type jpeg_idct8h, %function
43 jpeg_idct1h:
44 /* In the common case of one pass through the loop, the extra add should be
45 cheaper than saving registers to stack and loading a the value 4112. */
46 1:
47 ldrsh r12, [r0]
48 add r12, r12, #4096
49 add r12, r12, #16
50 #if ARM_ARCH < 6
51 mov r12, r12, asr #5
52 cmp r12, #255
53 mvnhi r12, r12, asr #31
54 #else
55 usat r12, #8, r12, asr #5
56 #endif
57 strb r12, [r1]
58 add r0, r0, #16
59 add r1, r1, r3
60 cmp r0, r2
61 bcc 1b
62 bx lr
63 .size jpeg_idct1h, .-jpeg_idct1h
65 jpeg_idct2v:
66 #if ARM_ARCH < 6
67 /* Use SWAR tricks to fake partitioned add and subtract. This is slightly faster
68 than loading two values in each register and using shifts and strh, and
69 requires fewer fixup operations than splitting the values, calculating, and
70 merging.
71 */
72 stmdb sp!, { r4, lr }
73 1:
74 ldr r2, [r0]
75 ldr r3, [r0, #16]
76 eor r12, r2, r3
77 and r12, r12, #0x8000
78 bic r3, r3, #0x8000
79 bic r4, r2, #0x8000
80 add r4, r4, r3
81 eor r4, r4, r12
82 orr r2, r2, #0x8000
83 sub r2, r2, r3
84 eor r2, r2, r12
85 eor r2, r2, #0x8000
86 str r4, [r0]
87 str r2, [r0, #16]
88 add r0, r0, #4
89 cmp r0, r1
90 bcc 1b
91 ldmia sp!, { r4, pc }
92 #else
93 /* ARMv6 offers partitioned adds and subtracts, used here to unroll the loop
94 to two columns.
95 */
96 1:
97 ldr r2, [r0]
98 ldr r3, [r0, #16]
99 sadd16 r12, r2, r3
100 ssub16 r2, r2, r3
101 str r12, [r0]
102 str r2, [r0, #16]
103 add r0, r0, #4
104 cmp r0, r1
105 bcc 1b
106 bx lr
107 #endif
108 .size jpeg_idct2v, .-jpeg_idct2v
110 jpeg_idct2h:
111 #if ARM_ARCH < 6
112 /* Using LDR and shifts here would costs two more ops, and is no faster as
113 results can not be stored merged.
114 */
115 stmdb sp!, { r4-r5, lr }
116 #if ARM_ARCH < 5
117 ldr r14, =4112
118 #else
119 ldrsh r14, .Lpool4+2
120 #endif
121 1:
122 ldrsh r12, [r0]
123 ldrsh r4, [r0, #2]
124 add r12, r12, r14
125 add r5, r12, r4
126 sub r4, r12, r4
127 mov r5, r5, asr #5
128 mov r4, r4, asr #5
129 cmp r5, #255
130 mvnhi r5, r5, asr #31
131 cmp r4, #255
132 mvnhi r4, r4, asr #31
133 #ifdef HAVE_LCD_COLOR
134 strb r5, [r1]
135 strb r4, [r1, #4]
136 #else
137 strb r5, [r1]
138 strb r4, [r1, #1]
139 #endif
140 add r0, r0, #16
141 add r1, r1, r3
142 cmp r0, r2
143 bcc 1b
144 ldmia sp!, { r4-r5, pc }
145 #else
146 stmdb sp!, { r4, lr }
147 ldrsh r14, .Lpool4+2
148 1:
149 ldr r12, [r0]
150 sadd16 r12, r12, r14
151 saddsubx r12, r12, r12
152 usat r4, #8, r12, asr #21
153 sxth r12, r12
154 usat r12, #8, r12, asr #5
155 #ifdef HAVE_LCD_COLOR
156 strb r4, [r1]
157 strb r12, [r1, #4]
158 #else
159 strb r4, [r1]
160 strb r12, [r1, #1]
161 #endif
162 add r0, r0, #16
163 add r1, r1, r3
164 cmp r0, r2
165 bcc 1b
166 ldmia sp!, { r4, pc }
167 #endif
168 .size jpeg_idct2h, .-jpeg_idct2h
170 jpeg_idct4v:
171 #if ARM_ARCH < 5
172 stmdb sp!, { r4-r7, lr }
173 ldr r14, =-15137
174 ldr r12, =6270
175 1:
176 ldrsh r4, [r0, #32]
177 ldrsh r2, [r0]
178 ldrsh r5, [r0, #48]
179 ldrsh r3, [r0, #16]
180 add r6, r2, r4 /* r6 = tmp10 >> 2 = d0 + d2 */
181 sub r2, r2, r4 /* r2 = tmp12 >> 2= d0 - d2 */
182 add r4, r3, r5 /* r4 = z1 = d1 + d3 */
183 add r7, r4, r4, lsl #3
184 rsb r4, r4, r7, lsl #4
185 rsb r4, r4, r4, lsl #5 /* z1 *= 4433 */
186 add r4, r4, #1024
187 mla r3, r12, r3, r4 /* r3 = tmp2 = z1 + z2 * 6270 */
188 mla r5, r14, r5, r4 /* r5 = tmp0 = z1 - z3 * 15137 */
189 mov r6, r6, lsl #2 /* r6 <<= 2 */
190 mov r2, r2, lsl #2 /* r2 <<= 2 */
191 add r7, r6, r3, asr #11 /* r7 = o0 */
192 sub r3, r6, r3, asr #11 /* r3 = o3 */
193 add r6, r2, r5, asr #11 /* r6 = o1 */
194 sub r2, r2, r5, asr #11 /* r2 = o2 */
195 strh r7, [r0]
196 strh r3, [r0, #48]
197 strh r6, [r0, #16]
198 strh r2, [r0, #32]
199 add r0, r0, #2
200 cmp r0, r1
201 bcc 1b
202 ldmia sp!, { r4-r7, pc }
203 #elif ARM_ARCH < 6
204 stmdb sp!, { r4-r8, lr }
205 mov r8, #1024
206 ldrd r4, .Lpool4
207 1:
208 ldrsh r14, [r0, #48]
209 ldrsh r3, [r0, #16]
210 ldrsh r12, [r0, #32]
211 ldrsh r2, [r0]
212 add r6, r3, r14 /* r6 = z1 = d1 + d3 */
213 add r7, r2, r12 /* r7 = tmp10 >> 2 = d0 + d2 */
214 smlabb r6, r5, r6, r8 /* z1 *= 4433 */
215 sub r2, r2, r12 /* r2 = tmp12 >> 2= d0 - d2 */
216 smlatb r3, r5, r3, r6 /* r3 = tmp2 = z1 + z2 * 6270 */
217 smlabb r14, r4, r14, r6 /* r14 = tmp0 = z1 - z3 * 15137 */
218 mov r7, r7, lsl #2
219 mov r2, r2, lsl #2
220 add r12, r7, r3, asr #11 /* r12 = o0 */
221 sub r7, r7, r3, asr #11 /* r7 = o3 */
222 add r3, r2, r14, asr #11 /* r3 = o1 */
223 sub r2, r2, r14, asr #11 /* r2 = o2 */
224 strh r12, [r0]
225 strh r7, [r0, #48]
226 strh r3, [r0, #16]
227 strh r2, [r0, #32]
228 add r0, r0, #2
229 cmp r0, r1
230 bcc 1b
231 ldmia sp!, { r4-r8, pc }
232 #else
233 stmdb sp!, { r4-r10, lr }
234 ldrd r2, .Lpool4
235 mov r12, #1024
236 1:
237 ldr r6, [r0, #32]
238 ldr r4, [r0]
239 ldr r7, [r0, #48]
240 ldr r5, [r0, #16]
241 /* this part is being done in parallel on two columns */
242 sadd16 r8, r4, r6 /* r8 = d0 + d2 */
243 ssub16 r4, r4, r6 /* r4 = d0 - d2 */
244 sadd16 r6, r5, r7 /* r6 = d1 + d3 */
245 /* there is no parallel shift operation, but we can fake it with bic
246 and lsl */
247 bic r8, r8, #0xc000
248 bic r4, r4, #0xc000
249 /* multiplication expands values beyond 16 bits, so this part needs to be
250 split. the values will be merged below so that the rest of the addition
251 can be done in parallel */
252 smlabb r9, r3, r6, r12 /* r9 = z1[0] = (d1 * d3) * 4433 + 1024 */
253 smlabt r6, r3, r6, r12 /* r6 = z1[1] = (d1 * d3) * 4433 + 1024 */
254 smlatb r10, r3, r5, r9 /* r10 = tmp2[0] = z1 + d1 * 6270 */
255 smlabb r14, r2, r7, r9 /* r14 = tmp0[0] = z1 - d3 * 15137 */
256 smlatt r5, r3, r5, r6 /* r5 = tmp2[1] */
257 smlabt r6, r2, r7, r6 /* r6 = tmp0[1] */
258 mov r8, r8, lsl #2 /* complete the parallel shift started */
259 mov r4, r4, lsl #2 /* with the earlier bic instructions */
260 /* tmp2 are in r10, r5; tmp0 are in r14, r6 */
261 /* tmp10, tmp12 are in r4, r8 */
262 mov r10, r10, asr #11
263 mov r14, r14, asr #11
264 pkhbt r5, r10, r5, lsl #5 /* parallel tmp2 */
265 pkhbt r6, r14, r6, lsl #5 /* parallel tmp0 */
266 sadd16 r10, r8, r5 /* d0 */
267 ssub16 r5, r8, r5 /* d3 */
268 sadd16 r14, r4, r6 /* d1 */
269 ssub16 r6, r4, r6 /* d2 */
270 str r10, [r0]
271 str r5, [r0, #48]
272 str r14, [r0, #16]
273 str r6, [r0, #32]
274 add r0, r0, #4
275 cmp r0, r1
276 bcc 1b
277 ldmia sp!, { r4-r10, pc }
278 #endif
279 .size jpeg_idct4v, .-jpeg_idct4v
281 #if ARM_ARCH > 4
282 .align 4
283 .Lpool4:
284 .short -15137
285 .short 4112
286 .short 4433
287 .short 6270
289 .align 2
290 #endif
292 jpeg_idct4h:
293 #if ARM_ARCH < 5
294 stmdb sp!, { r4-r10, lr }
295 ldr r10, =-15137
296 ldr r14, =4112
297 ldr r12, =6270
298 1:
299 ldrsh r4, [r0]
300 ldrsh r6, [r0, #4]
301 ldrsh r7, [r0, #6]
302 ldrsh r5, [r0, #2]
303 add r4, r4, r14
304 add r8, r4, r6 /* r8 = tmp10 >> 2 = d0 + d2 */
305 sub r4, r4, r6 /* r4 = tmp12 >> 2= d0 - d2 */
306 add r6, r5, r7 /* r6 = z1 = d1 + d3 */
307 add r9, r6, r6, lsl #3
308 rsb r6, r6, r9, lsl #4
309 rsb r6, r6, r6, lsl #5 /* z1 *= 4433 */
310 mla r7, r10, r7, r6 /* r5 = tmp0 = z1 - z3 * 15137 */
311 mla r5, r12, r5, r6 /* r3 = tmp2 = z1 + z2 * 6270 */
312 add r9, r5, r8, lsl #13 /* r7 = o0 */
313 rsb r5, r5, r8, lsl #13 /* r3 = o3 */
314 add r8, r7, r4, lsl #13 /* r6 = o1 */
315 rsb r4, r7, r4, lsl #13 /* r2 = o2 */
316 mov r9, r9, asr #18
317 mov r8, r8, asr #18
318 mov r4, r4, asr #18
319 mov r5, r5, asr #18
320 cmp r9, #255
321 mvnhi r9, r9, asr #31
322 cmp r8, #255
323 mvnhi r8, r8, asr #31
324 cmp r4, #255
325 mvnhi r4, r4, asr #31
326 cmp r5, #255
327 mvnhi r5, r5, asr #31
328 #ifdef HAVE_LCD_COLOR
329 strb r9, [r1]
330 strb r8, [r1, #4]
331 strb r4, [r1, #8]
332 strb r5, [r1, #12]
333 #else
334 strb r9, [r1]
335 strb r8, [r1, #1]
336 strb r4, [r1, #2]
337 strb r5, [r1, #3]
338 #endif
339 add r0, r0, #16
340 add r1, r1, r3
341 cmp r0, r2
342 bcc 1b
343 ldmia sp!, { r4-r10, pc }
344 #elif ARM_ARCH < 6 || 1
345 stmdb sp!, { r4-r9, lr }
346 ldrd r4, .Lpool4
347 1:
348 ldrsh r7, [r0, #6]
349 ldrsh r14, [r0, #2]
350 ldrsh r12, [r0]
351 ldrsh r6, [r0, #4]
352 add r8, r14, r7 /* r8 = z1 = d1 + d3 */
353 add r12, r12, r4, lsr #16
354 smulbb r8, r5, r8 /* z1 *= 4433 */
355 add r9, r12, r6 /* r9 = tmp10 >> 13 = d0 + d2 */
356 smlatb r14, r5, r14, r8 /* r14= tmp2 = z1 + z2 * 6270 */
357 smlabb r7, r4, r7, r8 /* r7 = tmp0 = z1 - z3 * 15137 */
358 sub r12, r12, r6 /* r12= tmp12 >> 13 = d0 - d2 */
359 add r6, r14, r9, lsl #13 /* r6 = o0 */
360 rsb r9, r14, r9, lsl #13 /* r9 = o3 */
361 add r14, r7, r12, lsl #13 /* r14= o1 */
362 rsb r12, r7, r12, lsl #13 /* r12= o2 */
363 mov r6, r6, asr #18
364 mov r14, r14, asr #18
365 mov r12, r12, asr #18
366 mov r9, r9, asr #18
367 cmp r6, #255
368 mvnhi r6, r6, asr #31
369 cmp r14, #255
370 mvnhi r14, r14, asr #31
371 cmp r12, #255
372 mvnhi r12, r12, asr #31
373 cmp r9, #255
374 mvnhi r9, r9, asr #31
375 #ifdef HAVE_LCD_COLOR
376 strb r6, [r1]
377 strb r14, [r1, #4]
378 strb r12, [r1, #8]
379 strb r9, [r1, #12]
380 #else
381 strb r6, [r1]
382 strb r14, [r1, #1]
383 strb r12, [r1, #2]
384 strb r9, [r1, #3]
385 #endif
386 add r0, r0, #16
387 add r1, r1, r3
388 cmp r0, r2
389 bcc 1b
390 ldmia sp!, { r4-r9, pc }
391 #else
392 stmdb sp!, { r4-r9, lr }
393 ldrd r4, .Lpool4
394 mov r9, r4, lsr #16
395 1:
396 ldmia r0, { r12, r14 }
397 sadd16 r12, r12, r9
398 sadd16 r6, r12, r14 /* r6lo = d0 + d2, r6hi = d1 + d3 */
399 ssub16 r7, r12, r14 /* r7lo = d0 - d2 */
400 smulbt r8, r5, r6
401 sxth r6, r6
402 smlatt r12, r5, r12, r8 /* r12= tmp2 = z1 + z2 * 6270 */
403 smlabt r14, r4, r14, r8 /* r14= tmp0 = z1 - z3 * 15137 */
404 sxth r7, r7
405 add r8, r12, r6, lsl #13 /* r8 = o0 */
406 rsb r6, r12, r6, lsl #13 /* r6 = o3 */
407 add r12, r14, r7, lsl #13 /* r12= o1 */
408 rsb r14, r14, r7, lsl #13 /* r14= o2 */
409 usat r8, #8, r8, asr #18
410 usat r6, #8, r6, asr #18
411 usat r12, #8, r12, asr #18
412 usat r14, #8, r14, asr #18
413 #ifdef HAVE_LCD_COLOR
414 strb r8, [r1]
415 strb r6, [r1, #12]
416 strb r12, [r1, #4]
417 strb r14, [r1, #8]
418 #else
419 strb r8, [r1]
420 strb r6, [r1, #3]
421 strb r12, [r1, #1]
422 strb r14, [r1, #2]
423 #endif
424 add r0, r0, #16
425 add r1, r1, r3
426 cmp r0, r2
427 bcc 1b
428 ldmia sp!, { r4-r9, pc }
429 #endif
430 .size jpeg_idct4h, .-jpeg_idct4h
432 #if ARM_ARCH < 6
433 jpeg_idct8v:
434 stmdb sp!, { r4-r11, lr }
435 add r2, r0, #128
436 1:
437 ldmia r0!, { r4-r7 }
438 #if ARM_ARCH < 5
439 mov r8, r4, lsl #16
440 orrs r9, r6, r7
441 orreqs r9, r5, r4, lsr #16
442 bne 2f
443 mov r8, r8, asr #14
444 strh r8, [r2]
445 strh r8, [r2, #16]
446 strh r8, [r2, #32]
447 strh r8, [r2, #48]
448 strh r8, [r2, #64]
449 strh r8, [r2, #80]
450 strh r8, [r2, #96]
451 strh r8, [r2, #112]
452 cmp r0, r1
453 add r2, r2, #2
454 bcc 1b
455 ldmia sp!, { r4-r11, pc }
456 2:
457 ldr r14, =4433
458 ldr r12, =-15137
459 mov r10, r5, lsl #16
460 mov r11, r7, lsl #16
461 mov r10, r10, asr #16 /* r10 = z2 = d2 */
462 mov r11, r11, asr #16 /* r11 = z3 = d6 */
463 add r8, r8, #8192
464 add r9, r10, r11
465 mov r8, r8, asr #3 /* r8 = z4 = (d0 << 13) + 1024 */
466 mul r9, r14, r9 /* r9 = z1 = (z2 + z3) * 4433 */
467 ldr r14, =6270
468 mla r11, r12, r11, r9 /* r11 = tmp2 = z1 - z3 * 15137 */
469 mla r10, r14, r10, r9 /* r10 = tmp3 = z1 + z2 * 6270 */
470 mov r9, r6, lsl #16 /* r9 = z5 << 3 = d4 << 16 */
471 add r12, r8, r9, asr #3 /* r12 = tmp0 = z4 + z5 */
472 sub r14, r8, r9, asr #3 /* r14 = tmp1 = z4 - z5 */
473 add r8, r12, r10 /* r8 = tmp10 = tmp0 + tmp3 */
474 sub r9, r12, r10 /* r9 = tmp13 = tmp0 - tmp3 */
475 add r10, r14, r11 /* r10 = tmp11 = tmp1 + tmp2 */
476 sub r11, r14, r11 /* r11 = tmp12 = tmp1 - tmp2 */
477 stmdb sp, { r8-r11 } /* tmp10 tmp13 tmp11 tmp12 */
478 mov r4, r4, asr #16 /* r4 = tmp3 = d1 */
479 mov r5, r5, asr #16 /* r5 = tmp2 = d3 */
480 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
481 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
482 ldr r10, =9633
483 ldr r11, =-16069
484 add r12, r5, r7 /* r12 = z3 = tmp0 + tmp2 */
485 add r14, r4, r6 /* r14 = z4 = tmp1 + tmp3 */
486 add r9, r12, r14 /* r9 = z3 + z4 */
487 mul r9, r10, r9 /* r9 = z5 = (z3 + z4) * 9633 */
488 ldr r10, =-3196
489 mla r12, r11, r12, r9 /* r12 = z3 = z5 - z3 * 16069 */
490 ldr r11, =-7373
491 mla r14, r10, r14, r9 /* r14 = z4 = z5 - z4 * 3196 */
492 ldr r10, =2446
493 add r9, r4, r7 /* r9 = tmp0 + tmp3 */
494 mla r8, r11, r9, r12 /* r8 = z1 + z3 */
495 mla r9, r11, r9, r14 /* r9 = z1 + z4 */
496 ldr r11, =12299
497 mla r7, r10, r7, r8 /* r7 = tmp0 = z1 + z3 + tmp0 * 2446 */
498 ldr r10, =-20995
499 mla r4, r11, r4, r9 /* r4 = tmp3 = z1 + z4 + tmp0 * 12299 */
500 ldr r11, =25172
501 add r9, r5, r6 /* r9 = tmp1 + tmp2 */
502 mla r12, r10, r9, r12 /* r12 = z2 + z3 */
503 mla r14, r10, r9, r14 /* r14 = z2 + z4 */
504 ldr r10, =16819
505 mla r5, r11, r5, r12 /* r5 = tmp2 = z2 + z3 + tmp2 * 25172 */
506 mla r6, r10, r6, r14 /* r6 = tmp1 = z2 + z4 + tmp1 * 16819 */
507 ldmdb sp, { r8-r11 }
508 add r12, r8, r4 /* o0 */
509 sub r14, r8, r4 /* o7 */
510 add r8, r9, r7 /* o3 */
511 sub r9, r9, r7 /* o4 */
512 add r4, r10, r5 /* O1 */
513 sub r5, r10, r5 /* o6 */
514 add r10, r11, r6 /* o2 */
515 sub r11, r11, r6 /* o5 */
516 /* output in order: r12 r4 r10 r8 r9 r11 r5 r14 */
517 mov r12, r12, asr #11
518 mov r4, r4, asr #11
519 mov r10, r10, asr #11
520 mov r8, r8, asr #11
521 mov r9, r9, asr #11
522 mov r11, r11, asr #11
523 mov r5, r5, asr #11
524 mov r14, r14, asr #11
525 strh r12, [r2]
526 strh r4, [r2, #16]
527 strh r10, [r2, #32]
528 strh r8, [r2, #48]
529 strh r9, [r2, #64]
530 strh r11, [r2, #80]
531 strh r5, [r2, #96]
532 strh r14, [r2, #112]
533 #else /* ARMv5+ */
534 mov r12, r4, lsl #16
535 orrs r9, r6, r7
536 orreqs r9, r5, r4, lsr #16
537 bne 2f
538 mov r12, r12, asr #14
539 strh r12, [r2]
540 strh r12, [r2, #16]
541 strh r12, [r2, #32]
542 strh r12, [r2, #48]
543 strh r12, [r2, #64]
544 strh r12, [r2, #80]
545 strh r12, [r2, #96]
546 strh r12, [r2, #112]
547 add r2, r2, #2
548 cmp r0, r1
549 bcc 1b
550 ldmia sp!, { r4-r11, pc }
551 2:
552 ldrd r8, .Lpool8
553 add r12, r12, #8192
554 add r10, r5, r7 /* r10[15:0] = d2 + d6 */
555 sub r14, r12, r6, lsl #16 /* r14 = tmp1 << 3 = (d0 - d4) << 16 */
556 smulbb r10, r8, r10 /* r10 = z1 = (d2 + d6) * 4433 */
557 add r12, r12, r6, lsl #16 /* r12 = tmp0 << 3= (d0 + d4) << 16 */
558 smlatb r11, r8, r7, r10 /* r11 = tmp2 = z1 - d6 * 15137 */
559 smlabb r10, r9, r5, r10 /* r10 = tmp3 = z1 + d2 * 6270 */
560 add r8, r11, r14, asr #3 /* r8 = tmp11 */
561 rsb r11, r11, r14, asr #3 /* r11 = tmp12 */
562 add r14, r10, r12, asr #3 /* r14 = tmp10 */
563 rsb r12, r10, r12, asr #3 /* r12 = tmp13 */
564 stmdb sp, { r8, r11, r12, r14 }/* tmp11 tmp12 tmp13 tmp10 */
565 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
566 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
567 add r12, r6, r4, asr #16 /* r12 = z4 = tmp1 + tmp3 */
568 add r14, r7, r5, asr #16 /* r14 = z3 = tmp0 + tmp2 */
569 add r8, r12, r14 /* r8 = z3 + z4 */
570 ldrd r10, .Lpool8+8
571 smultb r8, r9, r8 /* r8 = z5 = (z3 + z4) * 9633 */
572 add r9, r7, r4, asr #16 /* r9 = z1 = tmp0 + tmp3 */
573 smlabb r14, r10, r14, r8 /* r14 = z3 = z5 - z3 * 16069 */
574 smlatb r12, r10, r12, r8 /* r12 = z4 = z5 - z4 * 3196 */
575 smlabb r8, r11, r9, r14 /* r8 = z3 - z1 * 7373 */
576 smlabb r9, r11, r9, r12 /* r9 = z4 - z1 * 7373 */
577 add r10, r6, r5, asr #16 /* r10 = z2 = tmp1 + tmp2 */
578 smlatb r12, r11, r10, r12 /* r12 = z4 - z2 * 20995 */
579 smlatb r14, r11, r10, r14 /* r14 = z3 - z2 * 20995 */
580 ldrd r10, .Lpool8+16
581 smlabb r7, r10, r7, r8 /* r7 = tmp0 */
582 smlatt r4, r10, r4, r9 /* r4 = tmp3 */
583 smlabb r6, r11, r6, r12 /* r6 = tmp1 */
584 smlatt r5, r11, r5, r14 /* r5 = tmp2 */
585 ldmdb sp, { r8-r11 } /* tmp11 tmp12 tmp13 tmp10 */
586 add r12, r8, r5 /* o1 */
587 sub r14, r8, r5 /* o6 */
588 add r8, r9, r6 /* o2 */
589 sub r9, r9, r6 /* o5 */
590 add r6, r10, r7 /* o3 */
591 sub r7, r10, r7 /* o4 */
592 add r10, r11, r4 /* o0 */
593 sub r11, r11, r4 /* o7 */
594 mov r12, r12, asr #11
595 mov r14, r14, asr #11
596 mov r8, r8, asr #11
597 mov r9, r9, asr #11
598 mov r6, r6, asr #11
599 mov r7, r7, asr #11
600 mov r10, r10, asr #11
601 mov r11, r11, asr #11
602 strh r10, [r2]
603 strh r12, [r2, #16]
604 strh r8, [r2, #32]
605 strh r6, [r2, #48]
606 strh r7, [r2, #64]
607 strh r9, [r2, #80]
608 strh r14, [r2, #96]
609 strh r11, [r2, #112]
610 #endif
611 cmp r0, r1
612 add r2, r2, #2
613 bcc 1b
614 ldmia sp!, { r4-r11, pc }
615 .size jpeg_idct8v, .-jpeg_idct8v
617 #if ARM_ARCH > 4
618 .align 4
619 .Lpool8:
620 .short 4433
621 .short -15137
622 .short 6270
623 .short 9633
624 .short -16069
625 .short -3196
626 .short -7373
627 .short -20995
628 .short 2446
629 .short 12299
630 .short 16819
631 .short 25172
632 .align 2
633 #endif
635 jpeg_idct8h:
636 stmdb sp!, { r4-r11, lr }
637 1:
638 ldmia r0!, { r4-r7 }
639 ldr r14, =(4112<<16)
640 #if ARM_ARCH < 5
641 add r8, r14, r4, lsl #16
642 orrs r9, r6, r7
643 orreqs r9, r5, r4, lsr #16
644 bne 2f
645 mov r8, r8, asr #21
646 cmp r8, #255
647 mvnhi r8, r8, asr #31
648 #ifdef HAVE_LCD_COLOR
649 strb r8, [r1]
650 strb r8, [r1, #4]
651 strb r8, [r1, #8]
652 strb r8, [r1, #12]
653 strb r8, [r1, #16]
654 strb r8, [r1, #20]
655 strb r8, [r1, #24]
656 strb r8, [r1, #28]
657 #else
658 strb r8, [r1]
659 strb r8, [r1, #1]
660 strb r8, [r1, #2]
661 strb r8, [r1, #3]
662 strb r8, [r1, #4]
663 strb r8, [r1, #5]
664 strb r8, [r1, #6]
665 strb r8, [r1, #7]
666 #endif
667 add r1, r1, r3
668 cmp r0, r2
669 bcc 1b
670 ldmia sp!, { r4-r11, pc }
671 2:
672 ldr r14, =4433
673 ldr r12, =-15137
674 mov r10, r5, lsl #16
675 mov r11, r7, lsl #16
676 mov r10, r10, asr #16 /* r10 = z2 = d2 */
677 mov r11, r11, asr #16 /* r11 = z3 = d6 */
678 add r9, r10, r11
679 mov r8, r8, asr #3 /* r8 = z4 = (d0 + 4112) << 13 */
680 mul r9, r14, r9 /* r9 = z1 = (z2 + z3) * 4433 */
681 ldr r14, =6270
682 mla r11, r12, r11, r9 /* r11 = tmp2 = z1 - z3 * 15137 */
683 mla r10, r14, r10, r9 /* r10 = tmp3 = z1 + z2 * 6270 */
684 mov r9, r6, lsl #16 /* r9 = z5 << 3 = d4 << 16 */
685 add r12, r8, r9, asr #3 /* r12 = tmp0 = z4 + z5 */
686 sub r14, r8, r9, asr #3 /* r14 = tmp1 = z4 - z5 */
687 add r8, r12, r10 /* r8 = tmp10 = tmp0 + tmp3 */
688 sub r9, r12, r10 /* r9 = tmp13 = tmp0 - tmp3 */
689 add r10, r14, r11 /* r10 = tmp11 = tmp1 + tmp2 */
690 sub r11, r14, r11 /* r11 = tmp12 = tmp1 - tmp2 */
691 stmdb sp, { r8-r11 } /* tmp10 tmp13 tmp11 tmp12 */
692 mov r4, r4, asr #16 /* r4 = tmp3 = d1 */
693 mov r5, r5, asr #16 /* r5 = tmp2 = d3 */
694 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
695 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
696 ldr r10, =9633
697 ldr r11, =-16069
698 add r12, r5, r7 /* r12 = z3 = tmp0 + tmp2 */
699 add r14, r4, r6 /* r14 = z4 = tmp1 + tmp3 */
700 add r9, r12, r14 /* r9 = z3 + z4 */
701 mul r9, r10, r9 /* r9 = z5 = (z3 + z4) * 9633 */
702 ldr r10, =-3196
703 mla r12, r11, r12, r9 /* r12 = z3 = z5 - z3 * 16069 */
704 ldr r11, =-7373
705 mla r14, r10, r14, r9 /* r14 = z4 = z5 - z4 * 3196 */
706 ldr r10, =2446
707 add r9, r4, r7 /* r9 = tmp0 + tmp3 */
708 mla r8, r11, r9, r12 /* r8 = z1 + z3 */
709 mla r9, r11, r9, r14 /* r9 = z1 + z4 */
710 ldr r11, =12299
711 mla r7, r10, r7, r8 /* r7 = tmp0 = z1 + z3 + tmp0 * 2446 */
712 ldr r10, =-20995
713 mla r4, r11, r4, r9 /* r4 = tmp3 = z1 + z4 + tmp0 * 12299 */
714 ldr r11, =25172
715 add r9, r5, r6 /* r9 = tmp1 + tmp2 */
716 mla r12, r10, r9, r12 /* r12 = z2 + z3 */
717 mla r14, r10, r9, r14 /* r14 = z2 + z4 */
718 ldr r10, =16819
719 mla r5, r11, r5, r12 /* r5 = tmp2 = z2 + z3 + tmp2 * 25172 */
720 mla r6, r10, r6, r14 /* r6 = tmp1 = z2 + z4 + tmp1 * 16819 */
721 ldmdb sp, { r8-r11 }
722 add r12, r8, r4 /* o0 */
723 sub r14, r8, r4 /* o7 */
724 add r8, r9, r7 /* o3 */
725 sub r9, r9, r7 /* o4 */
726 add r4, r10, r5 /* O1 */
727 sub r5, r10, r5 /* o6 */
728 add r10, r11, r6 /* o2 */
729 sub r11, r11, r6 /* o5 */
730 /* output in order: r12 r4 r10 r8 r9 r11 r5 r14 */
731 mov r12, r12, asr #18
732 cmp r12, #255
733 mvnhi r12, r12, asr #31
734 mov r4, r4, asr #18
735 cmp r4, #255
736 mvnhi r4, r4, asr #31
737 mov r10, r10, asr #18
738 cmp r10, #255
739 mvnhi r10, r10, asr #31
740 mov r8, r8, asr #18
741 cmp r8, #255
742 mvnhi r8, r8, asr #31
743 mov r9, r9, asr #18
744 cmp r9, #255
745 mvnhi r9, r9, asr #31
746 mov r11, r11, asr #18
747 cmp r11, #255
748 mvnhi r11, r11, asr #31
749 mov r5, r5, asr #18
750 cmp r5, #255
751 mvnhi r5, r5, asr #31
752 mov r14, r14, asr #18
753 cmp r14, #255
754 mvnhi r14, r14, asr #31
755 #ifdef HAVE_LCD_COLOR
756 strb r12, [r1]
757 strb r4, [r1, #4]
758 strb r10, [r1, #8]
759 strb r8, [r1, #12]
760 strb r9, [r1, #16]
761 strb r11, [r1, #20]
762 strb r5, [r1, #24]
763 strb r14, [r1, #28]
764 #else
765 strb r12, [r1]
766 strb r4, [r1, #1]
767 strb r10, [r1, #2]
768 strb r8, [r1, #3]
769 strb r9, [r1, #4]
770 strb r11, [r1, #5]
771 strb r5, [r1, #6]
772 strb r14, [r1, #7]
773 #endif
774 #else /* ARMv5+ */
775 add r12, r14, r4, lsl #16
776 orrs r9, r6, r7
777 orreqs r9, r5, r4, lsr #16
778 bne 2f
779 mov r12, r12, asr #21
780 cmp r12, #255
781 mvnhi r12, r12, asr #31
782 #ifdef HAVE_LCD_COLOR
783 strb r12, [r1]
784 strb r12, [r1, #4]
785 strb r12, [r1, #8]
786 strb r12, [r1, #12]
787 strb r12, [r1, #16]
788 strb r12, [r1, #20]
789 strb r12, [r1, #24]
790 strb r12, [r1, #28]
791 #else
792 strb r12, [r1]
793 strb r12, [r1, #1]
794 strb r12, [r1, #2]
795 strb r12, [r1, #3]
796 strb r12, [r1, #4]
797 strb r12, [r1, #5]
798 strb r12, [r1, #6]
799 strb r12, [r1, #7]
800 #endif
801 add r1, r1, r3
802 cmp r0, r2
803 bcc 1b
804 ldmia sp!, { r4-r11, pc }
805 2:
806 ldrd r8, .Lpool8
807 add r10, r5, r7 /* r10[15:0] = d2 + d6 */
808 sub r14, r12, r6, lsl #16 /* r14 = tmp1 << 3 = (d0 - d4) << 16 */
809 smulbb r10, r8, r10 /* r10 = z1 = (d2 + d6) * 4433 */
810 add r12, r12, r6, lsl #16 /* r12 = tmp0 << 3= (d0 + d4) << 16 */
811 smlatb r11, r8, r7, r10 /* r11 = tmp2 = z1 - d6 * 15137 */
812 smlabb r10, r9, r5, r10 /* r10 = tmp3 = z1 + d2 * 6270 */
813 add r8, r11, r14, asr #3 /* r8 = tmp11 */
814 rsb r11, r11, r14, asr #3 /* r11 = tmp12 */
815 add r14, r10, r12, asr #3 /* r14 = tmp10 */
816 rsb r12, r10, r12, asr #3 /* r12 = tmp13 */
817 stmdb sp, { r8, r11, r12, r14 }/* tmp11 tmp12 tmp13 tmp10 */
818 mov r6, r6, asr #16 /* r6 = tmp1 = d5 */
819 mov r7, r7, asr #16 /* r7 = tmp0 = d7 */
820 add r12, r6, r4, asr #16 /* r12 = z4 = tmp1 + tmp3 */
821 add r14, r7, r5, asr #16 /* r14 = z3 = tmp0 + tmp2 */
822 add r8, r12, r14 /* r8 = z3 + z4 */
823 ldrd r10, .Lpool8+8
824 smultb r8, r9, r8 /* r8 = z5 = (z3 + z4) * 9633 */
825 add r9, r7, r4, asr #16 /* r9 = z1 = tmp0 + tmp3 */
826 smlabb r14, r10, r14, r8 /* r14 = z3 = z5 - z3 * 16069 */
827 smlatb r12, r10, r12, r8 /* r12 = z4 = z5 - z4 * 3196 */
828 smlabb r8, r11, r9, r14 /* r8 = z3 - z1 * 7373 */
829 smlabb r9, r11, r9, r12 /* r9 = z4 - z1 * 7373 */
830 add r10, r6, r5, asr #16 /* r10 = z2 = tmp1 + tmp2 */
831 smlatb r12, r11, r10, r12 /* r12 = z4 - z2 * 20995 */
832 smlatb r14, r11, r10, r14 /* r14 = z3 - z2 * 20995 */
833 ldrd r10, .Lpool8+16
834 smlabb r7, r10, r7, r8 /* r7 = tmp0 */
835 smlatt r4, r10, r4, r9 /* r4 = tmp3 */
836 smlabb r6, r11, r6, r12 /* r6 = tmp1 */
837 smlatt r5, r11, r5, r14 /* r5 = tmp2 */
838 ldmdb sp, { r8-r11 } /* tmp11 tmp12 tmp13 tmp10 */
839 add r12, r8, r5 /* o1 */
840 sub r14, r8, r5 /* o6 */
841 add r8, r9, r6 /* o2 */
842 sub r9, r9, r6 /* o5 */
843 add r6, r10, r7 /* o3 */
844 sub r7, r10, r7 /* o4 */
845 add r10, r11, r4 /* o0 */
846 sub r11, r11, r4 /* o7 */
847 /* output in order: r10 r12 r8 r6 r7 r9 r14 r11 */
848 mov r10, r10, asr #18
849 cmp r10, #255
850 mvnhi r10, r10, asr #31
851 mov r12, r12, asr #18
852 cmp r12, #255
853 mvnhi r12, r12, asr #31
854 mov r8, r8, asr #18
855 cmp r8, #255
856 mvnhi r8, r8, asr #31
857 mov r6, r6, asr #18
858 cmp r6, #255
859 mvnhi r6, r6, asr #31
860 mov r7, r7, asr #18
861 cmp r7, #255
862 mvnhi r7, r7, asr #31
863 mov r9, r9, asr #18
864 cmp r9, #255
865 mvnhi r9, r9, asr #31
866 mov r14, r14, asr #18
867 cmp r14, #255
868 mvnhi r14, r14, asr #31
869 mov r11, r11, asr #18
870 cmp r11, #255
871 mvnhi r11, r11, asr #31
872 #ifdef HAVE_LCD_COLOR
873 strb r10, [r1]
874 strb r12, [r1, #4]
875 strb r8, [r1, #8]
876 strb r6, [r1, #12]
877 strb r7, [r1, #16]
878 strb r9, [r1, #20]
879 strb r14, [r1, #24]
880 strb r11, [r1, #28]
881 #else
882 strb r10, [r1]
883 strb r12, [r1, #1]
884 strb r8, [r1, #2]
885 strb r6, [r1, #3]
886 strb r7, [r1, #4]
887 strb r9, [r1, #5]
888 strb r14, [r1, #6]
889 strb r11, [r1, #7]
890 #endif
891 #endif
892 add r1, r1, r3
893 cmp r0, r2
894 bcc 1b
895 ldmia sp!, { r4-r11, pc }
896 .size jpeg_idct8h, .-jpeg_idct8h
897 #else
898 jpeg_idct8v:
899 stmdb sp!, { r4-r11, lr }
900 add r2, r0, #128
901 1:
902 ldmia r0!, { r4-r7 }
903 orrs r9, r6, r7
904 orreqs r9, r5, r4, lsr #16
905 bne 2f
906 mov r4, r4, lsl #2
907 strh r4, [r2]
908 strh r4, [r2, #16]
909 strh r4, [r2, #32]
910 strh r4, [r2, #48]
911 strh r4, [r2, #64]
912 strh r4, [r2, #80]
913 strh r4, [r2, #96]
914 strh r4, [r2, #112]
915 cmp r0, r1
916 add r2, r2, #2
917 bcc 1b
918 ldmia sp!, { r4-r11, pc }
919 2:
920 ldrd r8, .Lpool8
921 mov r12, r4, lsl #16
922 add r10, r5, r7 /* r10 = d2 + d6 */
923 add r12, r12, #8192
924 add r3, r12, r6, lsl #16 /* tmp0 */
925 sub r12, r12, r6, lsl #16 /* tmp1 */
926 pkhtb r4, r5, r4, asr #16 /* r4 = (tmp3[o], tmp2[0]) = (d1, d3) */
927 smulbb r14, r8, r10 /* r14 = z1[e] = (d2 + d6) * 4433 */
928 pkhtb r6, r6, r7, asr #16 /* r6 = (tmp0[o], tmp1[o]) = (d7, d5) */
929 smlatb r7, r8, r7, r14 /* r7 = tmp2[e] = z1 - d6 * 15137 */
930 smlabb r5, r9, r5, r14 /* r5 = tmp3[e] = z1 + d2 * 6270 */
931 pkhtb r9, r9, r9, asr #16 /* r9 = (9633, 9633) */
932 add r10, r5, r3, asr #3 /* r10 = tmp10 */
933 rsb r11, r5, r3, asr #3 /* r11 = tmp13 */
934 mov r3, r4, ror #16
935 rsb r14, r7, r12, asr #3 /* r14 = tmp12 */
936 add r12, r7, r12, asr #3 /* r12 = tmp11 */
937 sadd16 r8, r3, r6 /* z3, z4 */
938 stmdb sp, { r10-r12, r14 } /* tmp10 tmp13 tmp11 tmp12 */
939 smuad r5, r9, r8 /* r5 = z5 = (z3[o] + z4[o]) * 9633 */
940 ldrd r10, .Lpool8+8
941 sadd16 r7, r4, r6 /* r7 = (z1, z2) */
942 smlatt r9, r10, r8, r5 /* r9 = z4 = z5 - z4 * 16069 */
943 smlabb r8, r10, r8, r5 /* r8 = z3 = z5 - z3 * 3196 */
944 smlabb r14, r11, r7, r9 /* r14 = z1 + z4 */
945 smlabb r12, r11, r7, r8 /* r12 = z1 + z3 */
946 smlatt r5, r11, r7, r9 /* r5 = z2 + z4 */
947 smlatt r7, r11, r7, r8 /* r7 = z2 + z3 */
948 ldrd r8, .Lpool8+16
949 smlabt r7, r9, r4, r7 /* r7 = tmp2 */
950 smlatb r14, r9, r4, r14 /* r14 = tmp3 */
951 ldmdb sp, { r4, r9-r11 } /* tmp10 tmp13 tmp11 tmp12 */
952 smlabb r12, r8, r6, r12 /* r12 = tmp0 */
953 smlatt r5, r8, r6, r5 /* r5 = tmp1 */
954 /* used: r4, r5, r7, r9-r12, r14 */
955 add r6, r4, r14 /* o0 */
956 sub r8, r4, r14 /* o7 */
957 add r14, r9, r12 /* o3 */
958 sub r12, r9, r12 /* o4 */
959 add r4, r10, r7 /* o1 */
960 sub r7, r10, r7 /* o6 */
961 add r9, r11, r5 /* o2 */
962 sub r10, r11, r5 /* o5 */
963 mov r6, r6, asr #11
964 mov r4, r4, asr #11
965 mov r9, r9, asr #11
966 mov r14, r14, asr #11
967 mov r12, r12, asr #11
968 mov r10, r10, asr #11
969 mov r7, r7, asr #11
970 mov r8, r8, asr #11
971 strh r6, [r2]
972 strh r4, [r2, #16]
973 strh r9, [r2, #32]
974 strh r14, [r2, #48]
975 strh r12, [r2, #64]
976 strh r10, [r2, #80]
977 strh r7, [r2, #96]
978 strh r8, [r2, #112]
979 cmp r0, r1
980 add r2, r2, #2
981 bcc 1b
982 ldmia sp!, { r4-r11, pc }
983 .size jpeg_idct8v, .-jpeg_idct8v
985 .align 4
986 .Lpool8:
987 .short 4433
988 .short -15137
989 .short 6270
990 .short 9633
991 .short -16069
992 .short -3196
993 .short -7373
994 .short -20995
995 .short 2446
996 .short 16819
997 .short 25172
998 .short 12299
1000 .align 2
1001 jpeg_idct8h:
1002 stmdb sp!, { r4-r11, lr }
1003 1:
1004 ldr r14, =4112
1005 ldmia r0!, { r4-r7 }
1006 sadd16 r4, r4, r14
1007 orrs r9, r6, r7
1008 orreqs r9, r5, r4, lsr #16
1009 bne 2f
1010 sxth r4, r4
1011 usat r4, #8, r4, asr #5
1012 #ifdef HAVE_LCD_COLOR
1013 strb r4, [r1]
1014 strb r4, [r1, #4]
1015 strb r4, [r1, #8]
1016 strb r4, [r1, #12]
1017 strb r4, [r1, #16]
1018 strb r4, [r1, #20]
1019 strb r4, [r1, #24]
1020 strb r4, [r1, #28]
1021 #else
1022 strb r4, [r1]
1023 strb r4, [r1, #1]
1024 strb r4, [r1, #2]
1025 strb r4, [r1, #3]
1026 strb r4, [r1, #4]
1027 strb r4, [r1, #5]
1028 strb r4, [r1, #6]
1029 strb r4, [r1, #7]
1030 #endif
1031 add r1, r1, r3
1032 cmp r0, r2
1033 bcc 1b
1034 ldmia sp!, { r4-r11, pc }
1035 2:
1036 ldrd r8, .Lpool8
1037 sadd16 r10, r5, r7 /* r10 = (d2 + d6, d3 + d7) */
1038 ssub16 r12, r4, r6 /* r12 = (d0 - d4, d1 - d5) */
1039 sadd16 r11, r4, r6 /* r11 = (d0 + d4, d1 + d5) */
1040 pkhtb r4, r5, r4, asr #16 /* r4 = (tmp3[o], tmp2[0]) = (d1, d3) */
1041 smulbb r14, r8, r10 /* r14 = z1[e] = (d2 + d6) * 4433 */
1042 pkhtb r6, r6, r7, asr #16 /* r6 = (tmp0[o], tmp1[o]) = (d7, d5) */
1043 smlatb r7, r8, r7, r14 /* r7 = tmp2[e] = z1 - d6 * 15137 */
1044 smlabb r5, r9, r5, r14 /* r5 = tmp3[e] = z1 + d2 * 6270 */
1045 sxth r12, r12 /* r12 = tmp1[e] = d0 - d4 */
1046 pkhtb r8, r11, r10, asr #16 /* r8 = (z3[o], z4[o]) */
1047 sxth r14, r11 /* r14 = tmp0[e] */
1048 pkhtb r9, r9, r9, asr #16 /* r9 = (9633, 9633) */
1049 add r10, r5, r14, lsl #13 /* r10 = tmp10 */
1050 rsb r11, r5, r14, lsl #13 /* r11 = tmp13 */
1051 rsb r14, r7, r12, lsl #13 /* r14 = tmp12 */
1052 add r12, r7, r12, lsl #13 /* r12 = tmp11 */
1053 stmdb sp, { r10-r12, r14 } /* tmp10 tmp13 tmp11 tmp12 */
1054 smuad r5, r9, r8 /* r5 = z5 = (z3[o] + z4[o]) * 9633 */
1055 ldrd r10, .Lpool8+8
1056 sadd16 r7, r4, r6 /* r7 = (z1, z2) */
1057 smlatt r9, r10, r8, r5 /* r9 = z4 = z5 - z4 * 16069 */
1058 smlabb r8, r10, r8, r5 /* r8 = z3 = z5 - z3 * 3196 */
1059 smlabb r14, r11, r7, r9 /* r14 = z1 + z4 */
1060 smlabb r12, r11, r7, r8 /* r12 = z1 + z3 */
1061 smlatt r5, r11, r7, r9 /* r5 = z2 + z4 */
1062 smlatt r7, r11, r7, r8 /* r7 = z2 + z3 */
1063 ldrd r8, .Lpool8+16
1064 smlabt r7, r9, r4, r7 /* r7 = tmp2 */
1065 smlatb r14, r9, r4, r14 /* r14 = tmp3 */
1066 ldmdb sp, { r4, r9-r11 } /* tmp10 tmp13 tmp11 tmp12 */
1067 smlabb r12, r8, r6, r12 /* r12 = tmp0 */
1068 smlatt r5, r8, r6, r5 /* r5 = tmp1 */
1069 /* used: r4, r5, r7, r9-r12, r14 */
1070 add r6, r4, r14 /* o0 */
1071 sub r8, r4, r14 /* o7 */
1072 add r14, r9, r12 /* o3 */
1073 sub r12, r9, r12 /* o4 */
1074 add r4, r10, r7 /* o1 */
1075 sub r7, r10, r7 /* o6 */
1076 add r9, r11, r5 /* o2 */
1077 sub r10, r11, r5 /* o5 */
1078 usat r6, #8, r6, asr #18
1079 usat r4, #8, r4, asr #18
1080 usat r9, #8, r9, asr #18
1081 usat r14, #8, r14, asr #18
1082 usat r12, #8, r12, asr #18
1083 usat r10, #8, r10, asr #18
1084 usat r7, #8, r7, asr #18
1085 usat r8, #8, r8, asr #18
1086 #ifdef HAVE_LCD_COLOR
1087 strb r6, [r1]
1088 strb r4, [r1, #4]
1089 strb r9, [r1, #8]
1090 strb r14, [r1, #12]
1091 strb r12, [r1, #16]
1092 strb r10, [r1, #20]
1093 strb r7, [r1, #24]
1094 strb r8, [r1, #28]
1095 #else
1096 strb r6, [r1]
1097 strb r4, [r1, #1]
1098 strb r9, [r1, #2]
1099 strb r14, [r1, #3]
1100 strb r12, [r1, #4]
1101 strb r10, [r1, #5]
1102 strb r7, [r1, #6]
1103 strb r8, [r1, #7]
1104 #endif
1105 cmp r0, r2
1106 add r1, r1, r3
1107 bcc 1b
1108 ldmia sp!, { r4-r11, pc }
1109 .size jpeg_idct8h, .-jpeg_idct8h
1110 #endif