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kvm: qemu: add cpu_unregister_io_memory and make io mem table index dynamic
[kvm-userspace.git] / qemu / hw / tsc210x.c
blob96956a47de894aef784bfab2167449260d234402
1 /*
2 * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
3 *
4 * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22 #include "hw.h"
23 #include "audio/audio.h"
24 #include "qemu-timer.h"
25 #include "console.h"
26 #include "omap.h"
27
28 #define TSC_DATA_REGISTERS_PAGE 0x0
29 #define TSC_CONTROL_REGISTERS_PAGE 0x1
30 #define TSC_AUDIO_REGISTERS_PAGE 0x2
31
32 #define TSC_VERBOSE
33
34 #define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
35
36 struct tsc210x_state_s {
37 qemu_irq pint;
38 QEMUTimer *timer;
39 QEMUSoundCard card;
40 struct uwire_slave_s chip;
41 struct i2s_codec_s codec;
42 uint8_t in_fifo[16384];
43 uint8_t out_fifo[16384];
44
45 int x, y;
46 int pressure;
47
48 int state, page, offset, irq;
49 uint16_t command, dav;
50
51 int busy;
52 int enabled;
53 int host_mode;
54 int function;
55 int nextfunction;
56 int precision;
57 int nextprecision;
58 int filter;
59 int pin_func;
60 int ref;
61 int timing;
62 int noise;
63
64 uint16_t audio_ctrl1;
65 uint16_t audio_ctrl2;
66 uint16_t audio_ctrl3;
67 uint16_t pll[2];
68 uint16_t volume;
69 int64_t volume_change;
70 int softstep;
71 uint16_t dac_power;
72 int64_t powerdown;
73 uint16_t filter_data[0x14];
74
75 const char *name;
76 SWVoiceIn *adc_voice[1];
77 SWVoiceOut *dac_voice[1];
78 int i2s_rx_rate;
79 int i2s_tx_rate;
80 AudioState *audio;
81 };
82
83 static const int resolution[4] = { 12, 8, 10, 12 };
84
85 #define TSC_MODE_NO_SCAN 0x0
86 #define TSC_MODE_XY_SCAN 0x1
87 #define TSC_MODE_XYZ_SCAN 0x2
88 #define TSC_MODE_X 0x3
89 #define TSC_MODE_Y 0x4
90 #define TSC_MODE_Z 0x5
91 #define TSC_MODE_BAT1 0x6
92 #define TSC_MODE_BAT2 0x7
93 #define TSC_MODE_AUX 0x8
94 #define TSC_MODE_AUX_SCAN 0x9
95 #define TSC_MODE_TEMP1 0xa
96 #define TSC_MODE_PORT_SCAN 0xb
97 #define TSC_MODE_TEMP2 0xc
98 #define TSC_MODE_XX_DRV 0xd
99 #define TSC_MODE_YY_DRV 0xe
100 #define TSC_MODE_YX_DRV 0xf
101
102 static const uint16_t mode_regs[16] = {
103 0x0000, /* No scan */
104 0x0600, /* X, Y scan */
105 0x0780, /* X, Y, Z scan */
106 0x0400, /* X */
107 0x0200, /* Y */
108 0x0180, /* Z */
109 0x0040, /* BAT1 */
110 0x0030, /* BAT2 */
111 0x0010, /* AUX */
112 0x0010, /* AUX scan */
113 0x0004, /* TEMP1 */
114 0x0070, /* Port scan */
115 0x0002, /* TEMP2 */
116 0x0000, /* X+, X- drivers */
117 0x0000, /* Y+, Y- drivers */
118 0x0000, /* Y+, X- drivers */
119 };
120
121 /*
122 * Convert screen coordinates to arbitrary values that the
123 * touchscreen in my Palm Tungsten E device returns.
124 * This shouldn't really matter (because the guest system
125 * should calibrate the touchscreen anyway), but let's
126 * imitate some real hardware.
127 */
128 #define X_TRANSFORM(value) \
129 ((3850 - ((int) (value) * (3850 - 250) / 32768)) << 4)
130 #define Y_TRANSFORM(value) \
131 ((150 + ((int) (value) * (3037 - 150) / 32768)) << 4)
132 #define Z1_TRANSFORM(s) \
133 ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
134 #define Z2_TRANSFORM(s) \
135 ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
136
137 #define BAT1_VAL 0x8660
138 #define BAT2_VAL 0x0000
139 #define AUX1_VAL 0x35c0
140 #define AUX2_VAL 0xffff
141 #define TEMP1_VAL 0x8c70
142 #define TEMP2_VAL 0xa5b0
143
144 #define TSC_POWEROFF_DELAY 50
145 #define TSC_SOFTSTEP_DELAY 50
146
147 static void tsc210x_reset(struct tsc210x_state_s *s)
148 {
149 s->state = 0;
150 s->pin_func = 2;
151 s->enabled = 0;
152 s->busy = 0;
153 s->nextfunction = 0;
154 s->ref = 0;
155 s->timing = 0;
156 s->irq = 0;
157 s->dav = 0;
158
159 s->audio_ctrl1 = 0x0000;
160 s->audio_ctrl2 = 0x4410;
161 s->audio_ctrl3 = 0x0000;
162 s->pll[0] = 0x1004;
163 s->pll[1] = 0x0000;
164 s->volume = 0xffff;
165 s->dac_power = 0x8540;
166 s->softstep = 1;
167 s->volume_change = 0;
168 s->powerdown = 0;
169 s->filter_data[0x00] = 0x6be3;
170 s->filter_data[0x01] = 0x9666;
171 s->filter_data[0x02] = 0x675d;
172 s->filter_data[0x03] = 0x6be3;
173 s->filter_data[0x04] = 0x9666;
174 s->filter_data[0x05] = 0x675d;
175 s->filter_data[0x06] = 0x7d83;
176 s->filter_data[0x07] = 0x84ee;
177 s->filter_data[0x08] = 0x7d83;
178 s->filter_data[0x09] = 0x84ee;
179 s->filter_data[0x0a] = 0x6be3;
180 s->filter_data[0x0b] = 0x9666;
181 s->filter_data[0x0c] = 0x675d;
182 s->filter_data[0x0d] = 0x6be3;
183 s->filter_data[0x0e] = 0x9666;
184 s->filter_data[0x0f] = 0x675d;
185 s->filter_data[0x10] = 0x7d83;
186 s->filter_data[0x11] = 0x84ee;
187 s->filter_data[0x12] = 0x7d83;
188 s->filter_data[0x13] = 0x84ee;
189
190 s->i2s_tx_rate = 0;
191 s->i2s_rx_rate = 0;
192
193 qemu_set_irq(s->pint, !s->irq);
194 }
195
196 struct tsc210x_rate_info_s {
197 int rate;
198 int dsor;
199 int fsref;
200 };
201
202 /* { rate, dsor, fsref } */
203 static const struct tsc210x_rate_info_s tsc2101_rates[] = {
204 /* Fsref / 6.0 */
205 { 7350, 7, 1 },
206 { 8000, 7, 0 },
207 /* Fsref / 5.5 */
208 { 8018, 6, 1 },
209 { 8727, 6, 0 },
210 /* Fsref / 5.0 */
211 { 8820, 5, 1 },
212 { 9600, 5, 0 },
213 /* Fsref / 4.0 */
214 { 11025, 4, 1 },
215 { 12000, 4, 0 },
216 /* Fsref / 3.0 */
217 { 14700, 3, 1 },
218 { 16000, 3, 0 },
219 /* Fsref / 2.0 */
220 { 22050, 2, 1 },
221 { 24000, 2, 0 },
222 /* Fsref / 1.5 */
223 { 29400, 1, 1 },
224 { 32000, 1, 0 },
225 /* Fsref */
226 { 44100, 0, 1 },
227 { 48000, 0, 0 },
228
229 { 0, 0, 0 },
230 };
231
232 /* { rate, dsor, fsref } */
233 static const struct tsc210x_rate_info_s tsc2102_rates[] = {
234 /* Fsref / 6.0 */
235 { 7350, 63, 1 },
236 { 8000, 63, 0 },
237 /* Fsref / 6.0 */
238 { 7350, 54, 1 },
239 { 8000, 54, 0 },
240 /* Fsref / 5.0 */
241 { 8820, 45, 1 },
242 { 9600, 45, 0 },
243 /* Fsref / 4.0 */
244 { 11025, 36, 1 },
245 { 12000, 36, 0 },
246 /* Fsref / 3.0 */
247 { 14700, 27, 1 },
248 { 16000, 27, 0 },
249 /* Fsref / 2.0 */
250 { 22050, 18, 1 },
251 { 24000, 18, 0 },
252 /* Fsref / 1.5 */
253 { 29400, 9, 1 },
254 { 32000, 9, 0 },
255 /* Fsref */
256 { 44100, 0, 1 },
257 { 48000, 0, 0 },
258
259 { 0, 0, 0 },
260 };
261
262 static inline void tsc210x_out_flush(struct tsc210x_state_s *s, int len)
263 {
264 uint8_t *data = s->codec.out.fifo + s->codec.out.start;
265 uint8_t *end = data + len;
266
267 while (data < end)
268 data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
269
270 s->codec.out.len -= len;
271 if (s->codec.out.len)
272 memmove(s->codec.out.fifo, end, s->codec.out.len);
273 s->codec.out.start = 0;
274 }
275
276 static void tsc210x_audio_out_cb(struct tsc210x_state_s *s, int free_b)
277 {
278 if (s->codec.out.len >= free_b) {
279 tsc210x_out_flush(s, free_b);
280 return;
281 }
282
283 s->codec.out.size = MIN(free_b, 16384);
284 qemu_irq_raise(s->codec.tx_start);
285 }
286
287 static void tsc2102_audio_rate_update(struct tsc210x_state_s *s)
288 {
289 const struct tsc210x_rate_info_s *rate;
290
291 s->codec.tx_rate = 0;
292 s->codec.rx_rate = 0;
293 if (s->dac_power & (1 << 15)) /* PWDNC */
294 return;
295
296 for (rate = tsc2102_rates; rate->rate; rate ++)
297 if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
298 rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
299 break;
300 if (!rate->rate) {
301 printf("%s: unknown sampling rate configured\n", __FUNCTION__);
302 return;
303 }
304
305 s->codec.tx_rate = rate->rate;
306 }
307
308 static void tsc2102_audio_output_update(struct tsc210x_state_s *s)
309 {
310 int enable;
311 audsettings_t fmt;
312
313 if (s->dac_voice[0]) {
314 tsc210x_out_flush(s, s->codec.out.len);
315 s->codec.out.size = 0;
316 AUD_set_active_out(s->dac_voice[0], 0);
317 AUD_close_out(&s->card, s->dac_voice[0]);
318 s->dac_voice[0] = 0;
319 }
320 s->codec.cts = 0;
321
322 enable =
323 (~s->dac_power & (1 << 15)) && /* PWDNC */
324 (~s->dac_power & (1 << 10)); /* DAPWDN */
325 if (!enable || !s->codec.tx_rate)
326 return;
327
328 /* Force our own sampling rate even in slave DAC mode */
329 fmt.endianness = 0;
330 fmt.nchannels = 2;
331 fmt.freq = s->codec.tx_rate;
332 fmt.fmt = AUD_FMT_S16;
333
334 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
335 "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
336 if (s->dac_voice[0]) {
337 s->codec.cts = 1;
338 AUD_set_active_out(s->dac_voice[0], 1);
339 }
340 }
341
342 static uint16_t tsc2102_data_register_read(struct tsc210x_state_s *s, int reg)
343 {
344 switch (reg) {
345 case 0x00: /* X */
346 s->dav &= 0xfbff;
347 return TSC_CUT_RESOLUTION(X_TRANSFORM(s->x), s->precision) +
348 (s->noise & 3);
349
350 case 0x01: /* Y */
351 s->noise ++;
352 s->dav &= 0xfdff;
353 return TSC_CUT_RESOLUTION(Y_TRANSFORM(s->y), s->precision) ^
354 (s->noise & 3);
355
356 case 0x02: /* Z1 */
357 s->dav &= 0xfeff;
358 return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
359 (s->noise & 3);
360
361 case 0x03: /* Z2 */
362 s->dav &= 0xff7f;
363 return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
364 (s->noise & 3);
365
366 case 0x04: /* KPData */
367 return 0xffff;
368
369 case 0x05: /* BAT1 */
370 s->dav &= 0xffbf;
371 return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
372 (s->noise & 6);
373
374 case 0x06: /* BAT2 */
375 s->dav &= 0xffdf;
376 return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
377
378 case 0x07: /* AUX1 */
379 s->dav &= 0xffef;
380 return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
381
382 case 0x08: /* AUX2 */
383 s->dav &= 0xfff7;
384 return 0xffff;
385
386 case 0x09: /* TEMP1 */
387 s->dav &= 0xfffb;
388 return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
389 (s->noise & 5);
390
391 case 0x0a: /* TEMP2 */
392 s->dav &= 0xfffd;
393 return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
394 (s->noise & 3);
395
396 case 0x0b: /* DAC */
397 s->dav &= 0xfffe;
398 return 0xffff;
399
400 default:
401 #ifdef TSC_VERBOSE
402 fprintf(stderr, "tsc2102_data_register_read: "
403 "no such register: 0x%02x\n", reg);
404 #endif
405 return 0xffff;
406 }
407 }
408
409 static uint16_t tsc2102_control_register_read(
410 struct tsc210x_state_s *s, int reg)
411 {
412 switch (reg) {
413 case 0x00: /* TSC ADC */
414 return (s->pressure << 15) | ((!s->busy) << 14) |
415 (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
416
417 case 0x01: /* Status */
418 return (s->pin_func << 14) | ((!s->enabled) << 13) |
419 (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
420
421 case 0x03: /* Reference */
422 return s->ref;
423
424 case 0x04: /* Reset */
425 return 0xffff;
426
427 case 0x05: /* Configuration */
428 return s->timing;
429
430 default:
431 #ifdef TSC_VERBOSE
432 fprintf(stderr, "tsc2102_control_register_read: "
433 "no such register: 0x%02x\n", reg);
434 #endif
435 return 0xffff;
436 }
437 }
438
439 static uint16_t tsc2102_audio_register_read(struct tsc210x_state_s *s, int reg)
440 {
441 int l_ch, r_ch;
442 uint16_t val;
443
444 switch (reg) {
445 case 0x00: /* Audio Control 1 */
446 return s->audio_ctrl1;
447
448 case 0x01:
449 return 0xff00;
450
451 case 0x02: /* DAC Volume Control */
452 return s->volume;
453
454 case 0x03:
455 return 0x8b00;
456
457 case 0x04: /* Audio Control 2 */
458 l_ch = 1;
459 r_ch = 1;
460 if (s->softstep && !(s->dac_power & (1 << 10))) {
461 l_ch = (qemu_get_clock(vm_clock) >
462 s->volume_change + TSC_SOFTSTEP_DELAY);
463 r_ch = (qemu_get_clock(vm_clock) >
464 s->volume_change + TSC_SOFTSTEP_DELAY);
465 }
466
467 return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
468
469 case 0x05: /* Stereo DAC Power Control */
470 return 0x2aa0 | s->dac_power |
471 (((s->dac_power & (1 << 10)) &&
472 (qemu_get_clock(vm_clock) >
473 s->powerdown + TSC_POWEROFF_DELAY)) << 6);
474
475 case 0x06: /* Audio Control 3 */
476 val = s->audio_ctrl3 | 0x0001;
477 s->audio_ctrl3 &= 0xff3f;
478 return val;
479
480 case 0x07: /* LCH_BASS_BOOST_N0 */
481 case 0x08: /* LCH_BASS_BOOST_N1 */
482 case 0x09: /* LCH_BASS_BOOST_N2 */
483 case 0x0a: /* LCH_BASS_BOOST_N3 */
484 case 0x0b: /* LCH_BASS_BOOST_N4 */
485 case 0x0c: /* LCH_BASS_BOOST_N5 */
486 case 0x0d: /* LCH_BASS_BOOST_D1 */
487 case 0x0e: /* LCH_BASS_BOOST_D2 */
488 case 0x0f: /* LCH_BASS_BOOST_D4 */
489 case 0x10: /* LCH_BASS_BOOST_D5 */
490 case 0x11: /* RCH_BASS_BOOST_N0 */
491 case 0x12: /* RCH_BASS_BOOST_N1 */
492 case 0x13: /* RCH_BASS_BOOST_N2 */
493 case 0x14: /* RCH_BASS_BOOST_N3 */
494 case 0x15: /* RCH_BASS_BOOST_N4 */
495 case 0x16: /* RCH_BASS_BOOST_N5 */
496 case 0x17: /* RCH_BASS_BOOST_D1 */
497 case 0x18: /* RCH_BASS_BOOST_D2 */
498 case 0x19: /* RCH_BASS_BOOST_D4 */
499 case 0x1a: /* RCH_BASS_BOOST_D5 */
500 return s->filter_data[reg - 0x07];
501
502 case 0x1b: /* PLL Programmability 1 */
503 return s->pll[0];
504
505 case 0x1c: /* PLL Programmability 2 */
506 return s->pll[1];
507
508 case 0x1d: /* Audio Control 4 */
509 return (!s->softstep) << 14;
510
511 default:
512 #ifdef TSC_VERBOSE
513 fprintf(stderr, "tsc2102_audio_register_read: "
514 "no such register: 0x%02x\n", reg);
515 #endif
516 return 0xffff;
517 }
518 }
519
520 static void tsc2102_data_register_write(
521 struct tsc210x_state_s *s, int reg, uint16_t value)
522 {
523 switch (reg) {
524 case 0x00: /* X */
525 case 0x01: /* Y */
526 case 0x02: /* Z1 */
527 case 0x03: /* Z2 */
528 case 0x05: /* BAT1 */
529 case 0x06: /* BAT2 */
530 case 0x07: /* AUX1 */
531 case 0x08: /* AUX2 */
532 case 0x09: /* TEMP1 */
533 case 0x0a: /* TEMP2 */
534 return;
535
536 default:
537 #ifdef TSC_VERBOSE
538 fprintf(stderr, "tsc2102_data_register_write: "
539 "no such register: 0x%02x\n", reg);
540 #endif
541 }
542 }
543
544 static void tsc2102_control_register_write(
545 struct tsc210x_state_s *s, int reg, uint16_t value)
546 {
547 switch (reg) {
548 case 0x00: /* TSC ADC */
549 s->host_mode = value >> 15;
550 s->enabled = !(value & 0x4000);
551 if (s->busy && !s->enabled)
552 qemu_del_timer(s->timer);
553 s->busy &= s->enabled;
554 s->nextfunction = (value >> 10) & 0xf;
555 s->nextprecision = (value >> 8) & 3;
556 s->filter = value & 0xff;
557 return;
558
559 case 0x01: /* Status */
560 s->pin_func = value >> 14;
561 return;
562
563 case 0x03: /* Reference */
564 s->ref = value & 0x1f;
565 return;
566
567 case 0x04: /* Reset */
568 if (value == 0xbb00) {
569 if (s->busy)
570 qemu_del_timer(s->timer);
571 tsc210x_reset(s);
572 #ifdef TSC_VERBOSE
573 } else {
574 fprintf(stderr, "tsc2102_control_register_write: "
575 "wrong value written into RESET\n");
576 #endif
577 }
578 return;
579
580 case 0x05: /* Configuration */
581 s->timing = value & 0x3f;
582 #ifdef TSC_VERBOSE
583 if (value & ~0x3f)
584 fprintf(stderr, "tsc2102_control_register_write: "
585 "wrong value written into CONFIG\n");
586 #endif
587 return;
588
589 default:
590 #ifdef TSC_VERBOSE
591 fprintf(stderr, "tsc2102_control_register_write: "
592 "no such register: 0x%02x\n", reg);
593 #endif
594 }
595 }
596
597 static void tsc2102_audio_register_write(
598 struct tsc210x_state_s *s, int reg, uint16_t value)
599 {
600 switch (reg) {
601 case 0x00: /* Audio Control 1 */
602 s->audio_ctrl1 = value & 0x0f3f;
603 #ifdef TSC_VERBOSE
604 if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
605 fprintf(stderr, "tsc2102_audio_register_write: "
606 "wrong value written into Audio 1\n");
607 #endif
608 tsc2102_audio_rate_update(s);
609 if (s->audio)
610 tsc2102_audio_output_update(s);
611 return;
612
613 case 0x01:
614 #ifdef TSC_VERBOSE
615 if (value != 0xff00)
616 fprintf(stderr, "tsc2102_audio_register_write: "
617 "wrong value written into reg 0x01\n");
618 #endif
619 return;
620
621 case 0x02: /* DAC Volume Control */
622 s->volume = value;
623 s->volume_change = qemu_get_clock(vm_clock);
624 return;
625
626 case 0x03:
627 #ifdef TSC_VERBOSE
628 if (value != 0x8b00)
629 fprintf(stderr, "tsc2102_audio_register_write: "
630 "wrong value written into reg 0x03\n");
631 #endif
632 return;
633
634 case 0x04: /* Audio Control 2 */
635 s->audio_ctrl2 = value & 0xf7f2;
636 #ifdef TSC_VERBOSE
637 if (value & ~0xf7fd)
638 fprintf(stderr, "tsc2102_audio_register_write: "
639 "wrong value written into Audio 2\n");
640 #endif
641 return;
642
643 case 0x05: /* Stereo DAC Power Control */
644 if ((value & ~s->dac_power) & (1 << 10))
645 s->powerdown = qemu_get_clock(vm_clock);
646
647 s->dac_power = value & 0x9543;
648 #ifdef TSC_VERBOSE
649 if ((value & ~0x9543) != 0x2aa0)
650 fprintf(stderr, "tsc2102_audio_register_write: "
651 "wrong value written into Power\n");
652 #endif
653 tsc2102_audio_rate_update(s);
654 if (s->audio)
655 tsc2102_audio_output_update(s);
656 return;
657
658 case 0x06: /* Audio Control 3 */
659 s->audio_ctrl3 &= 0x00c0;
660 s->audio_ctrl3 |= value & 0xf800;
661 #ifdef TSC_VERBOSE
662 if (value & ~0xf8c7)
663 fprintf(stderr, "tsc2102_audio_register_write: "
664 "wrong value written into Audio 3\n");
665 #endif
666 if (s->audio)
667 tsc2102_audio_output_update(s);
668 return;
669
670 case 0x07: /* LCH_BASS_BOOST_N0 */
671 case 0x08: /* LCH_BASS_BOOST_N1 */
672 case 0x09: /* LCH_BASS_BOOST_N2 */
673 case 0x0a: /* LCH_BASS_BOOST_N3 */
674 case 0x0b: /* LCH_BASS_BOOST_N4 */
675 case 0x0c: /* LCH_BASS_BOOST_N5 */
676 case 0x0d: /* LCH_BASS_BOOST_D1 */
677 case 0x0e: /* LCH_BASS_BOOST_D2 */
678 case 0x0f: /* LCH_BASS_BOOST_D4 */
679 case 0x10: /* LCH_BASS_BOOST_D5 */
680 case 0x11: /* RCH_BASS_BOOST_N0 */
681 case 0x12: /* RCH_BASS_BOOST_N1 */
682 case 0x13: /* RCH_BASS_BOOST_N2 */
683 case 0x14: /* RCH_BASS_BOOST_N3 */
684 case 0x15: /* RCH_BASS_BOOST_N4 */
685 case 0x16: /* RCH_BASS_BOOST_N5 */
686 case 0x17: /* RCH_BASS_BOOST_D1 */
687 case 0x18: /* RCH_BASS_BOOST_D2 */
688 case 0x19: /* RCH_BASS_BOOST_D4 */
689 case 0x1a: /* RCH_BASS_BOOST_D5 */
690 s->filter_data[reg - 0x07] = value;
691 return;
692
693 case 0x1b: /* PLL Programmability 1 */
694 s->pll[0] = value & 0xfffc;
695 #ifdef TSC_VERBOSE
696 if (value & ~0xfffc)
697 fprintf(stderr, "tsc2102_audio_register_write: "
698 "wrong value written into PLL 1\n");
699 #endif
700 return;
701
702 case 0x1c: /* PLL Programmability 2 */
703 s->pll[1] = value & 0xfffc;
704 #ifdef TSC_VERBOSE
705 if (value & ~0xfffc)
706 fprintf(stderr, "tsc2102_audio_register_write: "
707 "wrong value written into PLL 2\n");
708 #endif
709 return;
710
711 case 0x1d: /* Audio Control 4 */
712 s->softstep = !(value & 0x4000);
713 #ifdef TSC_VERBOSE
714 if (value & ~0x4000)
715 fprintf(stderr, "tsc2102_audio_register_write: "
716 "wrong value written into Audio 4\n");
717 #endif
718 return;
719
720 default:
721 #ifdef TSC_VERBOSE
722 fprintf(stderr, "tsc2102_audio_register_write: "
723 "no such register: 0x%02x\n", reg);
724 #endif
725 }
726 }
727
728 /* This handles most of the chip logic. */
729 static void tsc210x_pin_update(struct tsc210x_state_s *s)
730 {
731 int64_t expires;
732 int pin_state;
733
734 switch (s->pin_func) {
735 case 0:
736 pin_state = s->pressure;
737 break;
738 case 1:
739 pin_state = !!s->dav;
740 break;
741 case 2:
742 default:
743 pin_state = s->pressure && !s->dav;
744 }
745
746 if (!s->enabled)
747 pin_state = 0;
748
749 if (pin_state != s->irq) {
750 s->irq = pin_state;
751 qemu_set_irq(s->pint, !s->irq);
752 }
753
754 switch (s->nextfunction) {
755 case TSC_MODE_XY_SCAN:
756 case TSC_MODE_XYZ_SCAN:
757 if (!s->pressure)
758 return;
759 break;
760
761 case TSC_MODE_X:
762 case TSC_MODE_Y:
763 case TSC_MODE_Z:
764 if (!s->pressure)
765 return;
766 /* Fall through */
767 case TSC_MODE_BAT1:
768 case TSC_MODE_BAT2:
769 case TSC_MODE_AUX:
770 case TSC_MODE_TEMP1:
771 case TSC_MODE_TEMP2:
772 if (s->dav)
773 s->enabled = 0;
774 break;
775
776 case TSC_MODE_AUX_SCAN:
777 case TSC_MODE_PORT_SCAN:
778 break;
779
780 case TSC_MODE_NO_SCAN:
781 case TSC_MODE_XX_DRV:
782 case TSC_MODE_YY_DRV:
783 case TSC_MODE_YX_DRV:
784 default:
785 return;
786 }
787
788 if (!s->enabled || s->busy)
789 return;
790
791 s->busy = 1;
792 s->precision = s->nextprecision;
793 s->function = s->nextfunction;
794 expires = qemu_get_clock(vm_clock) + (ticks_per_sec >> 10);
795 qemu_mod_timer(s->timer, expires);
796 }
797
798 static uint16_t tsc210x_read(struct tsc210x_state_s *s)
799 {
800 uint16_t ret = 0x0000;
801
802 if (!s->command)
803 fprintf(stderr, "tsc210x_read: SPI underrun!\n");
804
805 switch (s->page) {
806 case TSC_DATA_REGISTERS_PAGE:
807 ret = tsc2102_data_register_read(s, s->offset);
808 break;
809 case TSC_CONTROL_REGISTERS_PAGE:
810 ret = tsc2102_control_register_read(s, s->offset);
811 break;
812 case TSC_AUDIO_REGISTERS_PAGE:
813 ret = tsc2102_audio_register_read(s, s->offset);
814 break;
815 default:
816 cpu_abort(cpu_single_env, "tsc210x_read: wrong memory page\n");
817 }
818
819 tsc210x_pin_update(s);
820
821 /* Allow sequential reads. */
822 s->offset ++;
823 s->state = 0;
824 return ret;
825 }
826
827 static void tsc210x_write(struct tsc210x_state_s *s, uint16_t value)
828 {
829 /*
830 * This is a two-state state machine for reading
831 * command and data every second time.
832 */
833 if (!s->state) {
834 s->command = value >> 15;
835 s->page = (value >> 11) & 0x0f;
836 s->offset = (value >> 5) & 0x3f;
837 s->state = 1;
838 } else {
839 if (s->command)
840 fprintf(stderr, "tsc210x_write: SPI overrun!\n");
841 else
842 switch (s->page) {
843 case TSC_DATA_REGISTERS_PAGE:
844 tsc2102_data_register_write(s, s->offset, value);
845 break;
846 case TSC_CONTROL_REGISTERS_PAGE:
847 tsc2102_control_register_write(s, s->offset, value);
848 break;
849 case TSC_AUDIO_REGISTERS_PAGE:
850 tsc2102_audio_register_write(s, s->offset, value);
851 break;
852 default:
853 cpu_abort(cpu_single_env,
854 "tsc210x_write: wrong memory page\n");
855 }
856
857 tsc210x_pin_update(s);
858 s->state = 0;
859 }
860 }
861
862 static void tsc210x_timer_tick(void *opaque)
863 {
864 struct tsc210x_state_s *s = opaque;
865
866 /* Timer ticked -- a set of conversions has been finished. */
867
868 if (!s->busy)
869 return;
870
871 s->busy = 0;
872 s->dav |= mode_regs[s->function];
873 tsc210x_pin_update(s);
874 }
875
876 static void tsc210x_touchscreen_event(void *opaque,
877 int x, int y, int z, int buttons_state)
878 {
879 struct tsc210x_state_s *s = opaque;
880 int p = s->pressure;
881
882 if (buttons_state) {
883 s->x = x;
884 s->y = y;
885 }
886 s->pressure = !!buttons_state;
887
888 /*
889 * Note: We would get better responsiveness in the guest by
890 * signaling TS events immediately, but for now we simulate
891 * the first conversion delay for sake of correctness.
892 */
893 if (p != s->pressure)
894 tsc210x_pin_update(s);
895 }
896
897 static void tsc210x_i2s_swallow(struct tsc210x_state_s *s)
898 {
899 if (s->dac_voice[0])
900 tsc210x_out_flush(s, s->codec.out.len);
901 else
902 s->codec.out.len = 0;
903 }
904
905 static void tsc210x_i2s_set_rate(struct tsc210x_state_s *s, int in, int out)
906 {
907 s->i2s_tx_rate = out;
908 s->i2s_rx_rate = in;
909 }
910
911 static void tsc210x_save(QEMUFile *f, void *opaque)
912 {
913 struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque;
914 int64_t now = qemu_get_clock(vm_clock);
915 int i;
916
917 qemu_put_be16(f, s->x);
918 qemu_put_be16(f, s->y);
919 qemu_put_byte(f, s->pressure);
920
921 qemu_put_byte(f, s->state);
922 qemu_put_byte(f, s->page);
923 qemu_put_byte(f, s->offset);
924 qemu_put_byte(f, s->command);
925
926 qemu_put_byte(f, s->irq);
927 qemu_put_be16s(f, &s->dav);
928
929 qemu_put_timer(f, s->timer);
930 qemu_put_byte(f, s->enabled);
931 qemu_put_byte(f, s->host_mode);
932 qemu_put_byte(f, s->function);
933 qemu_put_byte(f, s->nextfunction);
934 qemu_put_byte(f, s->precision);
935 qemu_put_byte(f, s->nextprecision);
936 qemu_put_byte(f, s->filter);
937 qemu_put_byte(f, s->pin_func);
938 qemu_put_byte(f, s->ref);
939 qemu_put_byte(f, s->timing);
940 qemu_put_be32(f, s->noise);
941
942 qemu_put_be16s(f, &s->audio_ctrl1);
943 qemu_put_be16s(f, &s->audio_ctrl2);
944 qemu_put_be16s(f, &s->audio_ctrl3);
945 qemu_put_be16s(f, &s->pll[0]);
946 qemu_put_be16s(f, &s->pll[1]);
947 qemu_put_be16s(f, &s->volume);
948 qemu_put_be64(f, (uint64_t) (s->volume_change - now));
949 qemu_put_be64(f, (uint64_t) (s->powerdown - now));
950 qemu_put_byte(f, s->softstep);
951 qemu_put_be16s(f, &s->dac_power);
952
953 for (i = 0; i < 0x14; i ++)
954 qemu_put_be16s(f, &s->filter_data[i]);
955 }
956
957 static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
958 {
959 struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque;
960 int64_t now = qemu_get_clock(vm_clock);
961 int i;
962
963 s->x = qemu_get_be16(f);
964 s->y = qemu_get_be16(f);
965 s->pressure = qemu_get_byte(f);
966
967 s->state = qemu_get_byte(f);
968 s->page = qemu_get_byte(f);
969 s->offset = qemu_get_byte(f);
970 s->command = qemu_get_byte(f);
971
972 s->irq = qemu_get_byte(f);
973 qemu_get_be16s(f, &s->dav);
974
975 qemu_get_timer(f, s->timer);
976 s->enabled = qemu_get_byte(f);
977 s->host_mode = qemu_get_byte(f);
978 s->function = qemu_get_byte(f);
979 s->nextfunction = qemu_get_byte(f);
980 s->precision = qemu_get_byte(f);
981 s->nextprecision = qemu_get_byte(f);
982 s->filter = qemu_get_byte(f);
983 s->pin_func = qemu_get_byte(f);
984 s->ref = qemu_get_byte(f);
985 s->timing = qemu_get_byte(f);
986 s->noise = qemu_get_be32(f);
987
988 qemu_get_be16s(f, &s->audio_ctrl1);
989 qemu_get_be16s(f, &s->audio_ctrl2);
990 qemu_get_be16s(f, &s->audio_ctrl3);
991 qemu_get_be16s(f, &s->pll[0]);
992 qemu_get_be16s(f, &s->pll[1]);
993 qemu_get_be16s(f, &s->volume);
994 s->volume_change = (int64_t) qemu_get_be64(f) + now;
995 s->powerdown = (int64_t) qemu_get_be64(f) + now;
996 s->softstep = qemu_get_byte(f);
997 qemu_get_be16s(f, &s->dac_power);
998
999 for (i = 0; i < 0x14; i ++)
1000 qemu_get_be16s(f, &s->filter_data[i]);
1001
1002 s->busy = qemu_timer_pending(s->timer);
1003 qemu_set_irq(s->pint, !s->irq);
1004
1005 return 0;
1006 }
1007
1008 static int tsc2102_iid = 0;
1009
1010 struct uwire_slave_s *tsc2102_init(qemu_irq pint, AudioState *audio)
1011 {
1012 struct tsc210x_state_s *s;
1013
1014 s = (struct tsc210x_state_s *)
1015 qemu_mallocz(sizeof(struct tsc210x_state_s));
1016 memset(s, 0, sizeof(struct tsc210x_state_s));
1017 s->x = 160;
1018 s->y = 160;
1019 s->pressure = 0;
1020 s->precision = s->nextprecision = 0;
1021 s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
1022 s->pint = pint;
1023 s->name = "tsc2102";
1024 s->audio = audio;
1025
1026 s->chip.opaque = s;
1027 s->chip.send = (void *) tsc210x_write;
1028 s->chip.receive = (void *) tsc210x_read;
1029
1030 s->codec.opaque = s;
1031 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1032 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1033 s->codec.in.fifo = s->in_fifo;
1034 s->codec.out.fifo = s->out_fifo;
1035
1036 tsc210x_reset(s);
1037
1038 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1039 "QEMU TSC2102-driven Touchscreen");
1040
1041 if (s->audio)
1042 AUD_register_card(s->audio, s->name, &s->card);
1043
1044 qemu_register_reset((void *) tsc210x_reset, s);
1045 register_savevm(s->name, tsc2102_iid ++, 0,
1046 tsc210x_save, tsc210x_load, s);
1047
1048 return &s->chip;
1049 }
1050
1051 struct i2s_codec_s *tsc210x_codec(struct uwire_slave_s *chip)
1052 {
1053 struct tsc210x_state_s *s = (struct tsc210x_state_s *) chip->opaque;
1054
1055 return &s->codec;
1056 }
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