qemu/qemu-kvm-powerpc.c

   1 /*
   2  * qemu-kvm-power.c
   3  *
   4  * Add KVM PowerPC specific calls for qemu.
   5  *
   6  * Copyright 2007 IBM Corporation.
   7  * Added by & Authors:
   8  *      Jerone Young <jyoung5@us.ibm.com>
   9  *      Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
  10  *
  11  * This work is licensed under the GNU GPL licence version 2 or later.
  12  *
  13  */
  14
  15 #include "config.h"
  16 #include "config-host.h"
  17
  18 #include <string.h>
  19 #include "hw/hw.h"
  20 #include "sysemu.h"
  21 #include "cpu.h"
  22 #include "helper_regs.h"
  23
  24 #include "qemu-kvm.h"
  25 #include <libkvm.h>
  26 #include <pthread.h>
  27 #include <sys/utsname.h>
  28
  29 extern kvm_context_t kvm_context;
  30
  31 void cpu_reset(CPUState *env)
  32 {
  33         cpu_ppc_reset(env);
  34 }
  35
  36
  37 int kvm_arch_qemu_create_context(void)
  38 {
  39         return 0;
  40 }
  41
  42 void kvm_arch_load_regs(CPUState *env)
  43 {
  44     struct kvm_regs regs;
  45     int rc,i;
  46
  47     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  48     if (rc == -1)
  49         perror("kvm_get_regs FAILED");
  50
  51     /* cr is untouched in qemu and not existant in CPUState fr ppr */
  52     /* hflags is a morphed to MSR on ppc, no need to sync that down to kvm */
  53
  54     regs.pc = env->nip;
  55
  56     regs.ctr = env->ctr;
  57     regs.lr  = env->lr;
  58     regs.xer = ppc_load_xer(env);
  59     regs.msr = env->msr;
  60
  61     regs.srr0 = env->spr[SPR_SRR0];
  62     regs.srr1 = env->spr[SPR_SRR1];
  63
  64     regs.sprg0 = env->spr[SPR_SPRG0];
  65     regs.sprg1 = env->spr[SPR_SPRG1];
  66     regs.sprg2 = env->spr[SPR_SPRG2];
  67     regs.sprg3 = env->spr[SPR_SPRG3];
  68     regs.sprg4 = env->spr[SPR_SPRG4];
  69     regs.sprg5 = env->spr[SPR_SPRG5];
  70     regs.sprg6 = env->spr[SPR_SPRG6];
  71     regs.sprg7 = env->spr[SPR_SPRG7];
  72
  73     for (i = 0;i < 32; i++){
  74         regs.gpr[i] = env->gpr[i];
  75         regs.fpr[i] = env->fpr[i];
  76     }
  77
  78     rc = kvm_set_regs(kvm_context, env->cpu_index, &regs);
  79     if (rc == -1)
  80         perror("kvm_set_regs FAILED");
  81 }
  82
  83
  84 void kvm_arch_save_regs(CPUState *env)
  85 {
  86     struct kvm_regs regs;
  87     uint32_t i, rc;
  88
  89     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  90     if (rc == -1)
  91         perror("kvm_get_regs FAILED");
  92
  93     env->ctr =regs.ctr;
  94     env->lr = regs.lr;
  95     ppc_store_xer(env,regs.xer);
  96     env->msr = regs.msr;
  97     /* calculate hflags based on the current msr using the ppc qemu helper */
  98     hreg_compute_hflags(env);
  99
 100     env->nip = regs.pc;
 101
 102     env->spr[SPR_SRR0] = regs.srr0;
 103     env->spr[SPR_SRR1] = regs.srr1;
 104
 105     env->spr[SPR_SPRG0] = regs.sprg0;
 106     env->spr[SPR_SPRG1] = regs.sprg1;
 107     env->spr[SPR_SPRG2] = regs.sprg2;
 108     env->spr[SPR_SPRG3] = regs.sprg3;
 109     env->spr[SPR_SPRG4] = regs.sprg4;
 110     env->spr[SPR_SPRG5] = regs.sprg5;
 111     env->spr[SPR_SPRG6] = regs.sprg6;
 112     env->spr[SPR_SPRG7] = regs.sprg7;
 113
 114     for (i = 0;i < 32; i++){
 115         env->gpr[i] = regs.gpr[i];
 116         env->fpr[i] = regs.fpr[i];
 117     }
 118
 119 }
 120
 121 int kvm_arch_qemu_init_env(CPUState *cenv)
 122 {
 123     return 0;
 124 }
 125
 126 int kvm_arch_halt(void *opaque, int vcpu)
 127 {
 128     CPUState *env = cpu_single_env;
 129
 130     if (!(env->interrupt_request & CPU_INTERRUPT_HARD)
 131         && (msr_ee))
 132     {
 133             env->halted = 1;
 134             env->exception_index = EXCP_HLT;
 135     }
 136     return 1;
 137 }
 138
 139 void kvm_arch_pre_kvm_run(void *opaque, int vcpu)
 140 {
 141         return;
 142 }
 143
 144 void kvm_arch_post_kvm_run(void *opaque, int vcpu)
 145 {
 146     CPUState *env = qemu_kvm_cpu_env(vcpu);
 147     cpu_single_env = env;
 148     env->ready_for_interrupt_injection = \
 149         kvm_is_ready_for_interrupt_injection(kvm_context, vcpu);
 150 }
 151
 152 int kvm_arch_has_work(CPUState *env)
 153 {
 154     if ((env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXIT)) &&
 155         (msr_ee))
 156         return 1;
 157     return 0;
 158 }
 159
 160 int kvm_arch_try_push_interrupts(void *opaque)
 161 {
 162     CPUState *env = cpu_single_env;
 163     int r;
 164     unsigned irq;
 165
 166     if (env->ready_for_interrupt_injection &&
 167         (env->interrupt_request & CPU_INTERRUPT_HARD))
 168        {
 169             env->interrupt_request &= ~CPU_INTERRUPT_HARD;
 170
 171             /* For now KVM disregards the 'irq' argument. However, in the
 172              * future KVM could cache it in-kernel to avoid a heavyweight exit
 173              * when reading the UIC.
 174              */
 175             irq = -1U;
 176
 177             r = kvm_inject_irq(kvm_context, env->cpu_index, irq);
 178             if (r < 0)
 179                 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
 180     }
 181
 182     return (env->interrupt_request & CPU_INTERRUPT_HARD) != 0;
 183 }
 184
 185 void kvm_arch_update_regs_for_sipi(CPUState *env)
 186 {
 187     printf("%s: no kvm-powerpc multi processor support yet!\n", __func__);
 188 }
 189
 190 /* map dcr access to existing qemu dcr emulation */
 191 int handle_powerpc_dcr_read(int vcpu, uint32_t dcrn, uint32_t *data)
 192 {
 193     CPUState *env = cpu_single_env;
 194     ppc_dcr_read(env->dcr_env, dcrn, data);
 195     return 0; /* XXX ignore failed DCR ops */
 196 }
 197
 198 int handle_powerpc_dcr_write(int vcpu, uint32_t dcrn, uint32_t data)
 199 {
 200     CPUState *env = cpu_single_env;
 201     ppc_dcr_write(env->dcr_env, dcrn, data);
 202     return 0; /* XXX ignore failed DCR ops */
 203 }