qemu/gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "qemu-common.h"
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #include "qemu-kvm.h"
  37 #endif
  38
  39 #include "qemu_socket.h"
  40 #ifdef _WIN32
  41 /* XXX: these constants may be independent of the host ones even for Unix */
  42 #ifndef SIGTRAP
  43 #define SIGTRAP 5
  44 #endif
  45 #ifndef SIGINT
  46 #define SIGINT 2
  47 #endif
  48 #else
  49 #include <signal.h>
  50 #endif
  51
  52 //#define DEBUG_GDB
  53
  54 enum RSState {
  55     RS_IDLE,
  56     RS_GETLINE,
  57     RS_CHKSUM1,
  58     RS_CHKSUM2,
  59     RS_SYSCALL,
  60 };
  61 typedef struct GDBState {
  62     CPUState *env; /* current CPU */
  63     enum RSState state; /* parsing state */
  64     char line_buf[4096];
  65     int line_buf_index;
  66     int line_csum;
  67     uint8_t last_packet[4100];
  68     int last_packet_len;
  69 #ifdef CONFIG_USER_ONLY
  70     int fd;
  71     int running_state;
  72 #else
  73     CharDriverState *chr;
  74 #endif
  75 } GDBState;
  76
  77 #ifdef CONFIG_USER_ONLY
  78 /* XXX: This is not thread safe.  Do we care?  */
  79 static int gdbserver_fd = -1;
  80
  81 /* XXX: remove this hack.  */
  82 static GDBState gdbserver_state;
  83
  84 static int get_char(GDBState *s)
  85 {
  86     uint8_t ch;
  87     int ret;
  88
  89     for(;;) {
  90         ret = recv(s->fd, &ch, 1, 0);
  91         if (ret < 0) {
  92             if (errno != EINTR && errno != EAGAIN)
  93                 return -1;
  94         } else if (ret == 0) {
  95             return -1;
  96         } else {
  97             break;
  98         }
  99     }
 100     return ch;
 101 }
 102 #endif
 103
 104 /* GDB stub state for use by semihosting syscalls.  */
 105 static GDBState *gdb_syscall_state;
 106 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 107
 108 enum {
 109     GDB_SYS_UNKNOWN,
 110     GDB_SYS_ENABLED,
 111     GDB_SYS_DISABLED,
 112 } gdb_syscall_mode;
 113
 114 /* If gdb is connected when the first semihosting syscall occurs then use
 115    remote gdb syscalls.  Otherwise use native file IO.  */
 116 int use_gdb_syscalls(void)
 117 {
 118     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 119         gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
 120                                               : GDB_SYS_DISABLED);
 121     }
 122     return gdb_syscall_mode == GDB_SYS_ENABLED;
 123 }
 124
 125 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 126 {
 127 #ifdef CONFIG_USER_ONLY
 128     int ret;
 129
 130     while (len > 0) {
 131         ret = send(s->fd, buf, len, 0);
 132         if (ret < 0) {
 133             if (errno != EINTR && errno != EAGAIN)
 134                 return;
 135         } else {
 136             buf += ret;
 137             len -= ret;
 138         }
 139     }
 140 #else
 141     qemu_chr_write(s->chr, buf, len);
 142 #endif
 143 }
 144
 145 static inline int fromhex(int v)
 146 {
 147     if (v >= '0' && v <= '9')
 148         return v - '0';
 149     else if (v >= 'A' && v <= 'F')
 150         return v - 'A' + 10;
 151     else if (v >= 'a' && v <= 'f')
 152         return v - 'a' + 10;
 153     else
 154         return 0;
 155 }
 156
 157 static inline int tohex(int v)
 158 {
 159     if (v < 10)
 160         return v + '0';
 161     else
 162         return v - 10 + 'a';
 163 }
 164
 165 static void memtohex(char *buf, const uint8_t *mem, int len)
 166 {
 167     int i, c;
 168     char *q;
 169     q = buf;
 170     for(i = 0; i < len; i++) {
 171         c = mem[i];
 172         *q++ = tohex(c >> 4);
 173         *q++ = tohex(c & 0xf);
 174     }
 175     *q = '\0';
 176 }
 177
 178 static void hextomem(uint8_t *mem, const char *buf, int len)
 179 {
 180     int i;
 181
 182     for(i = 0; i < len; i++) {
 183         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 184         buf += 2;
 185     }
 186 }
 187
 188 /* return -1 if error, 0 if OK */
 189 static int put_packet(GDBState *s, char *buf)
 190 {
 191     int len, csum, i;
 192     uint8_t *p;
 193
 194 #ifdef DEBUG_GDB
 195     printf("reply='%s'\n", buf);
 196 #endif
 197
 198     for(;;) {
 199         p = s->last_packet;
 200         *(p++) = '$';
 201         len = strlen(buf);
 202         memcpy(p, buf, len);
 203         p += len;
 204         csum = 0;
 205         for(i = 0; i < len; i++) {
 206             csum += buf[i];
 207         }
 208         *(p++) = '#';
 209         *(p++) = tohex((csum >> 4) & 0xf);
 210         *(p++) = tohex((csum) & 0xf);
 211
 212         s->last_packet_len = p - s->last_packet;
 213         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 214
 215 #ifdef CONFIG_USER_ONLY
 216         i = get_char(s);
 217         if (i < 0)
 218             return -1;
 219         if (i == '+')
 220             break;
 221 #else
 222         break;
 223 #endif
 224     }
 225     return 0;
 226 }
 227
 228 #if defined(TARGET_I386)
 229
 230 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 231 {
 232     int i, fpus;
 233     uint32_t *registers = (uint32_t *)mem_buf;
 234
 235 #ifdef TARGET_X86_64
 236     /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
 237     uint64_t *registers64 = (uint64_t *)mem_buf;
 238
 239     if (env->hflags & HF_CS64_MASK) {
 240         registers64[0] = tswap64(env->regs[R_EAX]);
 241         registers64[1] = tswap64(env->regs[R_EBX]);
 242         registers64[2] = tswap64(env->regs[R_ECX]);
 243         registers64[3] = tswap64(env->regs[R_EDX]);
 244         registers64[4] = tswap64(env->regs[R_ESI]);
 245         registers64[5] = tswap64(env->regs[R_EDI]);
 246         registers64[6] = tswap64(env->regs[R_EBP]);
 247         registers64[7] = tswap64(env->regs[R_ESP]);
 248         for(i = 8; i < 16; i++) {
 249             registers64[i] = tswap64(env->regs[i]);
 250         }
 251         registers64[16] = tswap64(env->eip);
 252
 253         registers = (uint32_t *)&registers64[17];
 254         registers[0] = tswap32(env->eflags);
 255         registers[1] = tswap32(env->segs[R_CS].selector);
 256         registers[2] = tswap32(env->segs[R_SS].selector);
 257         registers[3] = tswap32(env->segs[R_DS].selector);
 258         registers[4] = tswap32(env->segs[R_ES].selector);
 259         registers[5] = tswap32(env->segs[R_FS].selector);
 260         registers[6] = tswap32(env->segs[R_GS].selector);
 261         /* XXX: convert floats */
 262         for(i = 0; i < 8; i++) {
 263             memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
 264         }
 265         registers[27] = tswap32(env->fpuc); /* fctrl */
 266         fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 267         registers[28] = tswap32(fpus); /* fstat */
 268         registers[29] = 0; /* ftag */
 269         registers[30] = 0; /* fiseg */
 270         registers[31] = 0; /* fioff */
 271         registers[32] = 0; /* foseg */
 272         registers[33] = 0; /* fooff */
 273         registers[34] = 0; /* fop */
 274         for(i = 0; i < 16; i++) {
 275             memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
 276         }
 277         registers[99] = tswap32(env->mxcsr);
 278
 279         return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
 280     }
 281 #endif
 282
 283     for(i = 0; i < 8; i++) {
 284         registers[i] = env->regs[i];
 285     }
 286     registers[8] = env->eip;
 287     registers[9] = env->eflags;
 288     registers[10] = env->segs[R_CS].selector;
 289     registers[11] = env->segs[R_SS].selector;
 290     registers[12] = env->segs[R_DS].selector;
 291     registers[13] = env->segs[R_ES].selector;
 292     registers[14] = env->segs[R_FS].selector;
 293     registers[15] = env->segs[R_GS].selector;
 294     /* XXX: convert floats */
 295     for(i = 0; i < 8; i++) {
 296         memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
 297     }
 298     registers[36] = env->fpuc;
 299     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 300     registers[37] = fpus;
 301     registers[38] = 0; /* XXX: convert tags */
 302     registers[39] = 0; /* fiseg */
 303     registers[40] = 0; /* fioff */
 304     registers[41] = 0; /* foseg */
 305     registers[42] = 0; /* fooff */
 306     registers[43] = 0; /* fop */
 307
 308     for(i = 0; i < 16; i++)
 309         tswapls(&registers[i]);
 310     for(i = 36; i < 44; i++)
 311         tswapls(&registers[i]);
 312     return 44 * 4;
 313 }
 314
 315 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 316 {
 317     uint32_t *registers = (uint32_t *)mem_buf;
 318     int i;
 319
 320     for(i = 0; i < 8; i++) {
 321         env->regs[i] = tswapl(registers[i]);
 322     }
 323     env->eip = tswapl(registers[8]);
 324     env->eflags = tswapl(registers[9]);
 325 #if defined(CONFIG_USER_ONLY)
 326 #define LOAD_SEG(index, sreg)\
 327             if (tswapl(registers[index]) != env->segs[sreg].selector)\
 328                 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
 329             LOAD_SEG(10, R_CS);
 330             LOAD_SEG(11, R_SS);
 331             LOAD_SEG(12, R_DS);
 332             LOAD_SEG(13, R_ES);
 333             LOAD_SEG(14, R_FS);
 334             LOAD_SEG(15, R_GS);
 335 #endif
 336 }
 337
 338 #elif defined (TARGET_PPC)
 339 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 340 {
 341     uint32_t *registers = (uint32_t *)mem_buf, tmp;
 342     int i;
 343
 344     /* fill in gprs */
 345     for(i = 0; i < 32; i++) {
 346         registers[i] = tswapl(env->gpr[i]);
 347     }
 348     /* fill in fprs */
 349     for (i = 0; i < 32; i++) {
 350         registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 351         registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
 352     }
 353     /* nip, msr, ccr, lnk, ctr, xer, mq */
 354     registers[96] = tswapl(env->nip);
 355     registers[97] = tswapl(env->msr);
 356     tmp = 0;
 357     for (i = 0; i < 8; i++)
 358         tmp |= env->crf[i] << (32 - ((i + 1) * 4));
 359     registers[98] = tswapl(tmp);
 360     registers[99] = tswapl(env->lr);
 361     registers[100] = tswapl(env->ctr);
 362     registers[101] = tswapl(ppc_load_xer(env));
 363     registers[102] = 0;
 364
 365     return 103 * 4;
 366 }
 367
 368 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 369 {
 370     uint32_t *registers = (uint32_t *)mem_buf;
 371     int i;
 372
 373     /* fill in gprs */
 374     for (i = 0; i < 32; i++) {
 375         env->gpr[i] = tswapl(registers[i]);
 376     }
 377     /* fill in fprs */
 378     for (i = 0; i < 32; i++) {
 379         *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
 380         *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
 381     }
 382     /* nip, msr, ccr, lnk, ctr, xer, mq */
 383     env->nip = tswapl(registers[96]);
 384     ppc_store_msr(env, tswapl(registers[97]));
 385     registers[98] = tswapl(registers[98]);
 386     for (i = 0; i < 8; i++)
 387         env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
 388     env->lr = tswapl(registers[99]);
 389     env->ctr = tswapl(registers[100]);
 390     ppc_store_xer(env, tswapl(registers[101]));
 391 }
 392 #elif defined (TARGET_SPARC)
 393 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 394 {
 395     target_ulong *registers = (target_ulong *)mem_buf;
 396     int i;
 397
 398     /* fill in g0..g7 */
 399     for(i = 0; i < 8; i++) {
 400         registers[i] = tswapl(env->gregs[i]);
 401     }
 402     /* fill in register window */
 403     for(i = 0; i < 24; i++) {
 404         registers[i + 8] = tswapl(env->regwptr[i]);
 405     }
 406 #ifndef TARGET_SPARC64
 407     /* fill in fprs */
 408     for (i = 0; i < 32; i++) {
 409         registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 410     }
 411     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 412     registers[64] = tswapl(env->y);
 413     {
 414         target_ulong tmp;
 415
 416         tmp = GET_PSR(env);
 417         registers[65] = tswapl(tmp);
 418     }
 419     registers[66] = tswapl(env->wim);
 420     registers[67] = tswapl(env->tbr);
 421     registers[68] = tswapl(env->pc);
 422     registers[69] = tswapl(env->npc);
 423     registers[70] = tswapl(env->fsr);
 424     registers[71] = 0; /* csr */
 425     registers[72] = 0;
 426     return 73 * sizeof(target_ulong);
 427 #else
 428     /* fill in fprs */
 429     for (i = 0; i < 64; i += 2) {
 430         uint64_t tmp;
 431
 432         tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
 433         tmp |= *(uint32_t *)&env->fpr[i + 1];
 434         registers[i / 2 + 32] = tswap64(tmp);
 435     }
 436     registers[64] = tswapl(env->pc);
 437     registers[65] = tswapl(env->npc);
 438     registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
 439                            ((env->asi & 0xff) << 24) |
 440                            ((env->pstate & 0xfff) << 8) |
 441                            GET_CWP64(env));
 442     registers[67] = tswapl(env->fsr);
 443     registers[68] = tswapl(env->fprs);
 444     registers[69] = tswapl(env->y);
 445     return 70 * sizeof(target_ulong);
 446 #endif
 447 }
 448
 449 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 450 {
 451     target_ulong *registers = (target_ulong *)mem_buf;
 452     int i;
 453
 454     /* fill in g0..g7 */
 455     for(i = 0; i < 7; i++) {
 456         env->gregs[i] = tswapl(registers[i]);
 457     }
 458     /* fill in register window */
 459     for(i = 0; i < 24; i++) {
 460         env->regwptr[i] = tswapl(registers[i + 8]);
 461     }
 462 #ifndef TARGET_SPARC64
 463     /* fill in fprs */
 464     for (i = 0; i < 32; i++) {
 465         *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
 466     }
 467     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 468     env->y = tswapl(registers[64]);
 469     PUT_PSR(env, tswapl(registers[65]));
 470     env->wim = tswapl(registers[66]);
 471     env->tbr = tswapl(registers[67]);
 472     env->pc = tswapl(registers[68]);
 473     env->npc = tswapl(registers[69]);
 474     env->fsr = tswapl(registers[70]);
 475 #else
 476     for (i = 0; i < 64; i += 2) {
 477         uint64_t tmp;
 478
 479         tmp = tswap64(registers[i / 2 + 32]);
 480         *((uint32_t *)&env->fpr[i]) = tmp >> 32;
 481         *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
 482     }
 483     env->pc = tswapl(registers[64]);
 484     env->npc = tswapl(registers[65]);
 485     {
 486         uint64_t tmp = tswapl(registers[66]);
 487
 488         PUT_CCR(env, tmp >> 32);
 489         env->asi = (tmp >> 24) & 0xff;
 490         env->pstate = (tmp >> 8) & 0xfff;
 491         PUT_CWP64(env, tmp & 0xff);
 492     }
 493     env->fsr = tswapl(registers[67]);
 494     env->fprs = tswapl(registers[68]);
 495     env->y = tswapl(registers[69]);
 496 #endif
 497 }
 498 #elif defined (TARGET_ARM)
 499 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 500 {
 501     int i;
 502     uint8_t *ptr;
 503
 504     ptr = mem_buf;
 505     /* 16 core integer registers (4 bytes each).  */
 506     for (i = 0; i < 16; i++)
 507       {
 508         *(uint32_t *)ptr = tswapl(env->regs[i]);
 509         ptr += 4;
 510       }
 511     /* 8 FPA registers (12 bytes each), FPS (4 bytes).
 512        Not yet implemented.  */
 513     memset (ptr, 0, 8 * 12 + 4);
 514     ptr += 8 * 12 + 4;
 515     /* CPSR (4 bytes).  */
 516     *(uint32_t *)ptr = tswapl (cpsr_read(env));
 517     ptr += 4;
 518
 519     return ptr - mem_buf;
 520 }
 521
 522 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 523 {
 524     int i;
 525     uint8_t *ptr;
 526
 527     ptr = mem_buf;
 528     /* Core integer registers.  */
 529     for (i = 0; i < 16; i++)
 530       {
 531         env->regs[i] = tswapl(*(uint32_t *)ptr);
 532         ptr += 4;
 533       }
 534     /* Ignore FPA regs and scr.  */
 535     ptr += 8 * 12 + 4;
 536     cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
 537 }
 538 #elif defined (TARGET_M68K)
 539 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 540 {
 541     int i;
 542     uint8_t *ptr;
 543     CPU_DoubleU u;
 544
 545     ptr = mem_buf;
 546     /* D0-D7 */
 547     for (i = 0; i < 8; i++) {
 548         *(uint32_t *)ptr = tswapl(env->dregs[i]);
 549         ptr += 4;
 550     }
 551     /* A0-A7 */
 552     for (i = 0; i < 8; i++) {
 553         *(uint32_t *)ptr = tswapl(env->aregs[i]);
 554         ptr += 4;
 555     }
 556     *(uint32_t *)ptr = tswapl(env->sr);
 557     ptr += 4;
 558     *(uint32_t *)ptr = tswapl(env->pc);
 559     ptr += 4;
 560     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 561        ColdFire has 8-bit double precision registers.  */
 562     for (i = 0; i < 8; i++) {
 563         u.d = env->fregs[i];
 564         *(uint32_t *)ptr = tswap32(u.l.upper);
 565         *(uint32_t *)ptr = tswap32(u.l.lower);
 566     }
 567     /* FP control regs (not implemented).  */
 568     memset (ptr, 0, 3 * 4);
 569     ptr += 3 * 4;
 570
 571     return ptr - mem_buf;
 572 }
 573
 574 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 575 {
 576     int i;
 577     uint8_t *ptr;
 578     CPU_DoubleU u;
 579
 580     ptr = mem_buf;
 581     /* D0-D7 */
 582     for (i = 0; i < 8; i++) {
 583         env->dregs[i] = tswapl(*(uint32_t *)ptr);
 584         ptr += 4;
 585     }
 586     /* A0-A7 */
 587     for (i = 0; i < 8; i++) {
 588         env->aregs[i] = tswapl(*(uint32_t *)ptr);
 589         ptr += 4;
 590     }
 591     env->sr = tswapl(*(uint32_t *)ptr);
 592     ptr += 4;
 593     env->pc = tswapl(*(uint32_t *)ptr);
 594     ptr += 4;
 595     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 596        ColdFire has 8-bit double precision registers.  */
 597     for (i = 0; i < 8; i++) {
 598         u.l.upper = tswap32(*(uint32_t *)ptr);
 599         u.l.lower = tswap32(*(uint32_t *)ptr);
 600         env->fregs[i] = u.d;
 601     }
 602     /* FP control regs (not implemented).  */
 603     ptr += 3 * 4;
 604 }
 605 #elif defined (TARGET_MIPS)
 606 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 607 {
 608     int i;
 609     uint8_t *ptr;
 610
 611     ptr = mem_buf;
 612     for (i = 0; i < 32; i++)
 613       {
 614         *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
 615         ptr += sizeof(target_ulong);
 616       }
 617
 618     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
 619     ptr += sizeof(target_ulong);
 620
 621     *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
 622     ptr += sizeof(target_ulong);
 623
 624     *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
 625     ptr += sizeof(target_ulong);
 626
 627     *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
 628     ptr += sizeof(target_ulong);
 629
 630     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
 631     ptr += sizeof(target_ulong);
 632
 633     *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
 634     ptr += sizeof(target_ulong);
 635
 636     if (env->CP0_Config1 & (1 << CP0C1_FP))
 637       {
 638         for (i = 0; i < 32; i++)
 639           {
 640             if (env->CP0_Status & (1 << CP0St_FR))
 641               *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
 642             else
 643               *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
 644             ptr += sizeof(target_ulong);
 645           }
 646
 647         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
 648         ptr += sizeof(target_ulong);
 649
 650         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
 651         ptr += sizeof(target_ulong);
 652       }
 653
 654     /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
 655     *(target_ulong *)ptr = 0;
 656     ptr += sizeof(target_ulong);
 657
 658     /* Registers for embedded use, we just pad them. */
 659     for (i = 0; i < 16; i++)
 660       {
 661         *(target_ulong *)ptr = 0;
 662         ptr += sizeof(target_ulong);
 663       }
 664
 665     /* Processor ID. */
 666     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
 667     ptr += sizeof(target_ulong);
 668
 669     return ptr - mem_buf;
 670 }
 671
 672 /* convert MIPS rounding mode in FCR31 to IEEE library */
 673 static unsigned int ieee_rm[] =
 674   {
 675     float_round_nearest_even,
 676     float_round_to_zero,
 677     float_round_up,
 678     float_round_down
 679   };
 680 #define RESTORE_ROUNDING_MODE \
 681     set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
 682
 683 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 684 {
 685     int i;
 686     uint8_t *ptr;
 687
 688     ptr = mem_buf;
 689     for (i = 0; i < 32; i++)
 690       {
 691         env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
 692         ptr += sizeof(target_ulong);
 693       }
 694
 695     env->CP0_Status = tswapl(*(target_ulong *)ptr);
 696     ptr += sizeof(target_ulong);
 697
 698     env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
 699     ptr += sizeof(target_ulong);
 700
 701     env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
 702     ptr += sizeof(target_ulong);
 703
 704     env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
 705     ptr += sizeof(target_ulong);
 706
 707     env->CP0_Cause = tswapl(*(target_ulong *)ptr);
 708     ptr += sizeof(target_ulong);
 709
 710     env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
 711     ptr += sizeof(target_ulong);
 712
 713     if (env->CP0_Config1 & (1 << CP0C1_FP))
 714       {
 715         for (i = 0; i < 32; i++)
 716           {
 717             if (env->CP0_Status & (1 << CP0St_FR))
 718               env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
 719             else
 720               env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
 721             ptr += sizeof(target_ulong);
 722           }
 723
 724         env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
 725         ptr += sizeof(target_ulong);
 726
 727         /* The remaining registers are assumed to be read-only. */
 728
 729         /* set rounding mode */
 730         RESTORE_ROUNDING_MODE;
 731
 732 #ifndef CONFIG_SOFTFLOAT
 733         /* no floating point exception for native float */
 734         SET_FP_ENABLE(env->fcr31, 0);
 735 #endif
 736       }
 737 }
 738 #elif defined (TARGET_SH4)
 739
 740 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 741
 742 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 743 {
 744   uint32_t *ptr = (uint32_t *)mem_buf;
 745   int i;
 746
 747 #define SAVE(x) *ptr++=tswapl(x)
 748   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 749       for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 750   } else {
 751       for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 752   }
 753   for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
 754   SAVE (env->pc);
 755   SAVE (env->pr);
 756   SAVE (env->gbr);
 757   SAVE (env->vbr);
 758   SAVE (env->mach);
 759   SAVE (env->macl);
 760   SAVE (env->sr);
 761   SAVE (env->fpul);
 762   SAVE (env->fpscr);
 763   for (i = 0; i < 16; i++)
 764       SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 765   SAVE (env->ssr);
 766   SAVE (env->spc);
 767   for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 768   for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 769   return ((uint8_t *)ptr - mem_buf);
 770 }
 771
 772 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 773 {
 774   uint32_t *ptr = (uint32_t *)mem_buf;
 775   int i;
 776
 777 #define LOAD(x) (x)=*ptr++;
 778   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 779       for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 780   } else {
 781       for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 782   }
 783   for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
 784   LOAD (env->pc);
 785   LOAD (env->pr);
 786   LOAD (env->gbr);
 787   LOAD (env->vbr);
 788   LOAD (env->mach);
 789   LOAD (env->macl);
 790   LOAD (env->sr);
 791   LOAD (env->fpul);
 792   LOAD (env->fpscr);
 793   for (i = 0; i < 16; i++)
 794       LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 795   LOAD (env->ssr);
 796   LOAD (env->spc);
 797   for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 798   for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 799 }
 800 #elif defined (TARGET_CRIS)
 801
 802 static int cris_save_32 (unsigned char *d, uint32_t value)
 803 {
 804         *d++ = (value);
 805         *d++ = (value >>= 8);
 806         *d++ = (value >>= 8);
 807         *d++ = (value >>= 8);
 808         return 4;
 809 }
 810 static int cris_save_16 (unsigned char *d, uint32_t value)
 811 {
 812         *d++ = (value);
 813         *d++ = (value >>= 8);
 814         return 2;
 815 }
 816 static int cris_save_8 (unsigned char *d, uint32_t value)
 817 {
 818         *d++ = (value);
 819         return 1;
 820 }
 821
 822 /* FIXME: this will bug on archs not supporting unaligned word accesses.  */
 823 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 824 {
 825   uint8_t *ptr = mem_buf;
 826   uint8_t srs;
 827   int i;
 828
 829   for (i = 0; i < 16; i++)
 830           ptr += cris_save_32 (ptr, env->regs[i]);
 831
 832   srs = env->pregs[SR_SRS];
 833
 834   ptr += cris_save_8 (ptr, env->pregs[0]);
 835   ptr += cris_save_8 (ptr, env->pregs[1]);
 836   ptr += cris_save_32 (ptr, env->pregs[2]);
 837   ptr += cris_save_8 (ptr, srs);
 838   ptr += cris_save_16 (ptr, env->pregs[4]);
 839
 840   for (i = 5; i < 16; i++)
 841           ptr += cris_save_32 (ptr, env->pregs[i]);
 842
 843   ptr += cris_save_32 (ptr, env->pc);
 844
 845   for (i = 0; i < 16; i++)
 846           ptr += cris_save_32 (ptr, env->sregs[srs][i]);
 847
 848   return ((uint8_t *)ptr - mem_buf);
 849 }
 850
 851 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 852 {
 853   uint32_t *ptr = (uint32_t *)mem_buf;
 854   int i;
 855
 856 #define LOAD(x) (x)=*ptr++;
 857   for (i = 0; i < 16; i++) LOAD(env->regs[i]);
 858   LOAD (env->pc);
 859 }
 860 #else
 861 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 862 {
 863     return 0;
 864 }
 865
 866 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 867 {
 868 }
 869
 870 #endif
 871
 872 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
 873 {
 874     const char *p;
 875     int ch, reg_size, type;
 876     char buf[4096];
 877     uint8_t mem_buf[4096];
 878     uint32_t *registers;
 879     target_ulong addr, len;
 880
 881 #ifdef DEBUG_GDB
 882     printf("command='%s'\n", line_buf);
 883 #endif
 884     p = line_buf;
 885     ch = *p++;
 886     switch(ch) {
 887     case '?':
 888         /* TODO: Make this return the correct value for user-mode.  */
 889         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
 890         put_packet(s, buf);
 891         break;
 892     case 'c':
 893         if (*p != '\0') {
 894             addr = strtoull(p, (char **)&p, 16);
 895 #if defined(TARGET_I386)
 896             env->eip = addr;
 897 #ifdef USE_KVM
 898             kvm_load_registers(env);
 899 #endif
 900 #elif defined (TARGET_PPC)
 901             env->nip = addr;
 902 #elif defined (TARGET_SPARC)
 903             env->pc = addr;
 904             env->npc = addr + 4;
 905 #elif defined (TARGET_ARM)
 906             env->regs[15] = addr;
 907 #elif defined (TARGET_SH4)
 908             env->pc = addr;
 909 #elif defined (TARGET_MIPS)
 910             env->PC[env->current_tc] = addr;
 911 #elif defined (TARGET_CRIS)
 912             env->pc = addr;
 913 #endif
 914         }
 915 #ifdef CONFIG_USER_ONLY
 916         s->running_state = 1;
 917 #else
 918         vm_start();
 919 #endif
 920         return RS_IDLE;
 921     case 's':
 922         if (*p != '\0') {
 923             addr = strtoull(p, (char **)&p, 16);
 924 #if defined(TARGET_I386)
 925             env->eip = addr;
 926 #ifdef USE_KVM
 927             kvm_load_registers(env);
 928 #endif
 929 #elif defined (TARGET_PPC)
 930             env->nip = addr;
 931 #elif defined (TARGET_SPARC)
 932             env->pc = addr;
 933             env->npc = addr + 4;
 934 #elif defined (TARGET_ARM)
 935             env->regs[15] = addr;
 936 #elif defined (TARGET_SH4)
 937             env->pc = addr;
 938 #elif defined (TARGET_MIPS)
 939             env->PC[env->current_tc] = addr;
 940 #elif defined (TARGET_CRIS)
 941             env->pc = addr;
 942 #endif
 943         }
 944         cpu_single_step(env, 1);
 945 #ifdef CONFIG_USER_ONLY
 946         s->running_state = 1;
 947 #else
 948         vm_start();
 949 #endif
 950         return RS_IDLE;
 951     case 'F':
 952         {
 953             target_ulong ret;
 954             target_ulong err;
 955
 956             ret = strtoull(p, (char **)&p, 16);
 957             if (*p == ',') {
 958                 p++;
 959                 err = strtoull(p, (char **)&p, 16);
 960             } else {
 961                 err = 0;
 962             }
 963             if (*p == ',')
 964                 p++;
 965             type = *p;
 966             if (gdb_current_syscall_cb)
 967                 gdb_current_syscall_cb(s->env, ret, err);
 968             if (type == 'C') {
 969                 put_packet(s, "T02");
 970             } else {
 971 #ifdef CONFIG_USER_ONLY
 972                 s->running_state = 1;
 973 #else
 974                 vm_start();
 975 #endif
 976             }
 977         }
 978         break;
 979     case 'g':
 980 #ifdef USE_KVM
 981         kvm_save_registers(env);
 982 #endif
 983         reg_size = cpu_gdb_read_registers(env, mem_buf);
 984         memtohex(buf, mem_buf, reg_size);
 985         put_packet(s, buf);
 986         break;
 987     case 'G':
 988         registers = (void *)mem_buf;
 989         len = strlen(p) / 2;
 990         hextomem((uint8_t *)registers, p, len);
 991         cpu_gdb_write_registers(env, mem_buf, len);
 992 #ifdef USE_KVM
 993         kvm_load_registers(env);
 994 #endif
 995         put_packet(s, "OK");
 996         break;
 997     case 'm':
 998         addr = strtoull(p, (char **)&p, 16);
 999         if (*p == ',')
1000             p++;
1001         len = strtoull(p, NULL, 16);
1002         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
1003             put_packet (s, "E14");
1004         } else {
1005             memtohex(buf, mem_buf, len);
1006             put_packet(s, buf);
1007         }
1008         break;
1009     case 'M':
1010         addr = strtoull(p, (char **)&p, 16);
1011         if (*p == ',')
1012             p++;
1013         len = strtoull(p, (char **)&p, 16);
1014         if (*p == ':')
1015             p++;
1016         hextomem(mem_buf, p, len);
1017         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1018             put_packet(s, "E14");
1019         else
1020             put_packet(s, "OK");
1021         break;
1022     case 'Z':
1023         type = strtoul(p, (char **)&p, 16);
1024         if (*p == ',')
1025             p++;
1026         addr = strtoull(p, (char **)&p, 16);
1027         if (*p == ',')
1028             p++;
1029         len = strtoull(p, (char **)&p, 16);
1030         if (type == 0 || type == 1) {
1031             if (cpu_breakpoint_insert(env, addr) < 0)
1032                 goto breakpoint_error;
1033             put_packet(s, "OK");
1034 #ifndef CONFIG_USER_ONLY
1035         } else if (type == 2) {
1036             if (cpu_watchpoint_insert(env, addr) < 0)
1037                 goto breakpoint_error;
1038             put_packet(s, "OK");
1039 #endif
1040         } else {
1041         breakpoint_error:
1042             put_packet(s, "E22");
1043         }
1044         break;
1045     case 'z':
1046         type = strtoul(p, (char **)&p, 16);
1047         if (*p == ',')
1048             p++;
1049         addr = strtoull(p, (char **)&p, 16);
1050         if (*p == ',')
1051             p++;
1052         len = strtoull(p, (char **)&p, 16);
1053         if (type == 0 || type == 1) {
1054             cpu_breakpoint_remove(env, addr);
1055             put_packet(s, "OK");
1056 #ifndef CONFIG_USER_ONLY
1057         } else if (type == 2) {
1058             cpu_watchpoint_remove(env, addr);
1059             put_packet(s, "OK");
1060 #endif
1061         } else {
1062             goto breakpoint_error;
1063         }
1064         break;
1065 #ifdef CONFIG_LINUX_USER
1066     case 'q':
1067         if (strncmp(p, "Offsets", 7) == 0) {
1068             TaskState *ts = env->opaque;
1069
1070             sprintf(buf,
1071                     "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1072                     ";Bss=" TARGET_ABI_FMT_lx,
1073                     ts->info->code_offset,
1074                     ts->info->data_offset,
1075                     ts->info->data_offset);
1076             put_packet(s, buf);
1077             break;
1078         }
1079         /* Fall through.  */
1080 #endif
1081     default:
1082         //        unknown_command:
1083         /* put empty packet */
1084         buf[0] = '\0';
1085         put_packet(s, buf);
1086         break;
1087     }
1088     return RS_IDLE;
1089 }
1090
1091 extern void tb_flush(CPUState *env);
1092
1093 #ifndef CONFIG_USER_ONLY
1094 static void gdb_vm_stopped(void *opaque, int reason)
1095 {
1096     GDBState *s = opaque;
1097     char buf[256];
1098     int ret;
1099
1100     if (s->state == RS_SYSCALL)
1101         return;
1102
1103     /* disable single step if it was enable */
1104     cpu_single_step(s->env, 0);
1105
1106     if (reason == EXCP_DEBUG) {
1107         if (s->env->watchpoint_hit) {
1108             snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1109                      SIGTRAP,
1110                      s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1111             put_packet(s, buf);
1112             s->env->watchpoint_hit = 0;
1113             return;
1114         }
1115         tb_flush(s->env);
1116         ret = SIGTRAP;
1117     } else if (reason == EXCP_INTERRUPT) {
1118         ret = SIGINT;
1119     } else {
1120         ret = 0;
1121     }
1122     snprintf(buf, sizeof(buf), "S%02x", ret);
1123     put_packet(s, buf);
1124 }
1125 #endif
1126
1127 /* Send a gdb syscall request.
1128    This accepts limited printf-style format specifiers, specifically:
1129     %x  - target_ulong argument printed in hex.
1130     %lx - 64-bit argument printed in hex.
1131     %s  - string pointer (target_ulong) and length (int) pair.  */
1132 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1133 {
1134     va_list va;
1135     char buf[256];
1136     char *p;
1137     target_ulong addr;
1138     uint64_t i64;
1139     GDBState *s;
1140
1141     s = gdb_syscall_state;
1142     if (!s)
1143         return;
1144     gdb_current_syscall_cb = cb;
1145     s->state = RS_SYSCALL;
1146 #ifndef CONFIG_USER_ONLY
1147     vm_stop(EXCP_DEBUG);
1148 #endif
1149     s->state = RS_IDLE;
1150     va_start(va, fmt);
1151     p = buf;
1152     *(p++) = 'F';
1153     while (*fmt) {
1154         if (*fmt == '%') {
1155             fmt++;
1156             switch (*fmt++) {
1157             case 'x':
1158                 addr = va_arg(va, target_ulong);
1159                 p += sprintf(p, TARGET_FMT_lx, addr);
1160                 break;
1161             case 'l':
1162                 if (*(fmt++) != 'x')
1163                     goto bad_format;
1164                 i64 = va_arg(va, uint64_t);
1165                 p += sprintf(p, "%" PRIx64, i64);
1166                 break;
1167             case 's':
1168                 addr = va_arg(va, target_ulong);
1169                 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1170                 break;
1171             default:
1172             bad_format:
1173                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1174                         fmt - 1);
1175                 break;
1176             }
1177         } else {
1178             *(p++) = *(fmt++);
1179         }
1180     }
1181     *p = 0;
1182     va_end(va);
1183     put_packet(s, buf);
1184 #ifdef CONFIG_USER_ONLY
1185     gdb_handlesig(s->env, 0);
1186 #else
1187     cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1188 #endif
1189 }
1190
1191 static void gdb_read_byte(GDBState *s, int ch)
1192 {
1193     CPUState *env = s->env;
1194     int i, csum;
1195     uint8_t reply;
1196
1197 #ifndef CONFIG_USER_ONLY
1198     if (s->last_packet_len) {
1199         /* Waiting for a response to the last packet.  If we see the start
1200            of a new command then abandon the previous response.  */
1201         if (ch == '-') {
1202 #ifdef DEBUG_GDB
1203             printf("Got NACK, retransmitting\n");
1204 #endif
1205             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1206         }
1207 #ifdef DEBUG_GDB
1208         else if (ch == '+')
1209             printf("Got ACK\n");
1210         else
1211             printf("Got '%c' when expecting ACK/NACK\n", ch);
1212 #endif
1213         if (ch == '+' || ch == '$')
1214             s->last_packet_len = 0;
1215         if (ch != '$')
1216             return;
1217     }
1218     if (vm_running) {
1219         /* when the CPU is running, we cannot do anything except stop
1220            it when receiving a char */
1221         vm_stop(EXCP_INTERRUPT);
1222     } else
1223 #endif
1224     {
1225         switch(s->state) {
1226         case RS_IDLE:
1227             if (ch == '$') {
1228                 s->line_buf_index = 0;
1229                 s->state = RS_GETLINE;
1230             }
1231             break;
1232         case RS_GETLINE:
1233             if (ch == '#') {
1234             s->state = RS_CHKSUM1;
1235             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1236                 s->state = RS_IDLE;
1237             } else {
1238             s->line_buf[s->line_buf_index++] = ch;
1239             }
1240             break;
1241         case RS_CHKSUM1:
1242             s->line_buf[s->line_buf_index] = '\0';
1243             s->line_csum = fromhex(ch) << 4;
1244             s->state = RS_CHKSUM2;
1245             break;
1246         case RS_CHKSUM2:
1247             s->line_csum |= fromhex(ch);
1248             csum = 0;
1249             for(i = 0; i < s->line_buf_index; i++) {
1250                 csum += s->line_buf[i];
1251             }
1252             if (s->line_csum != (csum & 0xff)) {
1253                 reply = '-';
1254                 put_buffer(s, &reply, 1);
1255                 s->state = RS_IDLE;
1256             } else {
1257                 reply = '+';
1258                 put_buffer(s, &reply, 1);
1259                 s->state = gdb_handle_packet(s, env, s->line_buf);
1260             }
1261             break;
1262         default:
1263             abort();
1264         }
1265     }
1266 }
1267
1268 #ifdef CONFIG_USER_ONLY
1269 int
1270 gdb_handlesig (CPUState *env, int sig)
1271 {
1272   GDBState *s;
1273   char buf[256];
1274   int n;
1275
1276   if (gdbserver_fd < 0)
1277     return sig;
1278
1279   s = &gdbserver_state;
1280
1281   /* disable single step if it was enabled */
1282   cpu_single_step(env, 0);
1283   tb_flush(env);
1284
1285   if (sig != 0)
1286     {
1287       snprintf(buf, sizeof(buf), "S%02x", sig);
1288       put_packet(s, buf);
1289     }
1290
1291   sig = 0;
1292   s->state = RS_IDLE;
1293   s->running_state = 0;
1294   while (s->running_state == 0) {
1295       n = read (s->fd, buf, 256);
1296       if (n > 0)
1297         {
1298           int i;
1299
1300           for (i = 0; i < n; i++)
1301             gdb_read_byte (s, buf[i]);
1302         }
1303       else if (n == 0 || errno != EAGAIN)
1304         {
1305           /* XXX: Connection closed.  Should probably wait for annother
1306              connection before continuing.  */
1307           return sig;
1308         }
1309   }
1310   return sig;
1311 }
1312
1313 /* Tell the remote gdb that the process has exited.  */
1314 void gdb_exit(CPUState *env, int code)
1315 {
1316   GDBState *s;
1317   char buf[4];
1318
1319   if (gdbserver_fd < 0)
1320     return;
1321
1322   s = &gdbserver_state;
1323
1324   snprintf(buf, sizeof(buf), "W%02x", code);
1325   put_packet(s, buf);
1326 }
1327
1328
1329 static void gdb_accept(void *opaque)
1330 {
1331     GDBState *s;
1332     struct sockaddr_in sockaddr;
1333     socklen_t len;
1334     int val, fd;
1335
1336     for(;;) {
1337         len = sizeof(sockaddr);
1338         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1339         if (fd < 0 && errno != EINTR) {
1340             perror("accept");
1341             return;
1342         } else if (fd >= 0) {
1343             break;
1344         }
1345     }
1346
1347     /* set short latency */
1348     val = 1;
1349     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1350
1351     s = &gdbserver_state;
1352     memset (s, 0, sizeof (GDBState));
1353     s->env = first_cpu; /* XXX: allow to change CPU */
1354     s->fd = fd;
1355
1356     gdb_syscall_state = s;
1357
1358     fcntl(fd, F_SETFL, O_NONBLOCK);
1359 }
1360
1361 static int gdbserver_open(int port)
1362 {
1363     struct sockaddr_in sockaddr;
1364     int fd, val, ret;
1365
1366     fd = socket(PF_INET, SOCK_STREAM, 0);
1367     if (fd < 0) {
1368         perror("socket");
1369         return -1;
1370     }
1371
1372     /* allow fast reuse */
1373     val = 1;
1374     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1375
1376     sockaddr.sin_family = AF_INET;
1377     sockaddr.sin_port = htons(port);
1378     sockaddr.sin_addr.s_addr = 0;
1379     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1380     if (ret < 0) {
1381         perror("bind");
1382         return -1;
1383     }
1384     ret = listen(fd, 0);
1385     if (ret < 0) {
1386         perror("listen");
1387         return -1;
1388     }
1389     return fd;
1390 }
1391
1392 int gdbserver_start(int port)
1393 {
1394     gdbserver_fd = gdbserver_open(port);
1395     if (gdbserver_fd < 0)
1396         return -1;
1397     /* accept connections */
1398     gdb_accept (NULL);
1399     return 0;
1400 }
1401 #else
1402 static int gdb_chr_can_receive(void *opaque)
1403 {
1404   return 1;
1405 }
1406
1407 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1408 {
1409     GDBState *s = opaque;
1410     int i;
1411
1412     for (i = 0; i < size; i++) {
1413         gdb_read_byte(s, buf[i]);
1414     }
1415 }
1416
1417 static void gdb_chr_event(void *opaque, int event)
1418 {
1419     switch (event) {
1420     case CHR_EVENT_RESET:
1421         vm_stop(EXCP_INTERRUPT);
1422         gdb_syscall_state = opaque;
1423         break;
1424     default:
1425         break;
1426     }
1427 }
1428
1429 int gdbserver_start(const char *port)
1430 {
1431     GDBState *s;
1432     char gdbstub_port_name[128];
1433     int port_num;
1434     char *p;
1435     CharDriverState *chr;
1436
1437     if (!port || !*port)
1438       return -1;
1439
1440     port_num = strtol(port, &p, 10);
1441     if (*p == 0) {
1442         /* A numeric value is interpreted as a port number.  */
1443         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1444                  "tcp::%d,nowait,nodelay,server", port_num);
1445         port = gdbstub_port_name;
1446     }
1447
1448     chr = qemu_chr_open(port);
1449     if (!chr)
1450         return -1;
1451
1452     s = qemu_mallocz(sizeof(GDBState));
1453     if (!s) {
1454         return -1;
1455     }
1456     s->env = first_cpu; /* XXX: allow to change CPU */
1457     s->chr = chr;
1458     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1459                           gdb_chr_event, s);
1460     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1461     return 0;
1462 }
1463 #endif