kvm: qemu: fix pci_enable_capabilities to set the CAP feature in pci::status
[kvm-userspace.git] / qemu / hw / smbus.h
blob640377b0c446e7de06f96fad997d13f627f7266c
1 /*
2 * QEMU SMBus API
4 * Copyright (c) 2007 Arastra, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include "i2c.h"
27 struct SMBusDevice {
28 /* The SMBus protocol is implemented on top of I2C. */
29 i2c_slave i2c;
31 /* Callbacks set by the device. */
32 void (*quick_cmd)(SMBusDevice *dev, uint8_t read);
33 void (*send_byte)(SMBusDevice *dev, uint8_t val);
34 uint8_t (*receive_byte)(SMBusDevice *dev);
35 /* We can't distinguish between a word write and a block write with
36 length 1, so pass the whole data block including the length byte
37 (if present). The device is responsible figuring out what type of
38 command this is. */
39 void (*write_data)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len);
40 /* Likewise we can't distinguish between different reads, or even know
41 the length of the read until the read is complete, so read data a
42 byte at a time. The device is responsible for adding the length
43 byte on block reads. */
44 uint8_t (*read_data)(SMBusDevice *dev, uint8_t cmd, int n);
46 /* Remaining fields for internal use only. */
47 int mode;
48 int data_len;
49 uint8_t data_buf[34]; /* command + len + 32 bytes of data. */
50 uint8_t command;
53 /* Create a slave device. */
54 SMBusDevice *smbus_device_init(i2c_bus *bus, int address, int size);
56 /* Master device commands. */
57 void smbus_quick_command(i2c_bus *bus, int addr, int read);
58 uint8_t smbus_receive_byte(i2c_bus *bus, int addr);
59 void smbus_send_byte(i2c_bus *bus, int addr, uint8_t data);
60 uint8_t smbus_read_byte(i2c_bus *bus, int addr, uint8_t command);
61 void smbus_write_byte(i2c_bus *bus, int addr, uint8_t command, uint8_t data);
62 uint16_t smbus_read_word(i2c_bus *bus, int addr, uint8_t command);
63 void smbus_write_word(i2c_bus *bus, int addr, uint8_t command, uint16_t data);
64 int smbus_read_block(i2c_bus *bus, int addr, uint8_t command, uint8_t *data);
65 void smbus_write_block(i2c_bus *bus, int addr, uint8_t command, uint8_t *data,
66 int len);
68 /* smbus_eeprom.c */
69 void smbus_eeprom_device_init(i2c_bus *bus, uint8_t addr, uint8_t *buf);