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kvm: qemu: device-assignment: add_assigned_device() returns a pointer
[kvm-userspace.git] / qemu / hw / pc.c
blob6f3339f8522b792968d7efd61625e97d3f9ba3de
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "block.h"
29 #include "sysemu.h"
30 #include "audio/audio.h"
31 #include "net.h"
32 #include "smbus.h"
33 #include "boards.h"
34 #include "console.h"
35 #include "fw_cfg.h"
36 #include "device-assignment.h"
37
38 #include "qemu-kvm.h"
39
40 /* output Bochs bios info messages */
41 //#define DEBUG_BIOS
42
43 #define BIOS_FILENAME "bios.bin"
44 #define VGABIOS_FILENAME "vgabios.bin"
45 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
46 #define EXTBOOT_FILENAME "extboot.bin"
47
48 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
49
50 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
51 #define ACPI_DATA_SIZE 0x10000
52 #define BIOS_CFG_IOPORT 0x510
53
54 #define MAX_IDE_BUS 2
55
56 static fdctrl_t *floppy_controller;
57 static RTCState *rtc_state;
58 static PITState *pit;
59 static IOAPICState *ioapic;
60 static PCIDevice *i440fx_state;
61
62 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
63 {
64 }
65
66 /* MSDOS compatibility mode FPU exception support */
67 static qemu_irq ferr_irq;
68 /* XXX: add IGNNE support */
69 void cpu_set_ferr(CPUX86State *s)
70 {
71 qemu_irq_raise(ferr_irq);
72 }
73
74 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
75 {
76 qemu_irq_lower(ferr_irq);
77 }
78
79 /* TSC handling */
80 uint64_t cpu_get_tsc(CPUX86State *env)
81 {
82 /* Note: when using kqemu, it is more logical to return the host TSC
83 because kqemu does not trap the RDTSC instruction for
84 performance reasons */
85 #ifdef USE_KQEMU
86 if (env->kqemu_enabled) {
87 return cpu_get_real_ticks();
88 } else
89 #endif
90 {
91 return cpu_get_ticks();
92 }
93 }
94
95 /* SMM support */
96 void cpu_smm_update(CPUState *env)
97 {
98 if (i440fx_state && env == first_cpu)
99 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
100 }
101
102
103 /* IRQ handling */
104 int cpu_get_pic_interrupt(CPUState *env)
105 {
106 int intno;
107
108 intno = apic_get_interrupt(env);
109 if (intno >= 0) {
110 /* set irq request if a PIC irq is still pending */
111 /* XXX: improve that */
112 pic_update_irq(isa_pic);
113 return intno;
114 }
115 /* read the irq from the PIC */
116 if (!apic_accept_pic_intr(env))
117 return -1;
118
119 intno = pic_read_irq(isa_pic);
120 return intno;
121 }
122
123 static void pic_irq_request(void *opaque, int irq, int level)
124 {
125 CPUState *env = first_cpu;
126
127 if (env->apic_state) {
128 while (env) {
129 if (apic_accept_pic_intr(env))
130 apic_deliver_pic_intr(env, level);
131 env = env->next_cpu;
132 }
133 } else {
134 if (level)
135 cpu_interrupt(env, CPU_INTERRUPT_HARD);
136 else
137 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
138 }
139 }
140
141 /* PC cmos mappings */
142
143 #define REG_EQUIPMENT_BYTE 0x14
144
145 static int cmos_get_fd_drive_type(int fd0)
146 {
147 int val;
148
149 switch (fd0) {
150 case 0:
151 /* 1.44 Mb 3"5 drive */
152 val = 4;
153 break;
154 case 1:
155 /* 2.88 Mb 3"5 drive */
156 val = 5;
157 break;
158 case 2:
159 /* 1.2 Mb 5"5 drive */
160 val = 2;
161 break;
162 default:
163 val = 0;
164 break;
165 }
166 return val;
167 }
168
169 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
170 {
171 RTCState *s = rtc_state;
172 int cylinders, heads, sectors;
173 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
174 rtc_set_memory(s, type_ofs, 47);
175 rtc_set_memory(s, info_ofs, cylinders);
176 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
177 rtc_set_memory(s, info_ofs + 2, heads);
178 rtc_set_memory(s, info_ofs + 3, 0xff);
179 rtc_set_memory(s, info_ofs + 4, 0xff);
180 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
181 rtc_set_memory(s, info_ofs + 6, cylinders);
182 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
183 rtc_set_memory(s, info_ofs + 8, sectors);
184 }
185
186 /* convert boot_device letter to something recognizable by the bios */
187 static int boot_device2nibble(char boot_device)
188 {
189 switch(boot_device) {
190 case 'a':
191 case 'b':
192 return 0x01; /* floppy boot */
193 case 'c':
194 return 0x02; /* hard drive boot */
195 case 'd':
196 return 0x03; /* CD-ROM boot */
197 case 'n':
198 return 0x04; /* Network boot */
199 }
200 return 0;
201 }
202
203 /* copy/pasted from cmos_init, should be made a general function
204 and used there as well */
205 static int pc_boot_set(void *opaque, const char *boot_device)
206 {
207 #define PC_MAX_BOOT_DEVICES 3
208 RTCState *s = (RTCState *)opaque;
209 int nbds, bds[3] = { 0, };
210 int i;
211
212 nbds = strlen(boot_device);
213 if (nbds > PC_MAX_BOOT_DEVICES) {
214 term_printf("Too many boot devices for PC\n");
215 return(1);
216 }
217 for (i = 0; i < nbds; i++) {
218 bds[i] = boot_device2nibble(boot_device[i]);
219 if (bds[i] == 0) {
220 term_printf("Invalid boot device for PC: '%c'\n",
221 boot_device[i]);
222 return(1);
223 }
224 }
225 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
226 rtc_set_memory(s, 0x38, (bds[2] << 4));
227 return(0);
228 }
229
230 /* hd_table must contain 4 block drivers */
231 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
232 const char *boot_device, BlockDriverState **hd_table)
233 {
234 RTCState *s = rtc_state;
235 int nbds, bds[3] = { 0, };
236 int val;
237 int fd0, fd1, nb;
238 int i;
239
240 /* various important CMOS locations needed by PC/Bochs bios */
241
242 /* memory size */
243 val = 640; /* base memory in K */
244 rtc_set_memory(s, 0x15, val);
245 rtc_set_memory(s, 0x16, val >> 8);
246
247 val = (ram_size / 1024) - 1024;
248 if (val > 65535)
249 val = 65535;
250 rtc_set_memory(s, 0x17, val);
251 rtc_set_memory(s, 0x18, val >> 8);
252 rtc_set_memory(s, 0x30, val);
253 rtc_set_memory(s, 0x31, val >> 8);
254
255 if (above_4g_mem_size) {
256 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
257 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
258 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
259 }
260 rtc_set_memory(s, 0x5f, smp_cpus - 1);
261
262 if (ram_size > (16 * 1024 * 1024))
263 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
264 else
265 val = 0;
266 if (val > 65535)
267 val = 65535;
268 rtc_set_memory(s, 0x34, val);
269 rtc_set_memory(s, 0x35, val >> 8);
270
271 /* set the number of CPU */
272 rtc_set_memory(s, 0x5f, smp_cpus - 1);
273
274 /* set boot devices, and disable floppy signature check if requested */
275 #define PC_MAX_BOOT_DEVICES 3
276 nbds = strlen(boot_device);
277 if (nbds > PC_MAX_BOOT_DEVICES) {
278 fprintf(stderr, "Too many boot devices for PC\n");
279 exit(1);
280 }
281 for (i = 0; i < nbds; i++) {
282 bds[i] = boot_device2nibble(boot_device[i]);
283 if (bds[i] == 0) {
284 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
285 boot_device[i]);
286 exit(1);
287 }
288 }
289 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
290 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
291
292 /* floppy type */
293
294 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
295 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
296
297 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
298 rtc_set_memory(s, 0x10, val);
299
300 val = 0;
301 nb = 0;
302 if (fd0 < 3)
303 nb++;
304 if (fd1 < 3)
305 nb++;
306 switch (nb) {
307 case 0:
308 break;
309 case 1:
310 val |= 0x01; /* 1 drive, ready for boot */
311 break;
312 case 2:
313 val |= 0x41; /* 2 drives, ready for boot */
314 break;
315 }
316 val |= 0x02; /* FPU is there */
317 val |= 0x04; /* PS/2 mouse installed */
318 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
319
320 /* hard drives */
321
322 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
323 if (hd_table[0])
324 cmos_init_hd(0x19, 0x1b, hd_table[0]);
325 if (hd_table[1])
326 cmos_init_hd(0x1a, 0x24, hd_table[1]);
327
328 val = 0;
329 for (i = 0; i < 4; i++) {
330 if (hd_table[i]) {
331 int cylinders, heads, sectors, translation;
332 /* NOTE: bdrv_get_geometry_hint() returns the physical
333 geometry. It is always such that: 1 <= sects <= 63, 1
334 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
335 geometry can be different if a translation is done. */
336 translation = bdrv_get_translation_hint(hd_table[i]);
337 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
338 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
339 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
340 /* No translation. */
341 translation = 0;
342 } else {
343 /* LBA translation. */
344 translation = 1;
345 }
346 } else {
347 translation--;
348 }
349 val |= translation << (i * 2);
350 }
351 }
352 rtc_set_memory(s, 0x39, val);
353 }
354
355 void ioport_set_a20(int enable)
356 {
357 /* XXX: send to all CPUs ? */
358 cpu_x86_set_a20(first_cpu, enable);
359 }
360
361 int ioport_get_a20(void)
362 {
363 return ((first_cpu->a20_mask >> 20) & 1);
364 }
365
366 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
367 {
368 ioport_set_a20((val >> 1) & 1);
369 /* XXX: bit 0 is fast reset */
370 }
371
372 static uint32_t ioport92_read(void *opaque, uint32_t addr)
373 {
374 return ioport_get_a20() << 1;
375 }
376
377 /***********************************************************/
378 /* Bochs BIOS debug ports */
379
380 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
381 {
382 static const char shutdown_str[8] = "Shutdown";
383 static int shutdown_index = 0;
384
385 switch(addr) {
386 /* Bochs BIOS messages */
387 case 0x400:
388 case 0x401:
389 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
390 exit(1);
391 case 0x402:
392 case 0x403:
393 #ifdef DEBUG_BIOS
394 fprintf(stderr, "%c", val);
395 #endif
396 break;
397 case 0x8900:
398 /* same as Bochs power off */
399 if (val == shutdown_str[shutdown_index]) {
400 shutdown_index++;
401 if (shutdown_index == 8) {
402 shutdown_index = 0;
403 qemu_system_shutdown_request();
404 }
405 } else {
406 shutdown_index = 0;
407 }
408 break;
409
410 /* LGPL'ed VGA BIOS messages */
411 case 0x501:
412 case 0x502:
413 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
414 exit(1);
415 case 0x500:
416 case 0x503:
417 #ifdef DEBUG_BIOS
418 fprintf(stderr, "%c", val);
419 #endif
420 break;
421 }
422 }
423
424 static void bochs_bios_init(void)
425 {
426 void *fw_cfg;
427
428 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
429 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
430 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
431 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
432 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
433
434 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
435 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
436 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
437 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
438
439 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
440 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
441 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
442 }
443
444 /* Generate an initial boot sector which sets state and jump to
445 a specified vector */
446 static void generate_bootsect(uint8_t *option_rom,
447 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
448 {
449 uint8_t rom[512], *p, *reloc;
450 uint8_t sum;
451 int i;
452
453 memset(rom, 0, sizeof(rom));
454
455 p = rom;
456 /* Make sure we have an option rom signature */
457 *p++ = 0x55;
458 *p++ = 0xaa;
459
460 /* ROM size in sectors*/
461 *p++ = 1;
462
463 /* Hook int19 */
464
465 *p++ = 0x50; /* push ax */
466 *p++ = 0x1e; /* push ds */
467 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
468 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
469
470 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
471 *p++ = 0x64; *p++ = 0x00;
472 reloc = p;
473 *p++ = 0x00; *p++ = 0x00;
474
475 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
476 *p++ = 0x66; *p++ = 0x00;
477
478 *p++ = 0x1f; /* pop ds */
479 *p++ = 0x58; /* pop ax */
480 *p++ = 0xcb; /* lret */
481
482 /* Actual code */
483 *reloc = (p - rom);
484
485 *p++ = 0xfa; /* CLI */
486 *p++ = 0xfc; /* CLD */
487
488 for (i = 0; i < 6; i++) {
489 if (i == 1) /* Skip CS */
490 continue;
491
492 *p++ = 0xb8; /* MOV AX,imm16 */
493 *p++ = segs[i];
494 *p++ = segs[i] >> 8;
495 *p++ = 0x8e; /* MOV <seg>,AX */
496 *p++ = 0xc0 + (i << 3);
497 }
498
499 for (i = 0; i < 8; i++) {
500 *p++ = 0x66; /* 32-bit operand size */
501 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
502 *p++ = gpr[i];
503 *p++ = gpr[i] >> 8;
504 *p++ = gpr[i] >> 16;
505 *p++ = gpr[i] >> 24;
506 }
507
508 *p++ = 0xea; /* JMP FAR */
509 *p++ = ip; /* IP */
510 *p++ = ip >> 8;
511 *p++ = segs[1]; /* CS */
512 *p++ = segs[1] >> 8;
513
514 /* sign rom */
515 sum = 0;
516 for (i = 0; i < (sizeof(rom) - 1); i++)
517 sum += rom[i];
518 rom[sizeof(rom) - 1] = -sum;
519
520 memcpy(option_rom, rom, sizeof(rom));
521 }
522
523 static long get_file_size(FILE *f)
524 {
525 long where, size;
526
527 /* XXX: on Unix systems, using fstat() probably makes more sense */
528
529 where = ftell(f);
530 fseek(f, 0, SEEK_END);
531 size = ftell(f);
532 fseek(f, where, SEEK_SET);
533
534 return size;
535 }
536
537 static void load_linux(uint8_t *option_rom,
538 const char *kernel_filename,
539 const char *initrd_filename,
540 const char *kernel_cmdline)
541 {
542 uint16_t protocol;
543 uint32_t gpr[8];
544 uint16_t seg[6];
545 uint16_t real_seg;
546 int setup_size, kernel_size, initrd_size, cmdline_size;
547 uint32_t initrd_max;
548 uint8_t header[1024];
549 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
550 FILE *f, *fi;
551
552 /* Align to 16 bytes as a paranoia measure */
553 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
554
555 /* load the kernel header */
556 f = fopen(kernel_filename, "rb");
557 if (!f || !(kernel_size = get_file_size(f)) ||
558 fread(header, 1, 1024, f) != 1024) {
559 fprintf(stderr, "qemu: could not load kernel '%s'\n",
560 kernel_filename);
561 exit(1);
562 }
563
564 /* kernel protocol version */
565 #if 0
566 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
567 #endif
568 if (ldl_p(header+0x202) == 0x53726448)
569 protocol = lduw_p(header+0x206);
570 else
571 protocol = 0;
572
573 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
574 /* Low kernel */
575 real_addr = 0x90000;
576 cmdline_addr = 0x9a000 - cmdline_size;
577 prot_addr = 0x10000;
578 } else if (protocol < 0x202) {
579 /* High but ancient kernel */
580 real_addr = 0x90000;
581 cmdline_addr = 0x9a000 - cmdline_size;
582 prot_addr = 0x100000;
583 } else {
584 /* High and recent kernel */
585 real_addr = 0x10000;
586 cmdline_addr = 0x20000;
587 prot_addr = 0x100000;
588 }
589
590 #if 0
591 fprintf(stderr,
592 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
593 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
594 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
595 real_addr,
596 cmdline_addr,
597 prot_addr);
598 #endif
599
600 /* highest address for loading the initrd */
601 if (protocol >= 0x203)
602 initrd_max = ldl_p(header+0x22c);
603 else
604 initrd_max = 0x37ffffff;
605
606 if (initrd_max >= ram_size-ACPI_DATA_SIZE)
607 initrd_max = ram_size-ACPI_DATA_SIZE-1;
608
609 /* kernel command line */
610 pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
611
612 if (protocol >= 0x202) {
613 stl_p(header+0x228, cmdline_addr);
614 } else {
615 stw_p(header+0x20, 0xA33F);
616 stw_p(header+0x22, cmdline_addr-real_addr);
617 }
618
619 /* loader type */
620 /* High nybble = B reserved for Qemu; low nybble is revision number.
621 If this code is substantially changed, you may want to consider
622 incrementing the revision. */
623 if (protocol >= 0x200)
624 header[0x210] = 0xB0;
625
626 /* heap */
627 if (protocol >= 0x201) {
628 header[0x211] |= 0x80; /* CAN_USE_HEAP */
629 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
630 }
631
632 /* load initrd */
633 if (initrd_filename) {
634 if (protocol < 0x200) {
635 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
636 exit(1);
637 }
638
639 fi = fopen(initrd_filename, "rb");
640 if (!fi) {
641 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
642 initrd_filename);
643 exit(1);
644 }
645
646 initrd_size = get_file_size(fi);
647 initrd_addr = (initrd_max-initrd_size) & ~4095;
648
649 fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
650 "\n", initrd_size, initrd_addr);
651
652 if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
653 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
654 initrd_filename);
655 exit(1);
656 }
657 fclose(fi);
658
659 stl_p(header+0x218, initrd_addr);
660 stl_p(header+0x21c, initrd_size);
661 }
662
663 /* store the finalized header and load the rest of the kernel */
664 cpu_physical_memory_write(real_addr, header, 1024);
665
666 setup_size = header[0x1f1];
667 if (setup_size == 0)
668 setup_size = 4;
669
670 setup_size = (setup_size+1)*512;
671 kernel_size -= setup_size; /* Size of protected-mode code */
672
673 if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
674 !fread_targphys_ok(prot_addr, kernel_size, f)) {
675 fprintf(stderr, "qemu: read error on kernel '%s'\n",
676 kernel_filename);
677 exit(1);
678 }
679 fclose(f);
680
681 /* generate bootsector to set up the initial register state */
682 real_seg = real_addr >> 4;
683 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
684 seg[1] = real_seg+0x20; /* CS */
685 memset(gpr, 0, sizeof gpr);
686 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
687
688 generate_bootsect(option_rom, gpr, seg, 0);
689 }
690
691 static void main_cpu_reset(void *opaque)
692 {
693 CPUState *env = opaque;
694 cpu_reset(env);
695 }
696
697 static const int ide_iobase[2] = { 0x1f0, 0x170 };
698 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
699 static const int ide_irq[2] = { 14, 15 };
700
701 #define NE2000_NB_MAX 6
702
703 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
704 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
705
706 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
707 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
708
709 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
710 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
711
712 #ifdef HAS_AUDIO
713 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
714 {
715 struct soundhw *c;
716 int audio_enabled = 0;
717
718 for (c = soundhw; !audio_enabled && c->name; ++c) {
719 audio_enabled = c->enabled;
720 }
721
722 if (audio_enabled) {
723 AudioState *s;
724
725 s = AUD_init ();
726 if (s) {
727 for (c = soundhw; c->name; ++c) {
728 if (c->enabled) {
729 if (c->isa) {
730 c->init.init_isa (s, pic);
731 }
732 else {
733 if (pci_bus) {
734 c->init.init_pci (pci_bus, s);
735 }
736 }
737 }
738 }
739 }
740 }
741 }
742 #endif
743
744 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
745 {
746 static int nb_ne2k = 0;
747
748 if (nb_ne2k == NE2000_NB_MAX)
749 return;
750 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
751 nb_ne2k++;
752 }
753
754 typedef struct rom_reset_data {
755 uint8_t *data;
756 target_phys_addr_t addr;
757 unsigned size;
758 } RomResetData;
759
760 static void option_rom_reset(void *_rrd)
761 {
762 RomResetData *rrd = _rrd;
763
764 cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
765 }
766
767 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
768 {
769 RomResetData *rrd = qemu_malloc(sizeof *rrd);
770
771 rrd->data = qemu_malloc(size);
772 cpu_physical_memory_read(addr, rrd->data, size);
773 rrd->addr = addr;
774 rrd->size = size;
775 qemu_register_reset(option_rom_reset, rrd);
776 }
777
778 CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
779 {
780 CPUState *env = cpu_init(cpu_model);
781 if (!env) {
782 fprintf(stderr, "Unable to find x86 CPU definition\n");
783 exit(1);
784 }
785 if (cpu != 0)
786 env->halted = 1;
787 if (smp_cpus > 1) {
788 /* XXX: enable it in all cases */
789 env->cpuid_features |= CPUID_APIC;
790 }
791 qemu_register_reset(main_cpu_reset, env);
792 if (pci_enabled) {
793 apic_init(env);
794 }
795 return env;
796 }
797
798 /* PC hardware initialisation */
799 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
800 const char *boot_device, DisplayState *ds,
801 const char *kernel_filename, const char *kernel_cmdline,
802 const char *initrd_filename,
803 int pci_enabled, const char *cpu_model)
804 {
805 char buf[1024];
806 int ret, linux_boot, i;
807 ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
808 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
809 int bios_size, isa_bios_size, vga_bios_size, opt_rom_offset;
810 PCIBus *pci_bus;
811 int piix3_devfn = -1;
812 CPUState *env;
813 NICInfo *nd;
814 qemu_irq *cpu_irq;
815 qemu_irq *i8259;
816 int index;
817 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
818 BlockDriverState *fd[MAX_FD];
819
820 if (ram_size >= 0xe0000000 ) {
821 above_4g_mem_size = ram_size - 0xe0000000;
822 below_4g_mem_size = 0xe0000000;
823 } else {
824 below_4g_mem_size = ram_size;
825 }
826
827 linux_boot = (kernel_filename != NULL);
828
829 /* init CPUs */
830 if (cpu_model == NULL) {
831 #ifdef TARGET_X86_64
832 cpu_model = "qemu64";
833 #else
834 cpu_model = "qemu32";
835 #endif
836 }
837
838 for(i = 0; i < smp_cpus; i++) {
839 env = pc_new_cpu(i, cpu_model, pci_enabled);
840 }
841
842 vmport_init();
843
844 /* allocate RAM */
845 ram_addr = qemu_ram_alloc(0xa0000);
846 cpu_register_physical_memory(0, 0xa0000, ram_addr);
847
848 /* Allocate, even though we won't register, so we don't break the
849 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
850 * and some bios areas, which will be registered later
851 */
852 ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
853 ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
854 cpu_register_physical_memory(0x100000,
855 below_4g_mem_size - 0x100000,
856 ram_addr);
857
858 /* above 4giga memory allocation */
859 if (above_4g_mem_size > 0) {
860 if (hpagesize) {
861 if (ram_addr & (hpagesize-1)) {
862 unsigned long aligned_addr;
863 aligned_addr = (ram_addr + hpagesize - 1) & ~(hpagesize-1);
864 qemu_ram_alloc(aligned_addr - ram_addr);
865 ram_addr = aligned_addr;
866 }
867 }
868 ram_addr = qemu_ram_alloc(above_4g_mem_size);
869 cpu_register_physical_memory(0x100000000ULL,
870 above_4g_mem_size,
871 ram_addr);
872 }
873
874 /* allocate VGA RAM */
875 vga_ram_addr = qemu_ram_alloc(vga_ram_size);
876
877 /* BIOS load */
878 if (bios_name == NULL)
879 bios_name = BIOS_FILENAME;
880 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
881 bios_size = get_image_size(buf);
882 if (bios_size <= 0 ||
883 (bios_size % 65536) != 0) {
884 goto bios_error;
885 }
886 bios_offset = qemu_ram_alloc(bios_size);
887 ret = load_image(buf, phys_ram_base + bios_offset);
888 if (ret != bios_size) {
889 bios_error:
890 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
891 exit(1);
892 }
893
894 /* VGA BIOS load */
895 if (cirrus_vga_enabled) {
896 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
897 } else {
898 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
899 }
900 vga_bios_size = get_image_size(buf);
901 if (vga_bios_size <= 0 || vga_bios_size > 65536)
902 goto vga_bios_error;
903 vga_bios_offset = qemu_ram_alloc(65536);
904
905 ret = load_image(buf, phys_ram_base + vga_bios_offset);
906 if (ret != vga_bios_size) {
907 vga_bios_error:
908 fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
909 exit(1);
910 }
911
912 /* setup basic memory access */
913 cpu_register_physical_memory(0xc0000, 0x10000,
914 vga_bios_offset | IO_MEM_ROM);
915
916 /* map the last 128KB of the BIOS in ISA space */
917 isa_bios_size = bios_size;
918 if (isa_bios_size > (128 * 1024))
919 isa_bios_size = 128 * 1024;
920 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
921 IO_MEM_UNASSIGNED);
922 /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
923 cpu_register_physical_memory(0x100000 - isa_bios_size,
924 isa_bios_size,
925 (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
926
927 if (extboot_drive != -1) {
928 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, EXTBOOT_FILENAME);
929 option_rom[nb_option_roms++] = buf;
930 }
931
932 {
933 ram_addr_t option_rom_offset;
934 int size, offset;
935
936 offset = 0;
937 if (linux_boot) {
938 option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
939 load_linux(phys_ram_base + option_rom_offset,
940 kernel_filename, initrd_filename, kernel_cmdline);
941 cpu_register_physical_memory(0xd0000, TARGET_PAGE_SIZE,
942 option_rom_offset | IO_MEM_ROM);
943 offset = TARGET_PAGE_SIZE;
944 }
945
946 for (i = 0; i < nb_option_roms; i++) {
947 size = get_image_size(option_rom[i]);
948 if (size < 0) {
949 fprintf(stderr, "Could not load option rom '%s'\n",
950 option_rom[i]);
951 exit(1);
952 }
953 if (size > (0x10000 - offset))
954 goto option_rom_error;
955 option_rom_offset = qemu_ram_alloc(size);
956 ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
957 if (ret != size) {
958 option_rom_error:
959 fprintf(stderr, "Too many option ROMS\n");
960 exit(1);
961 }
962 size = (size + 4095) & ~4095;
963 /* XXX: for DDIM support, "ROM space" should be writable during
964 initialization, and (optionally) marked readonly by the BIOS
965 before INT 19h. See the PNPBIOS specification, appendix B.
966 DDIM support is mandatory for proper PCI expansion ROM support. */
967 cpu_register_physical_memory(0xd0000 + offset,
968 size, option_rom_offset /* | IO_MEM_ROM */);
969 option_rom_setup_reset(0xd0000 + offset, size);
970 offset += size;
971 }
972 }
973
974 /* map all the bios at the top of memory */
975 cpu_register_physical_memory((uint32_t)(-bios_size),
976 bios_size, bios_offset | IO_MEM_ROM);
977
978 bochs_bios_init();
979
980 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
981 i8259 = i8259_init(cpu_irq[0]);
982 ferr_irq = i8259[13];
983
984 if (pci_enabled) {
985 pci_bus = i440fx_init(&i440fx_state, i8259);
986 piix3_devfn = piix3_init(pci_bus, -1);
987 } else {
988 pci_bus = NULL;
989 }
990
991 /* init basic PC hardware */
992 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
993
994 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
995
996 if (cirrus_vga_enabled) {
997 if (pci_enabled) {
998 pci_cirrus_vga_init(pci_bus,
999 ds, phys_ram_base + vga_ram_addr,
1000 vga_ram_addr, vga_ram_size);
1001 } else {
1002 isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
1003 vga_ram_addr, vga_ram_size);
1004 }
1005 } else if (vmsvga_enabled) {
1006 if (pci_enabled)
1007 pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
1008 vga_ram_addr, vga_ram_size);
1009 else
1010 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1011 } else {
1012 if (pci_enabled) {
1013 pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
1014 vga_ram_addr, vga_ram_size, 0, 0);
1015 } else {
1016 isa_vga_init(ds, phys_ram_base + vga_ram_addr,
1017 vga_ram_addr, vga_ram_size);
1018 }
1019 }
1020
1021 rtc_state = rtc_init(0x70, i8259[8]);
1022
1023 qemu_register_boot_set(pc_boot_set, rtc_state);
1024
1025 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1026 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1027
1028 if (pci_enabled) {
1029 ioapic = ioapic_init();
1030 }
1031 #ifdef USE_KVM_PIT
1032 if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1033 pit = kvm_pit_init(0x40, i8259[0]);
1034 else
1035 #endif
1036 pit = pit_init(0x40, i8259[0]);
1037 pcspk_init(pit);
1038 if (pci_enabled) {
1039 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1040 }
1041
1042 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1043 if (serial_hds[i]) {
1044 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1045 serial_hds[i]);
1046 }
1047 }
1048
1049 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1050 if (parallel_hds[i]) {
1051 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1052 parallel_hds[i]);
1053 }
1054 }
1055
1056 for(i = 0; i < nb_nics; i++) {
1057 nd = &nd_table[i];
1058 if (!nd->model) {
1059 if (pci_enabled) {
1060 nd->model = "rtl8139";
1061 } else {
1062 nd->model = "ne2k_isa";
1063 }
1064 }
1065 if (strcmp(nd->model, "ne2k_isa") == 0) {
1066 pc_init_ne2k_isa(nd, i8259);
1067 } else if (pci_enabled) {
1068 if (strcmp(nd->model, "?") == 0)
1069 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1070 if (!pci_nic_init(pci_bus, nd, -1))
1071 exit(1);
1072 } else if (strcmp(nd->model, "?") == 0) {
1073 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1074 exit(1);
1075 } else {
1076 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
1077 exit(1);
1078 }
1079 }
1080
1081 qemu_system_hot_add_init(cpu_model);
1082
1083 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1084 fprintf(stderr, "qemu: too many IDE bus\n");
1085 exit(1);
1086 }
1087
1088 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1089 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1090 if (index != -1)
1091 hd[i] = drives_table[index].bdrv;
1092 else
1093 hd[i] = NULL;
1094 }
1095
1096 if (pci_enabled) {
1097 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1098 } else {
1099 for(i = 0; i < MAX_IDE_BUS; i++) {
1100 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1101 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1102 }
1103 }
1104
1105 i8042_init(i8259[1], i8259[12], 0x60);
1106 DMA_init(0);
1107 #ifdef HAS_AUDIO
1108 audio_init(pci_enabled ? pci_bus : NULL, i8259);
1109 #endif
1110
1111 for(i = 0; i < MAX_FD; i++) {
1112 index = drive_get_index(IF_FLOPPY, 0, i);
1113 if (index != -1)
1114 fd[i] = drives_table[index].bdrv;
1115 else
1116 fd[i] = NULL;
1117 }
1118 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1119
1120 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1121
1122 if (pci_enabled && usb_enabled) {
1123 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1124 }
1125
1126 if (pci_enabled && acpi_enabled) {
1127 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1128 i2c_bus *smbus;
1129
1130 /* TODO: Populate SPD eeprom data. */
1131 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1132 for (i = 0; i < 8; i++) {
1133 smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1134 }
1135 }
1136
1137 if (i440fx_state) {
1138 i440fx_init_memory_mappings(i440fx_state);
1139 }
1140
1141 if (pci_enabled) {
1142 int max_bus;
1143 int bus, unit;
1144 void *scsi;
1145
1146 max_bus = drive_get_max_bus(IF_SCSI);
1147
1148 for (bus = 0; bus <= max_bus; bus++) {
1149 scsi = lsi_scsi_init(pci_bus, -1);
1150 for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1151 index = drive_get_index(IF_SCSI, bus, unit);
1152 if (index == -1)
1153 continue;
1154 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1155 }
1156 }
1157 }
1158
1159 /* Add virtio block devices */
1160 if (pci_enabled) {
1161 int index;
1162 int unit_id = 0;
1163
1164 while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1165 virtio_blk_init(pci_bus, 0x1AF4, 0x1001,
1166 drives_table[index].bdrv);
1167 unit_id++;
1168 }
1169 }
1170
1171 if (extboot_drive != -1) {
1172 DriveInfo *info = &drives_table[extboot_drive];
1173 int cyls, heads, secs;
1174
1175 if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1176 bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1177 bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1178 }
1179
1180 extboot_init(info->bdrv, 1);
1181 }
1182
1183 if (pci_enabled)
1184 virtio_balloon_init(pci_bus);
1185
1186 #ifdef USE_KVM_DEVICE_ASSIGNMENT
1187 if (kvm_enabled()) {
1188 int i;
1189 for (i = 0; i < assigned_devices_index; i++) {
1190 if (!add_assigned_device(assigned_devices[i])) {
1191 fprintf(stderr, "Warning: could not add assigned device %s\n",
1192 assigned_devices[i]);
1193 }
1194 }
1195
1196 if (init_all_assigned_devices(pci_bus)) {
1197 fprintf(stderr, "Failed to initialize assigned devices\n");
1198 exit (1);
1199 }
1200 }
1201 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
1202 }
1203
1204 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1205 const char *boot_device, DisplayState *ds,
1206 const char *kernel_filename,
1207 const char *kernel_cmdline,
1208 const char *initrd_filename,
1209 const char *cpu_model)
1210 {
1211 pc_init1(ram_size, vga_ram_size, boot_device, ds,
1212 kernel_filename, kernel_cmdline,
1213 initrd_filename, 1, cpu_model);
1214 }
1215
1216 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1217 const char *boot_device, DisplayState *ds,
1218 const char *kernel_filename,
1219 const char *kernel_cmdline,
1220 const char *initrd_filename,
1221 const char *cpu_model)
1222 {
1223 pc_init1(ram_size, vga_ram_size, boot_device, ds,
1224 kernel_filename, kernel_cmdline,
1225 initrd_filename, 0, cpu_model);
1226 }
1227
1228 QEMUMachine pc_machine = {
1229 .name = "pc",
1230 .desc = "Standard PC",
1231 .init = pc_init_pci,
1232 .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1233 .max_cpus = 255,
1234 };
1235
1236 QEMUMachine isapc_machine = {
1237 .name = "isapc",
1238 .desc = "ISA-only PC",
1239 .init = pc_init_isa,
1240 .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1241 .max_cpus = 1,
1242 };
kvm userspace components