?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
kvm: qemu: fixup 4GB+ memslot large page alignment
[kvm-userspace.git] / qemu / hw / pc.c
blobcc847727cce7fe6a49f4fa3c167d7474516c3827
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "block.h"
29 #include "sysemu.h"
30 #include "audio/audio.h"
31 #include "net.h"
32 #include "smbus.h"
33 #include "boards.h"
34 #include "monitor.h"
35 #include "fw_cfg.h"
36 #include "virtio-blk.h"
37 #include "virtio-balloon.h"
38 #include "virtio-console.h"
39 #include "hpet_emul.h"
40 #include "device-assignment.h"
41
42 #include "qemu-kvm.h"
43
44 /* output Bochs bios info messages */
45 //#define DEBUG_BIOS
46
47 #define BIOS_FILENAME "bios.bin"
48 #define VGABIOS_FILENAME "vgabios.bin"
49 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
50 #define EXTBOOT_FILENAME "extboot.bin"
51
52 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
53
54 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
55 #define ACPI_DATA_SIZE 0x10000
56 #define BIOS_CFG_IOPORT 0x510
57 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
58
59 #define MAX_IDE_BUS 2
60
61 static fdctrl_t *floppy_controller;
62 static RTCState *rtc_state;
63 static PITState *pit;
64 static IOAPICState *ioapic;
65 static PCIDevice *i440fx_state;
66
67 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
68 {
69 }
70
71 /* MSDOS compatibility mode FPU exception support */
72 static qemu_irq ferr_irq;
73 /* XXX: add IGNNE support */
74 void cpu_set_ferr(CPUX86State *s)
75 {
76 qemu_irq_raise(ferr_irq);
77 }
78
79 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
80 {
81 qemu_irq_lower(ferr_irq);
82 }
83
84 /* TSC handling */
85 uint64_t cpu_get_tsc(CPUX86State *env)
86 {
87 /* Note: when using kqemu, it is more logical to return the host TSC
88 because kqemu does not trap the RDTSC instruction for
89 performance reasons */
90 #ifdef USE_KQEMU
91 if (env->kqemu_enabled) {
92 return cpu_get_real_ticks();
93 } else
94 #endif
95 {
96 return cpu_get_ticks();
97 }
98 }
99
100 /* SMM support */
101 void cpu_smm_update(CPUState *env)
102 {
103 if (i440fx_state && env == first_cpu)
104 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
105 }
106
107
108 /* IRQ handling */
109 int cpu_get_pic_interrupt(CPUState *env)
110 {
111 int intno;
112
113 intno = apic_get_interrupt(env);
114 if (intno >= 0) {
115 /* set irq request if a PIC irq is still pending */
116 /* XXX: improve that */
117 pic_update_irq(isa_pic);
118 return intno;
119 }
120 /* read the irq from the PIC */
121 if (!apic_accept_pic_intr(env))
122 return -1;
123
124 intno = pic_read_irq(isa_pic);
125 return intno;
126 }
127
128 static void pic_irq_request(void *opaque, int irq, int level)
129 {
130 CPUState *env = first_cpu;
131
132 if (env->apic_state) {
133 while (env) {
134 if (apic_accept_pic_intr(env))
135 apic_deliver_pic_intr(env, level);
136 env = env->next_cpu;
137 }
138 } else {
139 if (level)
140 cpu_interrupt(env, CPU_INTERRUPT_HARD);
141 else
142 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
143 }
144 }
145
146 /* PC cmos mappings */
147
148 #define REG_EQUIPMENT_BYTE 0x14
149
150 static int cmos_get_fd_drive_type(int fd0)
151 {
152 int val;
153
154 switch (fd0) {
155 case 0:
156 /* 1.44 Mb 3"5 drive */
157 val = 4;
158 break;
159 case 1:
160 /* 2.88 Mb 3"5 drive */
161 val = 5;
162 break;
163 case 2:
164 /* 1.2 Mb 5"5 drive */
165 val = 2;
166 break;
167 default:
168 val = 0;
169 break;
170 }
171 return val;
172 }
173
174 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
175 {
176 RTCState *s = rtc_state;
177 int cylinders, heads, sectors;
178 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
179 rtc_set_memory(s, type_ofs, 47);
180 rtc_set_memory(s, info_ofs, cylinders);
181 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
182 rtc_set_memory(s, info_ofs + 2, heads);
183 rtc_set_memory(s, info_ofs + 3, 0xff);
184 rtc_set_memory(s, info_ofs + 4, 0xff);
185 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
186 rtc_set_memory(s, info_ofs + 6, cylinders);
187 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
188 rtc_set_memory(s, info_ofs + 8, sectors);
189 }
190
191 /* convert boot_device letter to something recognizable by the bios */
192 static int boot_device2nibble(char boot_device)
193 {
194 switch(boot_device) {
195 case 'a':
196 case 'b':
197 return 0x01; /* floppy boot */
198 case 'c':
199 return 0x02; /* hard drive boot */
200 case 'd':
201 return 0x03; /* CD-ROM boot */
202 case 'n':
203 return 0x04; /* Network boot */
204 }
205 return 0;
206 }
207
208 /* copy/pasted from cmos_init, should be made a general function
209 and used there as well */
210 static int pc_boot_set(void *opaque, const char *boot_device)
211 {
212 Monitor *mon = cur_mon;
213 #define PC_MAX_BOOT_DEVICES 3
214 RTCState *s = (RTCState *)opaque;
215 int nbds, bds[3] = { 0, };
216 int i;
217
218 nbds = strlen(boot_device);
219 if (nbds > PC_MAX_BOOT_DEVICES) {
220 monitor_printf(mon, "Too many boot devices for PC\n");
221 return(1);
222 }
223 for (i = 0; i < nbds; i++) {
224 bds[i] = boot_device2nibble(boot_device[i]);
225 if (bds[i] == 0) {
226 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
227 boot_device[i]);
228 return(1);
229 }
230 }
231 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
232 rtc_set_memory(s, 0x38, (bds[2] << 4));
233 return(0);
234 }
235
236 /* hd_table must contain 4 block drivers */
237 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
238 const char *boot_device, BlockDriverState **hd_table)
239 {
240 RTCState *s = rtc_state;
241 int nbds, bds[3] = { 0, };
242 int val;
243 int fd0, fd1, nb;
244 int i;
245
246 /* various important CMOS locations needed by PC/Bochs bios */
247
248 /* memory size */
249 val = 640; /* base memory in K */
250 rtc_set_memory(s, 0x15, val);
251 rtc_set_memory(s, 0x16, val >> 8);
252
253 val = (ram_size / 1024) - 1024;
254 if (val > 65535)
255 val = 65535;
256 rtc_set_memory(s, 0x17, val);
257 rtc_set_memory(s, 0x18, val >> 8);
258 rtc_set_memory(s, 0x30, val);
259 rtc_set_memory(s, 0x31, val >> 8);
260
261 if (above_4g_mem_size) {
262 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
263 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
264 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
265 }
266 rtc_set_memory(s, 0x5f, smp_cpus - 1);
267
268 if (ram_size > (16 * 1024 * 1024))
269 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
270 else
271 val = 0;
272 if (val > 65535)
273 val = 65535;
274 rtc_set_memory(s, 0x34, val);
275 rtc_set_memory(s, 0x35, val >> 8);
276
277 /* set the number of CPU */
278 rtc_set_memory(s, 0x5f, smp_cpus - 1);
279
280 /* set boot devices, and disable floppy signature check if requested */
281 #define PC_MAX_BOOT_DEVICES 3
282 nbds = strlen(boot_device);
283 if (nbds > PC_MAX_BOOT_DEVICES) {
284 fprintf(stderr, "Too many boot devices for PC\n");
285 exit(1);
286 }
287 for (i = 0; i < nbds; i++) {
288 bds[i] = boot_device2nibble(boot_device[i]);
289 if (bds[i] == 0) {
290 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
291 boot_device[i]);
292 exit(1);
293 }
294 }
295 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
296 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
297
298 /* floppy type */
299
300 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
301 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
302
303 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
304 rtc_set_memory(s, 0x10, val);
305
306 val = 0;
307 nb = 0;
308 if (fd0 < 3)
309 nb++;
310 if (fd1 < 3)
311 nb++;
312 switch (nb) {
313 case 0:
314 break;
315 case 1:
316 val |= 0x01; /* 1 drive, ready for boot */
317 break;
318 case 2:
319 val |= 0x41; /* 2 drives, ready for boot */
320 break;
321 }
322 val |= 0x02; /* FPU is there */
323 val |= 0x04; /* PS/2 mouse installed */
324 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
325
326 /* hard drives */
327
328 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
329 if (hd_table[0])
330 cmos_init_hd(0x19, 0x1b, hd_table[0]);
331 if (hd_table[1])
332 cmos_init_hd(0x1a, 0x24, hd_table[1]);
333
334 val = 0;
335 for (i = 0; i < 4; i++) {
336 if (hd_table[i]) {
337 int cylinders, heads, sectors, translation;
338 /* NOTE: bdrv_get_geometry_hint() returns the physical
339 geometry. It is always such that: 1 <= sects <= 63, 1
340 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
341 geometry can be different if a translation is done. */
342 translation = bdrv_get_translation_hint(hd_table[i]);
343 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
344 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
345 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
346 /* No translation. */
347 translation = 0;
348 } else {
349 /* LBA translation. */
350 translation = 1;
351 }
352 } else {
353 translation--;
354 }
355 val |= translation << (i * 2);
356 }
357 }
358 rtc_set_memory(s, 0x39, val);
359 }
360
361 void ioport_set_a20(int enable)
362 {
363 /* XXX: send to all CPUs ? */
364 cpu_x86_set_a20(first_cpu, enable);
365 }
366
367 int ioport_get_a20(void)
368 {
369 return ((first_cpu->a20_mask >> 20) & 1);
370 }
371
372 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
373 {
374 ioport_set_a20((val >> 1) & 1);
375 /* XXX: bit 0 is fast reset */
376 }
377
378 static uint32_t ioport92_read(void *opaque, uint32_t addr)
379 {
380 return ioport_get_a20() << 1;
381 }
382
383 /***********************************************************/
384 /* Bochs BIOS debug ports */
385
386 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
387 {
388 static const char shutdown_str[8] = "Shutdown";
389 static int shutdown_index = 0;
390
391 switch(addr) {
392 /* Bochs BIOS messages */
393 case 0x400:
394 case 0x401:
395 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
396 exit(1);
397 case 0x402:
398 case 0x403:
399 #ifdef DEBUG_BIOS
400 fprintf(stderr, "%c", val);
401 #endif
402 break;
403 case 0x8900:
404 /* same as Bochs power off */
405 if (val == shutdown_str[shutdown_index]) {
406 shutdown_index++;
407 if (shutdown_index == 8) {
408 shutdown_index = 0;
409 qemu_system_shutdown_request();
410 }
411 } else {
412 shutdown_index = 0;
413 }
414 break;
415
416 /* LGPL'ed VGA BIOS messages */
417 case 0x501:
418 case 0x502:
419 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
420 exit(1);
421 case 0x500:
422 case 0x503:
423 #ifdef DEBUG_BIOS
424 fprintf(stderr, "%c", val);
425 #endif
426 break;
427 }
428 }
429
430 static void bochs_bios_init(void)
431 {
432 void *fw_cfg;
433
434 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
435 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
436 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
437 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
438 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
439
440 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
441 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
442 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
443 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
444
445 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
446 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
447 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
448 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
449 acpi_tables_len);
450 }
451
452 /* Generate an initial boot sector which sets state and jump to
453 a specified vector */
454 static void generate_bootsect(uint8_t *option_rom,
455 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
456 {
457 uint8_t rom[512], *p, *reloc;
458 uint8_t sum;
459 int i;
460
461 memset(rom, 0, sizeof(rom));
462
463 p = rom;
464 /* Make sure we have an option rom signature */
465 *p++ = 0x55;
466 *p++ = 0xaa;
467
468 /* ROM size in sectors*/
469 *p++ = 1;
470
471 /* Hook int19 */
472
473 *p++ = 0x50; /* push ax */
474 *p++ = 0x1e; /* push ds */
475 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
476 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
477
478 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
479 *p++ = 0x64; *p++ = 0x00;
480 reloc = p;
481 *p++ = 0x00; *p++ = 0x00;
482
483 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
484 *p++ = 0x66; *p++ = 0x00;
485
486 *p++ = 0x1f; /* pop ds */
487 *p++ = 0x58; /* pop ax */
488 *p++ = 0xcb; /* lret */
489
490 /* Actual code */
491 *reloc = (p - rom);
492
493 *p++ = 0xfa; /* CLI */
494 *p++ = 0xfc; /* CLD */
495
496 for (i = 0; i < 6; i++) {
497 if (i == 1) /* Skip CS */
498 continue;
499
500 *p++ = 0xb8; /* MOV AX,imm16 */
501 *p++ = segs[i];
502 *p++ = segs[i] >> 8;
503 *p++ = 0x8e; /* MOV <seg>,AX */
504 *p++ = 0xc0 + (i << 3);
505 }
506
507 for (i = 0; i < 8; i++) {
508 *p++ = 0x66; /* 32-bit operand size */
509 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
510 *p++ = gpr[i];
511 *p++ = gpr[i] >> 8;
512 *p++ = gpr[i] >> 16;
513 *p++ = gpr[i] >> 24;
514 }
515
516 *p++ = 0xea; /* JMP FAR */
517 *p++ = ip; /* IP */
518 *p++ = ip >> 8;
519 *p++ = segs[1]; /* CS */
520 *p++ = segs[1] >> 8;
521
522 /* sign rom */
523 sum = 0;
524 for (i = 0; i < (sizeof(rom) - 1); i++)
525 sum += rom[i];
526 rom[sizeof(rom) - 1] = -sum;
527
528 memcpy(option_rom, rom, sizeof(rom));
529 }
530
531 static long get_file_size(FILE *f)
532 {
533 long where, size;
534
535 /* XXX: on Unix systems, using fstat() probably makes more sense */
536
537 where = ftell(f);
538 fseek(f, 0, SEEK_END);
539 size = ftell(f);
540 fseek(f, where, SEEK_SET);
541
542 return size;
543 }
544
545 static void load_linux(uint8_t *option_rom,
546 const char *kernel_filename,
547 const char *initrd_filename,
548 const char *kernel_cmdline)
549 {
550 uint16_t protocol;
551 uint32_t gpr[8];
552 uint16_t seg[6];
553 uint16_t real_seg;
554 int setup_size, kernel_size, initrd_size, cmdline_size;
555 uint32_t initrd_max;
556 uint8_t header[1024];
557 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
558 FILE *f, *fi;
559
560 /* Align to 16 bytes as a paranoia measure */
561 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
562
563 /* load the kernel header */
564 f = fopen(kernel_filename, "rb");
565 if (!f || !(kernel_size = get_file_size(f)) ||
566 fread(header, 1, 1024, f) != 1024) {
567 fprintf(stderr, "qemu: could not load kernel '%s'\n",
568 kernel_filename);
569 exit(1);
570 }
571
572 /* kernel protocol version */
573 #if 0
574 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
575 #endif
576 if (ldl_p(header+0x202) == 0x53726448)
577 protocol = lduw_p(header+0x206);
578 else
579 protocol = 0;
580
581 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
582 /* Low kernel */
583 real_addr = 0x90000;
584 cmdline_addr = 0x9a000 - cmdline_size;
585 prot_addr = 0x10000;
586 } else if (protocol < 0x202) {
587 /* High but ancient kernel */
588 real_addr = 0x90000;
589 cmdline_addr = 0x9a000 - cmdline_size;
590 prot_addr = 0x100000;
591 } else {
592 /* High and recent kernel */
593 real_addr = 0x10000;
594 cmdline_addr = 0x20000;
595 prot_addr = 0x100000;
596 }
597
598 #if 0
599 fprintf(stderr,
600 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
601 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
602 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
603 real_addr,
604 cmdline_addr,
605 prot_addr);
606 #endif
607
608 /* highest address for loading the initrd */
609 if (protocol >= 0x203)
610 initrd_max = ldl_p(header+0x22c);
611 else
612 initrd_max = 0x37ffffff;
613
614 if (initrd_max >= ram_size-ACPI_DATA_SIZE)
615 initrd_max = ram_size-ACPI_DATA_SIZE-1;
616
617 /* kernel command line */
618 pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
619
620 if (protocol >= 0x202) {
621 stl_p(header+0x228, cmdline_addr);
622 } else {
623 stw_p(header+0x20, 0xA33F);
624 stw_p(header+0x22, cmdline_addr-real_addr);
625 }
626
627 /* loader type */
628 /* High nybble = B reserved for Qemu; low nybble is revision number.
629 If this code is substantially changed, you may want to consider
630 incrementing the revision. */
631 if (protocol >= 0x200)
632 header[0x210] = 0xB0;
633
634 /* heap */
635 if (protocol >= 0x201) {
636 header[0x211] |= 0x80; /* CAN_USE_HEAP */
637 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
638 }
639
640 /* load initrd */
641 if (initrd_filename) {
642 if (protocol < 0x200) {
643 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
644 exit(1);
645 }
646
647 fi = fopen(initrd_filename, "rb");
648 if (!fi) {
649 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
650 initrd_filename);
651 exit(1);
652 }
653
654 initrd_size = get_file_size(fi);
655 initrd_addr = (initrd_max-initrd_size) & ~4095;
656
657 fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
658 "\n", initrd_size, initrd_addr);
659
660 if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
661 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
662 initrd_filename);
663 exit(1);
664 }
665 fclose(fi);
666
667 stl_p(header+0x218, initrd_addr);
668 stl_p(header+0x21c, initrd_size);
669 }
670
671 /* store the finalized header and load the rest of the kernel */
672 cpu_physical_memory_write(real_addr, header, 1024);
673
674 setup_size = header[0x1f1];
675 if (setup_size == 0)
676 setup_size = 4;
677
678 setup_size = (setup_size+1)*512;
679 kernel_size -= setup_size; /* Size of protected-mode code */
680
681 if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
682 !fread_targphys_ok(prot_addr, kernel_size, f)) {
683 fprintf(stderr, "qemu: read error on kernel '%s'\n",
684 kernel_filename);
685 exit(1);
686 }
687 fclose(f);
688
689 /* generate bootsector to set up the initial register state */
690 real_seg = real_addr >> 4;
691 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
692 seg[1] = real_seg+0x20; /* CS */
693 memset(gpr, 0, sizeof gpr);
694 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
695
696 generate_bootsect(option_rom, gpr, seg, 0);
697 }
698
699 static void main_cpu_reset(void *opaque)
700 {
701 CPUState *env = opaque;
702 cpu_reset(env);
703 }
704
705 static const int ide_iobase[2] = { 0x1f0, 0x170 };
706 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
707 static const int ide_irq[2] = { 14, 15 };
708
709 #define NE2000_NB_MAX 6
710
711 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
712 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
713
714 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
715 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
716
717 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
718 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
719
720 #ifdef HAS_AUDIO
721 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
722 {
723 struct soundhw *c;
724 int audio_enabled = 0;
725
726 for (c = soundhw; !audio_enabled && c->name; ++c) {
727 audio_enabled = c->enabled;
728 }
729
730 if (audio_enabled) {
731 AudioState *s;
732
733 s = AUD_init ();
734 if (s) {
735 for (c = soundhw; c->name; ++c) {
736 if (c->enabled) {
737 if (c->isa) {
738 c->init.init_isa (s, pic);
739 }
740 else {
741 if (pci_bus) {
742 c->init.init_pci (pci_bus, s);
743 }
744 }
745 }
746 }
747 }
748 }
749 }
750 #endif
751
752 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
753 {
754 static int nb_ne2k = 0;
755
756 if (nb_ne2k == NE2000_NB_MAX)
757 return;
758 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
759 nb_ne2k++;
760 }
761
762 typedef struct rom_reset_data {
763 uint8_t *data;
764 target_phys_addr_t addr;
765 unsigned size;
766 } RomResetData;
767
768 static void option_rom_reset(void *_rrd)
769 {
770 RomResetData *rrd = _rrd;
771
772 cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
773 }
774
775 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
776 {
777 RomResetData *rrd = qemu_malloc(sizeof *rrd);
778
779 rrd->data = qemu_malloc(size);
780 cpu_physical_memory_read(addr, rrd->data, size);
781 rrd->addr = addr;
782 rrd->size = size;
783 qemu_register_reset(option_rom_reset, rrd);
784 }
785
786 CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
787 {
788 CPUState *env = cpu_init(cpu_model);
789 if (!env) {
790 fprintf(stderr, "Unable to find x86 CPU definition\n");
791 exit(1);
792 }
793 if (cpu != 0)
794 env->halted = 1;
795 if (smp_cpus > 1) {
796 /* XXX: enable it in all cases */
797 env->cpuid_features |= CPUID_APIC;
798 }
799 qemu_register_reset(main_cpu_reset, env);
800 if (pci_enabled) {
801 apic_init(env);
802 }
803 return env;
804 }
805
806 /* PC hardware initialisation */
807 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
808 const char *boot_device,
809 const char *kernel_filename, const char *kernel_cmdline,
810 const char *initrd_filename,
811 int pci_enabled, const char *cpu_model)
812 {
813 char buf[1024];
814 int ret, linux_boot, i;
815 ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset, option_rom_start = 0;
816 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
817 int bios_size, isa_bios_size, vga_bios_size;
818 int pci_option_rom_offset;
819 PCIBus *pci_bus;
820 int piix3_devfn = -1;
821 CPUState *env;
822 qemu_irq *cpu_irq;
823 qemu_irq *i8259;
824 int index;
825 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
826 BlockDriverState *fd[MAX_FD];
827 int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
828
829 if (ram_size >= 0xe0000000 ) {
830 above_4g_mem_size = ram_size - 0xe0000000;
831 below_4g_mem_size = 0xe0000000;
832 } else {
833 below_4g_mem_size = ram_size;
834 }
835
836 linux_boot = (kernel_filename != NULL);
837
838 /* init CPUs */
839 if (cpu_model == NULL) {
840 #ifdef TARGET_X86_64
841 cpu_model = "qemu64";
842 #else
843 cpu_model = "qemu32";
844 #endif
845 }
846
847 for(i = 0; i < smp_cpus; i++) {
848 env = pc_new_cpu(i, cpu_model, pci_enabled);
849 }
850
851 vmport_init();
852
853 /* allocate RAM */
854 ram_addr = qemu_ram_alloc(0xa0000);
855 cpu_register_physical_memory(0, 0xa0000, ram_addr);
856
857 /* Allocate, even though we won't register, so we don't break the
858 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
859 * and some bios areas, which will be registered later
860 */
861 ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
862 ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
863 cpu_register_physical_memory(0x100000,
864 below_4g_mem_size - 0x100000,
865 ram_addr);
866
867 /* above 4giga memory allocation */
868 if (above_4g_mem_size > 0) {
869 ram_addr = qemu_ram_alloc(above_4g_mem_size);
870 if (hpagesize) {
871 if (ram_addr & (hpagesize-1)) {
872 unsigned long aligned_addr;
873 aligned_addr = (ram_addr + hpagesize - 1) & ~(hpagesize-1);
874 qemu_ram_alloc(aligned_addr - ram_addr);
875 ram_addr = aligned_addr;
876 }
877 }
878 cpu_register_physical_memory(0x100000000ULL,
879 above_4g_mem_size,
880 ram_addr);
881 }
882
883 /* allocate VGA RAM */
884 vga_ram_addr = qemu_ram_alloc(vga_ram_size);
885
886 /* BIOS load */
887 if (bios_name == NULL)
888 bios_name = BIOS_FILENAME;
889 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
890 bios_size = get_image_size(buf);
891 if (bios_size <= 0 ||
892 (bios_size % 65536) != 0) {
893 goto bios_error;
894 }
895 bios_offset = qemu_ram_alloc(bios_size);
896 ret = load_image(buf, phys_ram_base + bios_offset);
897 if (ret != bios_size) {
898 bios_error:
899 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
900 exit(1);
901 }
902
903 if (using_vga) {
904 /* VGA BIOS load */
905 if (cirrus_vga_enabled) {
906 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
907 } else {
908 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
909 }
910 vga_bios_size = get_image_size(buf);
911 if (vga_bios_size <= 0 || vga_bios_size > 65536)
912 goto vga_bios_error;
913 vga_bios_offset = qemu_ram_alloc(65536);
914
915 ret = load_image(buf, phys_ram_base + vga_bios_offset);
916 if (ret != vga_bios_size) {
917 vga_bios_error:
918 fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
919 exit(1);
920 }
921 /* Round up vga bios size to the next 2k boundary */
922 vga_bios_size = (vga_bios_size + 2047) & ~2047;
923 option_rom_start = 0xc0000 + vga_bios_size;
924
925 /* setup basic memory access */
926 cpu_register_physical_memory(0xc0000, vga_bios_size,
927 vga_bios_offset | IO_MEM_ROM);
928 }
929
930 /* No point in placing option roms before this address, since bochs bios
931 * will only start looking for it at 0xc8000 */
932 if (option_rom_start < 0xc8000)
933 option_rom_start = 0xc8000;
934
935
936 /* map the last 128KB of the BIOS in ISA space */
937 isa_bios_size = bios_size;
938 if (isa_bios_size > (128 * 1024))
939 isa_bios_size = 128 * 1024;
940 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
941 IO_MEM_UNASSIGNED);
942 /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
943 cpu_register_physical_memory(0x100000 - isa_bios_size,
944 isa_bios_size,
945 (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
946
947 if (extboot_drive != -1) {
948 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, EXTBOOT_FILENAME);
949 option_rom[nb_option_roms++] = buf;
950 }
951
952 {
953 ram_addr_t option_rom_offset;
954 int size, offset;
955
956 offset = option_rom_start;
957 if (linux_boot) {
958 option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
959 load_linux(phys_ram_base + option_rom_offset,
960 kernel_filename, initrd_filename, kernel_cmdline);
961 cpu_register_physical_memory(option_rom_start, TARGET_PAGE_SIZE,
962 option_rom_offset | IO_MEM_ROM);
963 offset += TARGET_PAGE_SIZE;
964 }
965
966 for (i = 0; i < nb_option_roms; i++) {
967 size = get_image_size(option_rom[i]);
968 if (size < 0) {
969 fprintf(stderr, "Could not load option rom '%s'\n",
970 option_rom[i]);
971 exit(1);
972 }
973 if (size > (0xe0000 - offset))
974 goto option_rom_error;
975 option_rom_offset = qemu_ram_alloc(size);
976 ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
977 if (ret != size) {
978 option_rom_error:
979 fprintf(stderr, "Could not fit %soption roms in available space\n", using_vga ? "VGA bios and " : "");
980 exit(1);
981 }
982 size = (size + 4095) & ~4095;
983 /* XXX: for DDIM support, "ROM space" should be writable during
984 initialization, and (optionally) marked readonly by the BIOS
985 before INT 19h. See the PNPBIOS specification, appendix B.
986 DDIM support is mandatory for proper PCI expansion ROM support. */
987 cpu_register_physical_memory(offset, size, option_rom_offset /* | IO_MEM_ROM */);
988 option_rom_setup_reset(0xd0000 + offset, size);
989 offset += size;
990 }
991 pci_option_rom_offset = offset;
992 }
993
994 /* map all the bios at the top of memory */
995 cpu_register_physical_memory((uint32_t)(-bios_size),
996 bios_size, bios_offset | IO_MEM_ROM);
997
998 bochs_bios_init();
999
1000 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1001 i8259 = i8259_init(cpu_irq[0]);
1002 ferr_irq = i8259[13];
1003
1004 if (pci_enabled) {
1005 pci_bus = i440fx_init(&i440fx_state, i8259);
1006 piix3_devfn = piix3_init(pci_bus, -1);
1007 } else {
1008 pci_bus = NULL;
1009 }
1010
1011 /* init basic PC hardware */
1012 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1013
1014 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1015
1016 if (cirrus_vga_enabled) {
1017 if (pci_enabled) {
1018 pci_cirrus_vga_init(pci_bus,
1019 phys_ram_base + vga_ram_addr,
1020 vga_ram_addr, vga_ram_size);
1021 } else {
1022 isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
1023 vga_ram_addr, vga_ram_size);
1024 }
1025 } else if (vmsvga_enabled) {
1026 if (pci_enabled)
1027 pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
1028 vga_ram_addr, vga_ram_size);
1029 else
1030 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1031 } else if (std_vga_enabled) {
1032 if (pci_enabled) {
1033 pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
1034 vga_ram_addr, vga_ram_size, 0, 0);
1035 } else {
1036 isa_vga_init(phys_ram_base + vga_ram_addr,
1037 vga_ram_addr, vga_ram_size);
1038 }
1039 }
1040
1041 rtc_state = rtc_init(0x70, i8259[8], 2000);
1042
1043 qemu_register_boot_set(pc_boot_set, rtc_state);
1044
1045 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1046 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1047
1048 if (pci_enabled) {
1049 ioapic = ioapic_init();
1050 }
1051 #ifdef USE_KVM_PIT
1052 if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1053 pit = kvm_pit_init(0x40, i8259[0]);
1054 else
1055 #endif
1056 pit = pit_init(0x40, i8259[0]);
1057 pcspk_init(pit);
1058 if (!no_hpet) {
1059 hpet_init(i8259);
1060 }
1061 if (pci_enabled) {
1062 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1063 }
1064
1065 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1066 if (serial_hds[i]) {
1067 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1068 serial_hds[i]);
1069 }
1070 }
1071
1072 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1073 if (parallel_hds[i]) {
1074 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1075 parallel_hds[i]);
1076 }
1077 }
1078
1079 for(i = 0; i < nb_nics; i++) {
1080 NICInfo *nd = &nd_table[i];
1081
1082 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1083 pc_init_ne2k_isa(nd, i8259);
1084 else
1085 pci_nic_init(pci_bus, nd, -1, "rtl8139");
1086 }
1087
1088 qemu_system_hot_add_init(cpu_model);
1089
1090 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1091 fprintf(stderr, "qemu: too many IDE bus\n");
1092 exit(1);
1093 }
1094
1095 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1096 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1097 if (index != -1)
1098 hd[i] = drives_table[index].bdrv;
1099 else
1100 hd[i] = NULL;
1101 }
1102
1103 if (pci_enabled) {
1104 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1105 } else {
1106 for(i = 0; i < MAX_IDE_BUS; i++) {
1107 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1108 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1109 }
1110 }
1111
1112 i8042_init(i8259[1], i8259[12], 0x60);
1113 DMA_init(0);
1114 #ifdef HAS_AUDIO
1115 audio_init(pci_enabled ? pci_bus : NULL, i8259);
1116 #endif
1117
1118 for(i = 0; i < MAX_FD; i++) {
1119 index = drive_get_index(IF_FLOPPY, 0, i);
1120 if (index != -1)
1121 fd[i] = drives_table[index].bdrv;
1122 else
1123 fd[i] = NULL;
1124 }
1125 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1126
1127 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1128
1129 if (pci_enabled && usb_enabled) {
1130 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1131 }
1132
1133 if (pci_enabled && acpi_enabled) {
1134 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1135 i2c_bus *smbus;
1136
1137 /* TODO: Populate SPD eeprom data. */
1138 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1139 for (i = 0; i < 8; i++) {
1140 smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1141 }
1142 }
1143
1144 if (i440fx_state) {
1145 i440fx_init_memory_mappings(i440fx_state);
1146 }
1147
1148 if (pci_enabled) {
1149 int max_bus;
1150 int bus, unit;
1151 void *scsi;
1152
1153 max_bus = drive_get_max_bus(IF_SCSI);
1154
1155 for (bus = 0; bus <= max_bus; bus++) {
1156 scsi = lsi_scsi_init(pci_bus, -1);
1157 for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1158 index = drive_get_index(IF_SCSI, bus, unit);
1159 if (index == -1)
1160 continue;
1161 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1162 }
1163 }
1164 }
1165
1166 /* Add virtio block devices */
1167 if (pci_enabled) {
1168 int index;
1169 int unit_id = 0;
1170
1171 while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1172 virtio_blk_init(pci_bus, drives_table[index].bdrv);
1173 unit_id++;
1174 }
1175 }
1176
1177 if (extboot_drive != -1) {
1178 DriveInfo *info = &drives_table[extboot_drive];
1179 int cyls, heads, secs;
1180
1181 if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1182 bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1183 bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1184 }
1185
1186 extboot_init(info->bdrv, 1);
1187 }
1188
1189 /* Add virtio balloon device */
1190 if (pci_enabled)
1191 virtio_balloon_init(pci_bus);
1192
1193 /* Add virtio console devices */
1194 if (pci_enabled) {
1195 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1196 if (virtcon_hds[i])
1197 virtio_console_init(pci_bus, virtcon_hds[i]);
1198 }
1199 }
1200
1201 #ifdef USE_KVM_DEVICE_ASSIGNMENT
1202 if (kvm_enabled()) {
1203 add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1204 assigned_dev_load_option_roms(pci_option_rom_offset);
1205 }
1206 #endif /* USE_KVM_DEVICE_ASSIGNMENT */
1207 }
1208
1209 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1210 const char *boot_device,
1211 const char *kernel_filename,
1212 const char *kernel_cmdline,
1213 const char *initrd_filename,
1214 const char *cpu_model)
1215 {
1216 pc_init1(ram_size, vga_ram_size, boot_device,
1217 kernel_filename, kernel_cmdline,
1218 initrd_filename, 1, cpu_model);
1219 }
1220
1221 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1222 const char *boot_device,
1223 const char *kernel_filename,
1224 const char *kernel_cmdline,
1225 const char *initrd_filename,
1226 const char *cpu_model)
1227 {
1228 pc_init1(ram_size, vga_ram_size, boot_device,
1229 kernel_filename, kernel_cmdline,
1230 initrd_filename, 0, cpu_model);
1231 }
1232
1233 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1234 BIOS will read it and start S3 resume at POST Entry */
1235 void cmos_set_s3_resume(void)
1236 {
1237 if (rtc_state)
1238 rtc_set_memory(rtc_state, 0xF, 0xFE);
1239 }
1240
1241 QEMUMachine pc_machine = {
1242 .name = "pc",
1243 .desc = "Standard PC",
1244 .init = pc_init_pci,
1245 .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1246 .max_cpus = 255,
1247 };
1248
1249 QEMUMachine isapc_machine = {
1250 .name = "isapc",
1251 .desc = "ISA-only PC",
1252 .init = pc_init_isa,
1253 .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1254 .max_cpus = 1,
1255 };
kvm userspace components