1 //-----------------------------------------------------------------------------
2 // For reading TI tags, we need to place the FPGA in pass through mode
3 // and pass everything through to the ARM
4 //-----------------------------------------------------------------------------
5 // iZsh <izsh at fail0verflow.com>, June 2014
9 output pwr_lo
, output pwr_hi
,
10 output pwr_oe1
, output pwr_oe2
, output pwr_oe3
, output pwr_oe4
,
12 output ssp_din
, input ssp_dout
,
17 // the antenna is modulated when ssp_dout = 1, when 0 the
18 // antenna drivers stop modulating and go into listen mode
19 assign pwr_oe3
= 1'b0;
20 assign pwr_oe1
= ssp_dout
;
21 assign pwr_oe2
= ssp_dout
;
22 assign pwr_oe4
= ssp_dout
;
23 assign pwr_lo
= pck_divclk
&& ssp_dout
;
25 assign adc_clk
= 1'b0;
26 assign ssp_din
= cross_lo
;
27 assign dbg
= cross_lo
;