libavcodec/x86/mlpdsp.c

   1 /*
   2  * MLP DSP functions x86-optimized
   3  * Copyright (c) 2009 Ramiro Polla
   4  *
   5  * This file is part of Libav.
   6  *
   7  * Libav is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * Libav is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with Libav; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  20  */
  21
  22 #include "libavutil/attributes.h"
  23 #include "libavutil/internal.h"
  24 #include "libavutil/cpu.h"
  25 #include "libavutil/x86/asm.h"
  26 #include "libavutil/x86/cpu.h"
  27 #include "libavcodec/mlpdsp.h"
  28 #include "libavcodec/mlp.h"
  29
  30 #if HAVE_7REGS && HAVE_INLINE_ASM
  31
  32 extern char ff_mlp_firorder_8;
  33 extern char ff_mlp_firorder_7;
  34 extern char ff_mlp_firorder_6;
  35 extern char ff_mlp_firorder_5;
  36 extern char ff_mlp_firorder_4;
  37 extern char ff_mlp_firorder_3;
  38 extern char ff_mlp_firorder_2;
  39 extern char ff_mlp_firorder_1;
  40 extern char ff_mlp_firorder_0;
  41
  42 extern char ff_mlp_iirorder_4;
  43 extern char ff_mlp_iirorder_3;
  44 extern char ff_mlp_iirorder_2;
  45 extern char ff_mlp_iirorder_1;
  46 extern char ff_mlp_iirorder_0;
  47
  48 static const void * const firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
  49                                           &ff_mlp_firorder_2, &ff_mlp_firorder_3,
  50                                           &ff_mlp_firorder_4, &ff_mlp_firorder_5,
  51                                           &ff_mlp_firorder_6, &ff_mlp_firorder_7,
  52                                           &ff_mlp_firorder_8 };
  53 static const void * const iirtable[5] = { &ff_mlp_iirorder_0, &ff_mlp_iirorder_1,
  54                                           &ff_mlp_iirorder_2, &ff_mlp_iirorder_3,
  55                                           &ff_mlp_iirorder_4 };
  56
  57 #if ARCH_X86_64
  58
  59 #define MLPMUL(label, offset, offs, offc)   \
  60     LABEL_MANGLE(label)":             \n\t" \
  61     "movslq "offset"+"offs"(%0), %%rax\n\t" \
  62     "movslq "offset"+"offc"(%1), %%rdx\n\t" \
  63     "imul                 %%rdx, %%rax\n\t" \
  64     "add                  %%rax, %%rsi\n\t"
  65
  66 #define FIRMULREG(label, offset, firc)\
  67     LABEL_MANGLE(label)":       \n\t" \
  68     "movslq "#offset"(%0), %%rax\n\t" \
  69     "imul        %"#firc", %%rax\n\t" \
  70     "add            %%rax, %%rsi\n\t"
  71
  72 #define CLEAR_ACCUM                   \
  73     "xor            %%rsi, %%rsi\n\t"
  74
  75 #define SHIFT_ACCUM                   \
  76     "shr     %%cl,         %%rsi\n\t"
  77
  78 #define ACCUM    "%%rdx"
  79 #define RESULT   "%%rsi"
  80 #define RESULT32 "%%esi"
  81
  82 #else /* if ARCH_X86_32 */
  83
  84 #define MLPMUL(label, offset, offs, offc)  \
  85     LABEL_MANGLE(label)":            \n\t" \
  86     "mov   "offset"+"offs"(%0), %%eax\n\t" \
  87     "imull "offset"+"offc"(%1)       \n\t" \
  88     "add                %%eax , %%esi\n\t" \
  89     "adc                %%edx , %%ecx\n\t"
  90
  91 #define FIRMULREG(label, offset, firc)  \
  92     MLPMUL(label, #offset, "0", "0")
  93
  94 #define CLEAR_ACCUM                  \
  95     "xor           %%esi, %%esi\n\t" \
  96     "xor           %%ecx, %%ecx\n\t"
  97
  98 #define SHIFT_ACCUM                  \
  99     "mov           %%ecx, %%edx\n\t" \
 100     "mov           %%esi, %%eax\n\t" \
 101     "movzbl        %7   , %%ecx\n\t" \
 102     "shrd    %%cl, %%edx, %%eax\n\t" \
 103
 104 #define ACCUM    "%%edx"
 105 #define RESULT   "%%eax"
 106 #define RESULT32 "%%eax"
 107
 108 #endif /* !ARCH_X86_64 */
 109
 110 #define BINC  AV_STRINGIFY(4* MAX_CHANNELS)
 111 #define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE))
 112 #define IOFFC AV_STRINGIFY(4* MAX_FIR_ORDER)
 113
 114 #define FIRMUL(label, offset) MLPMUL(label, #offset,   "0",   "0")
 115 #define IIRMUL(label, offset) MLPMUL(label, #offset, IOFFS, IOFFC)
 116
 117 static void mlp_filter_channel_x86(int32_t *state, const int32_t *coeff,
 118                                    int firorder, int iirorder,
 119                                    unsigned int filter_shift, int32_t mask,
 120                                    int blocksize, int32_t *sample_buffer)
 121 {
 122     const void *firjump = firtable[firorder];
 123     const void *iirjump = iirtable[iirorder];
 124
 125     blocksize = -blocksize;
 126
 127     __asm__ volatile(
 128         "1:                           \n\t"
 129         CLEAR_ACCUM
 130         "jmp  *%5                     \n\t"
 131         FIRMUL   (ff_mlp_firorder_8, 0x1c   )
 132         FIRMUL   (ff_mlp_firorder_7, 0x18   )
 133         FIRMUL   (ff_mlp_firorder_6, 0x14   )
 134         FIRMUL   (ff_mlp_firorder_5, 0x10   )
 135         FIRMUL   (ff_mlp_firorder_4, 0x0c   )
 136         FIRMULREG(ff_mlp_firorder_3, 0x08,10)
 137         FIRMULREG(ff_mlp_firorder_2, 0x04, 9)
 138         FIRMULREG(ff_mlp_firorder_1, 0x00, 8)
 139         LABEL_MANGLE(ff_mlp_firorder_0)":\n\t"
 140         "jmp  *%6                     \n\t"
 141         IIRMUL   (ff_mlp_iirorder_4, 0x0c   )
 142         IIRMUL   (ff_mlp_iirorder_3, 0x08   )
 143         IIRMUL   (ff_mlp_iirorder_2, 0x04   )
 144         IIRMUL   (ff_mlp_iirorder_1, 0x00   )
 145         LABEL_MANGLE(ff_mlp_iirorder_0)":\n\t"
 146         SHIFT_ACCUM
 147         "mov  "RESULT"  ,"ACCUM"      \n\t"
 148         "add  (%2)      ,"RESULT"     \n\t"
 149         "and   %4       ,"RESULT"     \n\t"
 150         "sub   $4       ,  %0         \n\t"
 151         "mov  "RESULT32", (%0)        \n\t"
 152         "mov  "RESULT32", (%2)        \n\t"
 153         "add $"BINC"    ,  %2         \n\t"
 154         "sub  "ACCUM"   ,"RESULT"     \n\t"
 155         "mov  "RESULT32","IOFFS"(%0)  \n\t"
 156         "incl              %3         \n\t"
 157         "js 1b                        \n\t"
 158         : /* 0*/"+r"(state),
 159           /* 1*/"+r"(coeff),
 160           /* 2*/"+r"(sample_buffer),
 161 #if ARCH_X86_64
 162           /* 3*/"+r"(blocksize)
 163         : /* 4*/"r"((x86_reg)mask), /* 5*/"r"(firjump),
 164           /* 6*/"r"(iirjump)      , /* 7*/"c"(filter_shift)
 165         , /* 8*/"r"((int64_t)coeff[0])
 166         , /* 9*/"r"((int64_t)coeff[1])
 167         , /*10*/"r"((int64_t)coeff[2])
 168         : "rax", "rdx", "rsi"
 169 #else /* ARCH_X86_32 */
 170           /* 3*/"+m"(blocksize)
 171         : /* 4*/"m"(         mask), /* 5*/"m"(firjump),
 172           /* 6*/"m"(iirjump)      , /* 7*/"m"(filter_shift)
 173         : "eax", "edx", "esi", "ecx"
 174 #endif /* !ARCH_X86_64 */
 175     );
 176 }
 177
 178 #endif /* HAVE_7REGS && HAVE_INLINE_ASM */
 179
 180 av_cold void ff_mlpdsp_init_x86(MLPDSPContext *c)
 181 {
 182 #if HAVE_7REGS && HAVE_INLINE_ASM
 183     int cpu_flags = av_get_cpu_flags();
 184     if (INLINE_MMX(cpu_flags))
 185         c->mlp_filter_channel = mlp_filter_channel_x86;
 186 #endif
 187 }